Abstract: Coil structures and methods of forming are provided. The coil structure includes a substrate. A plurality of coils is disposed over the substrate, each coil comprising a conductive element that forms a continuous spiral having a hexagonal shape in a plan view of the coil structure. The plurality of coils is arranged in a honeycomb pattern, and each conductive element is electrically connected to an external electrical circuit.

Abstract: A smart parking management system and a smart parking management method are provided. The system includes a first smart pole, multiple second smart poles, and a processing device. An image capturing range of the first smart pole covers an entrance of a road section. An image capturing range of each second smart pole covers at least a parking space of the road section. The processing device is communicatively coupled to the first smart pole and the second smart poles. The processing device identifies first vehicle information of a first vehicle entering the road section according to an image stream captured by the first smart pole, obtains a movement trajectory of the first vehicle in the road section based on the first vehicle information and an image stream captured by each second smart pole, and determines where the first vehicle is parked according to the movement trajectory.

Abstract: A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.

Abstract: In an embodiment, a device includes: a back-side redistribution structure including: a metallization pattern on a first dielectric layer; and a second dielectric layer on the metallization pattern; a through via extending through the first dielectric layer to contact the metallization pattern; an integrated circuit die adjacent the through via on the first dielectric layer; a molding compound on the first dielectric layer, the molding compound encapsulating the through via and the integrated circuit die; a conductive connector extending through the second dielectric layer to contact the metallization pattern, the conductive connector being electrically connected to the through via; and an intermetallic compound at the interface of the conductive connector and the metallization pattern, the intermetallic compound extending only partially into the metallization pattern.

Abstract: A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.

Abstract: A semiconductor device includes a stacked structure, first conductive terminals and second conductive terminals. The stacked structure includes a first semiconductor component having a first area and a second semiconductor component stacked on the first semiconductor component and having a second area smaller than the first area, wherein an extending direction of the first area and an extending direction of the second area are perpendicular to a stacking direction of the first semiconductor component and the second semiconductor component. The first conductive terminals are located on the stacked structure, electrically coupled to the first semiconductor component and aside of the second semiconductor component. The second conductive terminals are located on the stacked structure and electrically coupled to the second semiconductor component.

Abstract: A semiconductor device includes a stacked structure, first conductive terminals and second conductive terminals. The stacked structure includes a first semiconductor component having a first area and a second semiconductor component stacked on the first semiconductor component and having a second area smaller than the first area, wherein an extending direction of the first area and an extending direction of the second area are perpendicular to a stacking direction of the first semiconductor component and the second semiconductor component. The first conductive terminals are located on the stacked structure, electrically coupled to the first semiconductor component and aside of the second semiconductor component. The second conductive terminals are located on the stacked structure and electrically coupled to the second semiconductor component.

Abstract: The application provides a face recognition method and an electronic device using the method. The method includes: obtaining face information from an image frame in a video stream; determining whether a first similarity between pre-registration information and the face information is higher than a first similarity threshold; determining that face recognition is successful if the first similarity is higher than the first similarity threshold, and updating real-time registration information with the face information; and determining that face recognition fails if the first similarity is lower than the first similarity threshold, and then determining whether a second similarity between the real-time registration information and the face information is higher than a second similarity threshold, where the second similarity threshold is higher than the first similarity threshold.

Abstract: A method of aligning a substrate within an apparatus. The method includes determining a substrate grid based on measurements of a plurality of targets, each at different locations on a substrate. The determining includes repetitions of updating the substrate grid after each measurement of a target, and using the updated grid to align a measurement of a subsequent target.

Abstract: A TIG welding flux for dissimilar steels is used to solve the problem that the conventional friction stir welding procedure for butt-joint welding a stainless steel workpiece and a carbon steel workpiece cannot be used on site, as well as the problem that the increased operating time and manufacturing cost due to forming bevel faces on both the stainless steel workpiece and the carbon steel workpiece. The TIG welding flux for dissimilar steels includes 25-35 wt % of silicon dioxide (SiO2), 20-30 wt % of cobalt (II, III) oxide (Co3O4), 15-20 wt % of manganese (II, III) oxide (Mn3O4), 10-15 wt % of nickel (III) oxide (Ni2O3), 7-12 wt % of molybdenum trioxide (MoO3), 6-11 wt % of manganese (II) carbonate (MnCO3), 5-10 wt % of nickel (II) carbonate (NiCO3), and 2-4 wt % of aluminum fluoride (AlF3).

Abstract: A semiconductor device package is provided. The semiconductor device package includes a semiconductor device, a molding material surrounding the semiconductor device, and a conductive slot positioned over the molding material. The conductive slot has an opening and at least two channels connecting the opening to the edges of the conductive slot, and at least two of the channels extend in different directions.

Abstract: A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion.

Abstract: In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.

Abstract: A face recognition system and a method for enhancing face recognition are provided. The method includes: receiving a face image and obtaining a feature of the face image from a feature extraction model; registering the face image to set the feature of the face image as a first recognition feature; performing a synthesis operation on the face image according to at least one first adjustment parameter to generate a synthetic image, and obtaining a feature of the synthetic image from the feature extraction model; comparing first recognition feature with the feature of the synthetic image to obtain a feature similarity; comparing the feature similarity with a threshold value to obtain a comparison result; and registering the synthetic image when the comparison result indicates that the feature similarity is less than or equal to the threshold value.

Abstract: A method of aligning a substrate within an apparatus. The method includes determining a substrate grid based on measurements of a plurality of targets, each at different locations on a substrate. The determining includes repetitions of updating the substrate grid after each measurement of a target, and using the updated grid to align a measurement of a subsequent target.

Abstract: A package includes a device die, and an encapsulating material encapsulating the device die therein. The encapsulating material has a top surface coplanar with a top surface of the device die. A coil extends from the top surface to a bottom surface of the encapsulating material, and the device die is in the region encircled by the coil. At least one dielectric layer is formed over the encapsulating material and the coil. A plurality of redistribution lines is in the at least one dielectric layer. The coil is electrically coupled to the device die through the plurality of redistribution lines.

Abstract: A face recognition system, a method for establishing data of face recognition, and a face recognizing method thereof are disclosed. The face recognition system includes an image obtaining device, a facial analysis module, and a feature comparison module. The image obtaining device is used to obtain a registered facial image. The facial analysis module is used to analyze the registered facial image to obtain a registered facial feature, so as to determine a feature threshold of the registered facial feature. The feature comparison module is used to compare the registered facial feature with a facial feature of a plural facial images to register a facial feature of a similar facial image corresponding to more than a similarity threshold as a false-positive facial image feature. Such that the facial analysis module determines a false-positive threshold of the false-positive facial image feature.

Abstract: A shock-absorbing front fork assembly of a motorcycle includes a front fork, a pressure buffering cylinder and a control valve disposed between the front fork and the pressure buffering cylinder and electrically connected with a brake system to control the communication between the front fork and the pressure buffering cylinder according to the operation of the brake system. When the brake system is not actuated, the control valve is open to make the front fork communicate with the pressure buffering cylinder, thereby making the spring supporting force relatively smaller. When the brake system is actuated, the control valve is close to make the front fork not communicate with the pressure buffering cylinder, thereby making the spring supporting force relatively larger. Therefore, the spring supporting force is adjusted by the brake operation, that raises the riding comfort and safety.

Abstract: A semiconductor device package is provided, including a semiconductor device, a molding material, and a conductive slot. The molding material surrounds the semiconductor device. The conductive slot is positioned over the molding material and having an opening and at least two channels connecting the opening to the edges of the conductive slot.

Abstract: A package structure includes a first semiconductor die, an insulating encapsulant, a plurality of first through insulator vias, a plurality of second through insulator vias, and a redistribution layer. The insulating encapsulant is encapsulating the first semiconductor die. The first through insulator vias are located in a central area of the insulating encapsulant surrounding the first semiconductor die. The second through insulator vias are located in a peripheral area of the insulating encapsulant surrounding the plurality of first through insulator vias located in the central area, wherein an aspect ratio of the plurality of second through insulator vias is greater than an aspect ratio of the plurality of first through insulator vias. The redistribution layer is disposed on the insulating encapsulant and electrically connected to the first semiconductor die, the plurality of first through insulator vias and the plurality of second through insulator vias.