Patents by Inventor Hung Yang
Hung Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088291Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chang Sun, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, TsuChing Yang, Feng-Cheng Yang, Chung-Te Lin
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Publication number: 20240090164Abstract: A liquid level controlling apparatus includes a plurality of main sinks, a storage sink, a pump and a connection tube. One of the plurality of main sinks includes a transmission port and a first liquid level detector. The storage sink includes a delivery port and a second liquid level detector. The pump includes an outlet and an inlet. The connection tube includes an rehydration tube and an drain tube. The rehydration tube has a first rehydration section and a second rehydration section. The first rehydration section is connected between the delivery port and the inlet. The second rehydration section is connected between the outlet and the transmission port. The drain tube has a first drain section and a second drain section. The first drain section is connected between the transmission port and the inlet. The second drain section is connected between the outlet and the delivery port.Type: ApplicationFiled: November 15, 2022Publication date: March 14, 2024Applicants: Inventec (Pudong) Technology Corp., Inventec CorporationInventors: Kai-Yang Tung, Hung-Ju Chen
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Publication number: 20240077891Abstract: A liquid level controlling system includes a main sink, a storage sink and a connection tube. The main sink includes a transmission port and a first liquid level detector. The transmission port is formed on a bottom of the main sink. The first liquid level detector is disposed on a top of the main sink. The storage sink includes a liquid outlet, a liquid inlet and a second liquid level detector. The connection tube is disposed between the main sink and the storage sink. The connection tube includes an rehydration tube and an drain tube. Two ends of the rehydration tube are respectively connected to the transmission port and the liquid outlet. Two ends of the drain tube are respectively connected to the transmission port and the liquid inlet.Type: ApplicationFiled: November 14, 2022Publication date: March 7, 2024Applicants: Inventec (Pudong) Technology Corp., Inventec CorporationInventors: Kai-Yang Tung, Hung-Ju Chen
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Publication number: 20240079981Abstract: A motor drive system includes an electric motor, a drive circuit and a control unit. The drive circuit provides a driving current to the electric motor. A current command generator of the control unit generates a current command according to a torque command and a motor operating information. The driving current is converted into a d-axis current and/or a q-axis current by the control unit. Consequently, the driving current is close to the d-axis current command and/or the q-axis current command corresponding to the current command. If a value of the torque command is positive, the current command generator generates the corresponding current command according to a MTPA lookup table. If the value of the torque command is negative, the current command generator generates the corresponding current command according to a zero recycle lookup table.Type: ApplicationFiled: December 2, 2022Publication date: March 7, 2024Inventors: Chih-Hung Hsiao, Chung-Hsing Ku, Shang-Wei Chiu, Zhi-Sheng Yang
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Patent number: 11923405Abstract: The present disclosure is directed to a semiconductor device. The semiconductor device includes a substrate, an insulating layer disposed on the substrate, a first conductive feature disposed in the insulating layer, and a capacitor structure disposed on the insulating layer. The capacitor structure includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode sequentially stacked. The semiconductor device also includes a first via connected to the first electrode and the third electrode, a second via connected to the second electrode, and a third via connected to the first conductive feature. A part of the first via is disposed in the insulating layer. A portion of the first conductive feature is directly under the capacitor structure.Type: GrantFiled: May 23, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
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Patent number: 11923041Abstract: A device includes a memory array, bit line pairs, word lines, a modulation circuit and a control signal generator. The memory array has bit cells arranged in rows and columns. Each bit line pair is connected to a respective column of bit cells. Each word line is connected to a respective row of bit cells. The modulation circuit is coupled with at least one bit line pair. The control signal generator is coupled with the modulation circuit. The control signal generator includes a tracking wiring with a tracking length positively correlated with a depth distance of the word lines. The control signal generator is configured to produce a control signal, switching to a first voltage level for a first time duration in reference with the tracking length, for controlling the modulation circuit. A method of controlling aforesaid device is also disclosed.Type: GrantFiled: July 5, 2022Date of Patent: March 5, 2024Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITEDInventors: Xiu-Li Yang, He-Zhou Wan, Mu-Yang Ye, Lu-Ping Kong, Ming-Hung Chang
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Publication number: 20240069610Abstract: A server includes a chassis and a storage module. The storage module is disposed in the chassis. The storage module includes a base, a first electrical connector, a storage device, a connecting member and a first fixing member. A first side of the base has a first fixing portion. The first electrical connector is disposed at a second side of the base, wherein the second side is opposite to the first side. The storage device has a second electrical connector. The connecting member is connected to the storage device. The first fixing member is disposed on the connecting member. The second electrical connector is connected to the first electrical connector and the first fixing member is fixed to the first fixing portion, so as to fix the storage device on the base.Type: ApplicationFiled: October 14, 2022Publication date: February 29, 2024Applicant: Wiwynn CorporationInventors: Shih-Hung Chen, Cong-Wei Yang
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Publication number: 20240072772Abstract: An interface device and a signal transceiving method thereof are provided. The interface device includes a slave circuit and a master circuit. The slave circuit is coupled to the master circuit and includes a first programmable delay line, a first output clock generator, and a first phase detector. The first programmable delay line provides a first adjusting delay amount according to a first adjust signal, and generates a first delayed clock signal by delaying a first clock signal according to the first adjusting delay amount. The first output clock generator generates a second clock signal according to the first delayed clock signal. The first phase detector detects a phase difference of the first clock signal and the second clock signal to generate first phase lead or lag information. The first adjust signal is generated according to the first phase lead or lag information.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Applicants: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Bi-Yang Li, Igor Elkanovich, Hung-Yi Chang, Shih-Cheng Kao
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Publication number: 20240072210Abstract: A micro light emitting diode structure including an epitaxial structure, a first insulating layer and a second insulating layer is provided. The epitaxial structure includes a first type semiconductor layer, a light emitting layer and a second type semiconductor layer. The first type semiconductor layer, the light emitting layer and a first portion of the second type semiconductor layer form a mesa. A second portion of the second type semiconductor layer is recessed relative the mesa to form a mesa surface. The first insulating layer covers from a top surface of the mesa to the mesa surface along a first side surface of the mesa, and exposes the second side surface. The second insulating layer directly covers a second side surface of the second portion, wherein a thickness ratio of the first insulating layer to the second insulating layer is between 10 and 50.Type: ApplicationFiled: October 21, 2022Publication date: February 29, 2024Applicant: PlayNitride Display Co., Ltd.Inventors: Chee-Yun Low, Yun-Syuan Chou, Hung-Hsuan Wang, Pai-Yang Tsai, Fei-Hong Chen, Tzu-Yang Lin
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Publication number: 20240071887Abstract: A semiconductor package includes a first die, a second die and a redistribution layer structure. The first die and the second die are disposed laterally. The redistribution layer structure is disposed over and electrically connected to the first die and the second die, wherein the redistribution layer structure includes a plurality of vias and a plurality of lines stacked alternately and electrically connected to each other and embedded by a plurality of polymer layers, and wherein from a top view, first vias of the plurality of vias overlapping with the first die or the second die have an elliptical-like shape.Type: ApplicationFiled: August 23, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Zi-Jheng Liu, Ting-Yang Yu, Ming-Tan Lee, Hung-Jui Kuo
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Publication number: 20240072667Abstract: A switching regulator includes a boost power stage circuit and a control circuit. The boost power stage circuit includes: at least one power switch configured to switch a terminal of an inductor according to an operation signal during a normal operation period, such that the terminal of the inductor is switched between an output voltage and ground level; and a power line switch connected in series to the inductor between the input voltage and the output voltage. The power line switch is turned OFF when the output voltage is short to ground level, to prevent a short current from flowing from input voltage to ground level. The control circuit generates the operation signal according to the output voltage and determines whether the power line switch is P-type or N-type MOS device, so as to turn OFF the power line switch when the output voltage is short to ground level.Type: ApplicationFiled: July 25, 2023Publication date: February 29, 2024Inventors: Pao-Hsun Yu, Shei-Chie Yang, Yuan-Yen Mai, Cheng-Hung Hsu
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Patent number: 11917716Abstract: To more efficient sidelink communications, methods, apparatuses, and computer program products are provided. An example method of a first wireless device operating includes transmitting a sidelink discovery probing message comprising at least a first identifier of the first sidelink device. The example method further includes monitoring for a probing response from a second sidelink device. The example method further includes transmitting a sidelink discovery message if the first sidelink device receives the probing response from the second sidelink device. The example method further includes skipping transmitting the sidelink discovery message if the first sidelink device does not receive the probing response from the second sidelink device.Type: GrantFiled: December 10, 2020Date of Patent: February 27, 2024Assignee: QUALCOMM IncorporatedInventors: Hung Dinh Ly, Seyedkianoush Hosseini, Wei Yang, Wanshi Chen, Juan Montojo
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Patent number: 11914302Abstract: A lithography method in semiconductor fabrication is provided. The method includes generating a plurality of drops of a target material through a plurality of nozzles, adjacent two of the plurality of nozzles having a distance less than a width of a first one of the adjacent two of the plurality of nozzles, wherein the plurality of drops are aggregated to an elongated droplet; generating a laser pulse to convert the elongated droplet into plasma that generates an extreme ultraviolet (EUV) radiation; exposing a semiconductor substrate to the EUV radiation.Type: GrantFiled: January 31, 2022Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chi-Hung Liao, Yueh-Lin Yang
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Publication number: 20240064590Abstract: A method for automatically measuring a handover performance in a multi-cell environment includes: by a base station device, transmitting a radio frequency (RF) signal; rotating by one full rotation; receiving a first measurement dataset from a user equipment (UE); obtaining a first trigger value and a second trigger value based on the first measurement dataset, and calculating a third trigger value based on the second trigger value and a preset third event offset value; transmitting a plurality of RF signals; rotating by a preset angle with a preset angular velocity; receiving a second measurement dataset from the UE; transmitting a command to the UE to perform a handover process; and measuring a plurality of results associated with the handover process. The results include a handover time during which the handover process is implemented and completed, and a success rate of the handover process.Type: ApplicationFiled: August 15, 2023Publication date: February 22, 2024Applicant: Alpha Networks Inc.Inventors: Shih-Fang Ao, An-Cheng Tseng, Jen-Hung Yang
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Publication number: 20240045333Abstract: The disclosed subject matter relates to resist compositions that include the following components: Component a) a blend of two Novolak polymers having structures (I) and (II); component b) a diazo-naphthoquinone sulfonate (DNQ-PAC) component which is a single material or a mixture of materials having general formula having structure (III) or having general formula (III-1); is a dissolution enhancer component comprising a polyphenolic compound which is a single compound or a mixture of at least two compounds selected from the group consisting of an oligomeric fractionated Novolak, a compounds having general structure (VI) and a compound having general structure (VII), wherein Rde1, Rde2, Rde3, Rde4 and Rde5 are individually selected from a C-1 to C-4 alkyl; component d) a surfactant; and component e) an organic spin casting solvent, and an optional component f) a heterocyclic thiol.Type: ApplicationFiled: January 5, 2022Publication date: February 8, 2024Inventors: Hung-Yang CHEN, Kun SI, Chunwei CHEN, Zhong LI, Hengpeng WU
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Publication number: 20240048087Abstract: A photovoltaic metal roofing system includes a first corrugated sheet, a second corrugated sheet, a first solar panel and a second solar panel. The first corrugated sheet has a first bottom plate, a first bearing plate and a second bearing plate. The first bearing plate and the second bearing plate locate at two sides of the first bottom plate. The second corrugated sheet has a second bottom plate, a third bearing plate and a fourth bearing plate. The third bearing plate and the fourth bearing plate locate at two sides of the second bottom plate. The second bearing plate and the third bearing plate are bonded together and partially integrated to define a connecting structure. The first solar panel locates on the first bearing plate and the second bearing plate. The second solar panel locates on the third bearing plate and the fourth bearing plate.Type: ApplicationFiled: June 15, 2023Publication date: February 8, 2024Inventors: Li-Wei CHANG, Chia-Hsien HSUEH, HUng-Yang LIN
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Publication number: 20240048255Abstract: A method for estimating distribution of wireless signal strength, selecting measuring locations to measure wireless signal strength and compensating estimated wireless signal strength is provided, wherein the method for estimating distribution of wireless signal strength estimates the wireless signal strength at an estimation location in accordance with a plurality of single-reflection paths started from a signal emitter, the method for selecting position for measuring wireless signal strength determines whether a signal measuring process should be performed at the specific location, and the method for compensating estimated wireless signal strength compensates an estimated wireless signal strength near a specific location in accordance with a signal strength value measured at the specific location.Type: ApplicationFiled: July 20, 2023Publication date: February 8, 2024Inventors: CHIA-SHUO YEH, CHIEN-HSIANG CHEN, JEN-HUNG YANG, SHIH-FANG AO
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Publication number: 20240026975Abstract: A sealing member includes a monolithic body including a first portion adjoining a second portion. The first portion forms part of a circle. The second portion includes first and second lobes. Each lobe adjoins the first portion with a concave surface. In one example, each lobe includes a rounded tip, and a convex surface extends from one rounded tip to the other rounded tip.Type: ApplicationFiled: June 28, 2023Publication date: January 25, 2024Inventors: Yao-Hung YANG, Chih-Yang CHANG, Sam Hyungsam KIM
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Patent number: 11881392Abstract: A lamp and epitaxial processing apparatus are described herein. In one example, the lamp includes a bulb, a filament, and a plurality of filament supports disposed in spaced-apart relation to the filament, each of the filament supports having a hook support and a hook. The hook includes a connector configured to fasten the hook to the hook support, a first vertical portion extending from the connector toward the filament, and a rounded portion extending from an end of the first vertical portion distal from the connector and configured to wrap around the filament. A second vertical portion extends from an end of the rounded portion distal from the first vertical portion and the second vertical portion has a length between 60% and 100% of the length of the first vertical portion.Type: GrantFiled: May 11, 2023Date of Patent: January 23, 2024Assignee: Applied Materials, Inc.Inventors: Yao-Hung Yang, Shantanu Rajiv Gadgil, Kaushik Rao, Vincent Joseph Kirchhoff, Sagir Kadiwala, Munirah Mahyudin, Daniel Chou
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Publication number: 20240023382Abstract: An organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. Voltage may be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layers may allow leakage current to pass between neighboring anodes in the display. To reduce leakage current and the accompanying cross-talk in a display, a cutting structure may disrupt continuity of the OLED layers. The cutting structure may have two undercuts to disrupt continuity of at least some of the OLED layers. The cutting structure may include a conductive portion that provides a cathode voltage to a cathode layer for the OLED pixels.Type: ApplicationFiled: September 28, 2023Publication date: January 18, 2024Inventors: Siddharth Harikrishna Mohan, Gwanwoo Park, Ping Kuen Daniel Tsang, Pei Yin, Weixin Li, Li-An Liu, Alexandru Riposan, Teruo Sasagawa, Steven J Brewer, Younggu Lee, Mitsuhiro Kashiwabara, Rui Liu, Hung-Yi Tsai, Tien-Pei Chou, Yi Wen Wang, Mahendra Chhabra, Chieh Hung Yang, Bhadrinarayana Lalgudi Visweswaran, David K. Schoenwald