Patents by Inventor Hye-Young Choi

Hye-Young Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8198631
    Abstract: Disclosed is a method of fabricating a display device that includes forming a buffer layer; forming a gate electrode of extrinsic polycrystalline silicon, a gate insulating layer, an active layer of intrinsic polycrystalline silicon and an auxiliary active layer of intrinsic amorphous silicon on the buffer layer; forming an ohmic contact layer of extrinsic amorphous silicon and contacting the auxiliary active layer, source and drain electrodes and a data line; patterning a first passivation layer, an insulating interlayer and the gate insulating layer to form a gate contact hole exposing the gate electrode; forming a gate line on the first passivation layer, made of a metal material, and contacting the gate electrode through the gate contact hole; forming a second passivation layer on the gate line; patterning the first and second passivation layers to form a drain contact hole exposing the drain electrode; and forming a pixel electrode on the second passivation layer in the pixel region and contacting the dr
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: June 12, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: Hee-Dong Choi, Hye-Young Choi, Jun-Min Lee
  • Patent number: 8018143
    Abstract: A method of manufacturing an organic electroluminescent display device includes forming a first electrode on a first substrate including a plurality of pixel regions; forming a patterned spacer on the first electrode in the pixel region; forming an organic light emitting layer on the first electrode in the pixel region and on the patterned spacer; forming a second electrode on the organic light emitting layer; forming a calcium oxide layer on the second electrode; forming a moisture-absorbing layer on the calcium oxide layer; forming a driving thin film transistor on a second substrate; and forming a connection electrode connected to the driving thin film transistor, the connection electrode contacting the second electrode on the patterned spacer.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: September 13, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Byoung-June Lee, Jung-Han Park, Hyun-Taek Lim, Won-Hee Choi, Hye-Young Choi
  • Publication number: 20110157767
    Abstract: A multilayer ceramic capacitor is provided. In the multilayer ceramic capacitor, a plurality of first and second inner electrodes are formed inside a ceramic sintered body. Ends of the first and second inner electrodes are alternately exposed to both ends of the ceramic sintered body. First and second outer electrodes are formed on both ends of the ceramic sintered body and connected to the first and second inner electrodes. The first and second outer electrodes include a first region having a porosity in the range of 1% to 10%, and a second region having a porosity less than that of the first region.
    Type: Application
    Filed: September 15, 2010
    Publication date: June 30, 2011
    Inventors: Kang Heon HUR, Sang Hoon Kwon, Doo Young Kim, Eun Sang Na, Byung Gyun Kim, Seok Joon Hwang, Kyoung Jin Jun, Hye Young Choi
  • Publication number: 20110141658
    Abstract: Disclosed is a multilayer ceramic capacitor. The multilayer ceramic capacitor includes a sintered ceramic body, a plurality of first internal electrodes and a plurality of second internal electrodes formed inside the sintered ceramic body, the first and second internal electrodes having ends alternately and respectively exposed to side surfaces of the sintered ceramic body, and first and second external electrodes formed on the side surfaces of the ceramic body and electrically connected to the first and second internal electrodes, the first and second external electrodes each including a plurality of pores with an average pore size of 2 ?m to 5 ?m and having a porosity of 2% to 10%.
    Type: Application
    Filed: August 6, 2010
    Publication date: June 16, 2011
    Inventors: Eun Sang NA, Doo Young Kim, Byung Gyun Kim, Hyun Tae Kim, Kyoung Jin Jun, Mi Young Kim, Hye Young Choi
  • Publication number: 20110108846
    Abstract: Disclosed is array substrate including a pixel region having a switching region, a driving region and a storage region. A switching TFT in the switching region includes a first gate electrode, a first gate insulating layer, a switching active layer on the first gate insulating layer, a switching source electrode on a first switching ohmic contact layer, and a switching drain electrode on a second switching ohmic contact layer; a driving TFT in the driving region is connected to the switching TFT and includes a first gate electrode, a second gate insulating layer, a driving active layer on the second gate insulating layer, a driving source electrode on a first driving ohmic contact layer, and a driving drain electrode on a second driving ohmic contact layer; wherein at least one of the switching and driving TFTs further includes a second gate electrode over the switching or driving active layers.
    Type: Application
    Filed: July 2, 2010
    Publication date: May 12, 2011
    Inventors: Hee-Dong Choi, Hye-Young Choi, Doo-Seok Yang
  • Publication number: 20110018000
    Abstract: Disclosed is a method of fabricating a display device that includes forming a buffer layer; forming a gate electrode of extrinsic polycrystalline silicon, a gate insulating layer, an active layer of intrinsic polycrystalline silicon and an auxiliary active layer of intrinsic amorphous silicon on the buffer layer; forming an ohmic contact layer of extrinsic amorphous silicon and contacting the auxiliary active layer, source and drain electrodes and a data line; patterning a first passivation layer, an insulating interlayer and the gate insulating layer to form a gate contact hole exposing the gate electrode; forming a gate line on the first passivation layer, made of a metal material, and contacting the gate electrode through the gate contact hole; forming a second passivation layer on the gate line; patterning the first and second passivation layers to form a drain contact hole exposing the drain electrode; and forming a pixel electrode on the second passivation layer in the pixel region and contacting the dr
    Type: Application
    Filed: June 10, 2010
    Publication date: January 27, 2011
    Inventors: Hee-Dong CHOI, Hye-Young Choi, Jun-Min Lee
  • Publication number: 20100289023
    Abstract: A method of fabricating an array substrate for a display device includes: forming a buffer layer on a substrate having a pixel region; sequentially forming a gate electrode of impurity-doped polycrystalline silicon, a gate insulating layer and an active layer of intrinsic polycrystalline silicon on the buffer layer in the pixel region; forming an interlayer insulating layer of an inorganic insulating material on the active layer; sequentially forming a source barrier pattern, a source ohmic contact layer and a source electrode on the interlayer insulating layer, sequentially forming a drain barrier pattern, a drain ohmic contact layer and a drain electrode on the interlayer insulating layer, and sequentially forming a first dummy pattern, a second dummy pattern and a data line on the interlayer insulating layer; forming a first passivation layer on a surface of the interlayer insulating layer including the source electrode, the drain electrode and the data line formed thereon; forming a gate line on the first
    Type: Application
    Filed: December 23, 2009
    Publication date: November 18, 2010
    Inventors: Hee-Dong Choi, Ki-Sul Cho, Hye-Young Choi, Doo-Seok Yang, Byeong-Gyu Roh
  • Publication number: 20100001633
    Abstract: A method of manufacturing an organic electroluminescent display device includes forming a first electrode on a first substrate including a plurality of pixel regions; forming a patterned spacer on the first electrode in the pixel region; forming an organic light emitting layer on the first electrode in the pixel region and on the patterned spacer; forming a second electrode on the organic light emitting layer; forming a calcium oxide layer on the second electrode; forming a moisture-absorbing layer on the calcium oxide layer; forming a driving thin film transistor on a second substrate; and forming a connection electrode connected to the driving thin film transistor, the connection electrode contacting the second electrode on the patterned spacer.
    Type: Application
    Filed: December 11, 2008
    Publication date: January 7, 2010
    Inventors: Byoung-June Lee, Jung-Han Park, Hyun-Taek Lim, Won-Hee Choi, Hye-Young Choi
  • Patent number: 7118937
    Abstract: The present invention relates to a method of selectively depositing an organic semiconductor material and a method of manufacturing an organic semiconductor thin film transistor array. Since the thin film transistor array is formed by locally performing a plasma process on a substrate before depositing an organic semiconductor active layer on the substrate, the organic semiconductor material is deposited on only the organic semiconductor active layer having an island shape. Therefore, it is not necessary to use a shadow mask method or a photolithography method to manufacture an active matrix array. Accordingly, the present invention has advantages in that it is possible to obtain a high resolution thin film transistor array and to prevent characteristics of the thin film transistors in the array from being deteriorated.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: October 10, 2006
    Inventors: Jin Jang, Sung-Hwan Kim, Hye-Young Choi
  • Publication number: 20050176185
    Abstract: The present invention relates to a method of selectively depositing an organic semiconductor material and a method of manufacturing an organic semiconductor thin film transistor array. Since the thin film transistor array is formed by locally performing a plasma process on a substrate before depositing an organic semiconductor active layer on the substrate, the organic semiconductor material is deposited on only the organic semiconductor active layer having an island shape. Therefore, it is not necessary to use a shadow mask method or a photolithography method to manufacture an active matrix array. Accordingly, the present invention has advantages in that it is possible to obtain a high resolution thin film transistor array and to prevent characteristics of the thin film transistors in the array from being deteriorated.
    Type: Application
    Filed: July 1, 2004
    Publication date: August 11, 2005
    Inventors: Jin Jang, Sung-Hwan Kim, Hye-Young Choi