Patents by Inventor Hyeon Cho

Hyeon Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7505521
    Abstract: A data transmission system and method characterized by the use of multiple differential output amplifiers to transmits differential data signals that vary in accordance with control signals derived from a reference data output strobe signal, and multiple differential amplifiers to receive the differential data signals and detect such variations to generate a data input strobe signal corresponding to the data output strobe signal.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: March 17, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Hyeon Cho, Jae-Jun Lee, Jong-Hoon Kim, Byung-Se So
  • Patent number: 7499258
    Abstract: The invention provides an embedded multilayer chip capacitor, and a printed circuit board having the same. The embedded multilayer chip capacitor has a capacitor body having a plurality of dielectric layers stacked one on another; a plurality of first and second internal electrodes formed inside the capacitor body, separated by the dielectric layers; and first and second vias extended vertically inside the capacitor body. The first via is connected to the first internal electrodes and the second via is connected to the second internal electrodes. The first via is led to a bottom of the capacitor body and the second via is led to a top of the capacitor body.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: March 3, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chang Hoon Shim, Jin Yong An, Suk Hyeon Cho, Sung Hyung Kang
  • Patent number: 7485569
    Abstract: A printed circuit board having embedded chips, composed of a central layer having an embedded chip, an insulating layer formed on one surface or both surfaces of the central layer and having a via hole filled with conductive ink, and a circuit layer formed on the insulating layer and having a via hole and a circuit pattern electrically connected to the chip of the central layer through the via hole of the insulating layer. In addition, a method of fabricating a printed circuit board including embedded chips is provided.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: February 3, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chang Sup Ryu, Doo Hwan Lee, Jin Yong Ahn, Myung Sam Kang, Suk Hyeon Cho
  • Publication number: 20080314621
    Abstract: A parallel chip embedded printed circuit board and manufacturing method thereof are disclosed. With a method of manufacturing a parallel chip embedded printed circuit board, comprising: (a) forming a parallel chip by connecting in parallel a plurality of unit chips having electrodes or electrically connected members formed on the upper and lower surfaces thereof, using at least one conductive member; (b) joining an electrode on one side of the parallel chip to a first board; and (c) joining an electrode on the other side of the parallel chip to a second board, chips may be embedded in a printed circuit board at a low cost, as a plurality of unit chips can be embedded at once, and a mechanical drill or router can be used instead of a laser drill in perforating the cavity or via holes.
    Type: Application
    Filed: June 13, 2008
    Publication date: December 25, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin-Yong Ahn, Chang Sup Ryu, Suk Hyeon Cho, Joon Sung Kim, Han Seo Cho
  • Publication number: 20080198552
    Abstract: A package board and a method for the manufacturing of the package board are disclosed. A package board, which includes a first metal layer, a heat-release layer stacked on the first metal layer with a first insulation layer interposed in-between, a cavity formed in the heat-release layer, a mounting layer formed in the cavity in contact with the first insulation layer, a first component mounted on the mounting layer, and a second insulation layer covering at least a portion of the heat-release layer and the cavity, may offer improved heat release and smaller thickness.
    Type: Application
    Filed: January 30, 2008
    Publication date: August 21, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk-Hyeon Cho, Je-Gwang Yoo, Min-Sang Lee, Seon-Goo Lee, Han-Seo Cho
  • Patent number: 7378326
    Abstract: A printed circuit board having embedded capacitors includes a double-sided copper-clad laminate including first circuit layers formed in the outer layers thereof, the first circuit layers including bottom electrodes and circuit patterns; dielectric layers formed by depositing alumina films on the first circuit layers by atomic layer deposition; second circuit layers formed on the dielectric layers and including top electrodes and circuit patterns; one-sided copper-clad laminates formed on the second circuit layers; blind via-holes and through-holes formed in predetermined portions of the one-sided copper-clad laminates; and plating layers formed in the blind via-holes and the through-holes. The manufacturing method of the printed circuit board is also disclosed.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: May 27, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin Yong Ahn, Cheol Seong Hwang, Sung Kun Kim, Chang Sup Ryu, Suk Hyeon Cho, Ho Sik Jeon
  • Patent number: 7355092
    Abstract: Genetic vaccine which comprises plasmid(s) containing genes coding for antigens of enterotoxigenic Escherichia coli (ETEC) strains is disclosed. Additionally, plasmids may consist of multiple copies of the same antigen (i.e. K88 or K99 fimbrial antigen) or multiple antigens (ie. K88 and K99 fimbrial antigens) and genetic adjuvants such as cytokines (IL-2, IL-4 & GM-CSF), costimulatory molecules (CD80 & CD86) or chemokines or immunostimulatory sequences. A method for isolating antibodies from chicken egg yolk for passive immunization of animals, as well as humans to control diarrhoeal diseases using the genetic vaccines is also disclosed.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: April 8, 2008
    Inventors: Ronald Marquardt, Suk-Hyeon Cho, Peter Loewen, Srinivasa Madhyastha
  • Patent number: 7351915
    Abstract: A printed circuit board (PCB) having at least one embedded capacitor and a method of fabricating the same is provided. A dielectric layer is formed using a ceramic material having a high capacitance, thereby assuring that the capacitors each have a high dielectric constant corresponding to the capacitance of a decoupling chip capacitor.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: April 1, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin-Yong Ahn, Chang-Sup Ryu, Suk-Hyeon Cho, Seok-Kyu Lee, Jong-Kuk Hong, Ho-Sik Jun
  • Patent number: 7350120
    Abstract: A buffered memory module includes a buffer circuit mounted and a plurality of memory devices mounted on the first surface of the board, the memory devices being electrically connected to the buffer circuit. The memory module also includes a plurality of test pads located on a second surface of the board and electrically connected to the buffer circuit.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: March 25, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Hyeon Cho, Byung-Se So, Jae-Jun Lee
  • Publication number: 20080055863
    Abstract: A method of manufacturing an optical component embedded printed circuit board is disclosed. An optical component embedded printed circuit board that includes a metal core in which at least one cavity is formed, an optical component embedded in the cavity, a first insulation layer stacked on one side of the metal core, a second insulation layer stacked on the other side of the metal core, and a circuit pattern which is formed on the first insulation layer and which is electrically connected with the optical component, provides a thin printed circuit board having a superb heat releasing effect.
    Type: Application
    Filed: September 5, 2007
    Publication date: March 6, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk-Hyeon Cho, Je-Gwang Yoo, Byung-Moon Kim, Han-Seo Cho
  • Publication number: 20080000680
    Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same, which can achieve reliable heat resistance because heat radiation characteristics are improved, and processing costs of which are reduced because processing times are shortened.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 3, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Hyeon Cho, Byoung Youl Min, Je Gwang Yoo, Hae Nam Seo, Byung Moon Kim, Ji Hong Jo, Han Seo Cho
  • Publication number: 20070261427
    Abstract: An icemaker in a refrigerator is disclosed, by which heat generated from a heater to detach ice is prevented from being transferred to an inside of the refrigerator. The present invention includes an icemaker body provided to a prescribed position of the refrigerator to make to ice from a supplied water, a heater provided to the icemaker body to generate heat to facilitate detachment of the made ice, and a heater shielding unit provided to prevent the heat generated from the heater from being supplied to an inside of the refrigerator.
    Type: Application
    Filed: May 11, 2007
    Publication date: November 15, 2007
    Applicant: LG ELECTRONICS INC.
    Inventors: Jong KIM, Oh KWON, You PARK, Young GWAK, Hyeon CHO, Bon KOO, Myung KIM
  • Patent number: 7282394
    Abstract: A method of fabricating a printed circuit board (PCB) including embedded chips, composed of forming a hollow portion for chip insertion through a substrate, inserting the chip into the hollow portion, fixing the chip to the substrate by use of a plating process to form a central layer having an embedded chip, and then laminating a non-cured resin layer and a circuit layer having a circuit pattern on the central layer. Also, a PCB including embedded chips fabricated using the above method is provided.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: October 16, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk Hyeon Cho, Chang Sup Ryu, Doo Hwan Lee
  • Patent number: 7276786
    Abstract: Embodiments of the invention include a stacked board-on-chip (BOC) package having a mirroring structure and a dual inline memory module (DIMM) on which the stacked BOC package is mounted. A bottom surface of a first semiconductor chip faces a bottom surface of a second semiconductor chip. An interposer electrically connects first and second packages, respectively comprising the first and second semiconductor chips, to each other. The DIMM is obtained by electrically connecting BOC packages to each other on upper and lower substrates of a printed circuit board. Since a height of the stacked BOC packages is greater than a height of a conventional stacked BOC package, the DIMM has a minimum stub length and an optimal topology. Hence, the DIMM can have a signal with excellent fidelity by reducing a load upon a signal line, and installation or wiring of components within the DIMM 300 requires less effort.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: October 2, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Hyeon Cho, Jung-Joon Lee, Do-Hyung Kim, Byung-Se So
  • Publication number: 20070146980
    Abstract: Disclosed is a PCB including embedded capacitors and a method of fabricating the same. A dielectric layer is formed using a ceramic material having a high capacitance, thereby assuring that the capacitors each have a high dielectric constant corresponding to the capacitance of a decoupling chip capacitor.
    Type: Application
    Filed: March 2, 2007
    Publication date: June 28, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin-Yong Ahn, Chang-Sup Ryu, Suk-Hyeon Cho, Seok-Kyu Lee, Jong-Kuk Hong, Ho-Sik Jun
  • Patent number: 7227258
    Abstract: Embodiments of the present invention may include an integrated circuit module structure for a high-density mounting. An embodiment may include a wiring board, having a mounting space with a mounting length determined in a first direction and a mounting width determined in a second direction, on at least one surface thereof, and a plurality of integrated circuit packages having a package mounting combination length longer than the mounting length of the wiring board. An embodiment may also have some packages among the plurality of integrated circuit packages mounted directly on the mounting space, while other packages are mounted indirectly on the mounting space. The present embodiment may have packages that are overlapped horizontally and vertically distant from one another. Embodiments allow a plurality of chips or packages to be mounted in a limited area without changing a form factor of integrated circuit module even when integrated circuit chip or package size increases.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: June 5, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Hyeon Cho, Byung-Se So, Jin-Kyu Chang
  • Publication number: 20070111380
    Abstract: A method of fabricating a printed circuit board having embedded components is disclosed. The method of fabricating a printed circuit board having embedded components according to an embodiment of the present invention comprises stacking a first conductive layer and a second conductive layer on a substrate in order, forming a hole in the second conductive layer and filling with dielectric material, stacking a third conductive layer on the second conductive layer and removing portions to form an upper electrode located on the dielectric material and a pad electrically connected with the first conductive layer, and stacking an insulation layer on the third conductive layer and forming a via hole and an outer layer circuit electrically connected with the upper electrode and the pad, so that it is easy to process the dielectric material to have a uniform thickness, and the capacitor and the resistor can be implemented simultaneously.
    Type: Application
    Filed: November 13, 2006
    Publication date: May 17, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk-Hyeon Cho, Chang-Sup Ryu, Han-Seo Cho, Han Kim
  • Patent number: 7180327
    Abstract: For ODT (on-die termination) control within a memory module system, just one pin from the memory controller is used for sending command signals indicating an activated one of the memory devices. The activated memory device includes components that are turned on for generating the ODT control signal for controlling an ODT circuit of inactivated memory device(s). The components for generating an ODT control signal within the inactivated memory devices are turned off for minimized power consumption.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: February 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Se So, Jeong-Hyeon Cho, Jae-Jun Lee
  • Patent number: 7169707
    Abstract: Disclosed herein is a method of manufacturing a package substrate with a fine circuit pattern using anodic oxidation. By anodizing a metal core which is opened through a masking process, oxidation layers are formed in open areas of the metal core to insulate portions of circuit pattern from each other. Further, by electroplating portions provided between the oxidation layers with copper or filling conductive paste between the oxidation layers using a screen, a package substrate having a fine circuit pattern is achieved.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: January 30, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Duck Young Maeng, Byung Kook Sun, Tae Hoon Kim, Jee Soo Mok, Jong Suk Bae, Yoong Oh, Chang-Kyu Song, Suk-Hyeon Cho
  • Publication number: 20070007636
    Abstract: A parallel chip embedded printed circuit board and manufacturing method thereof are disclosed. With a method of manufacturing a parallel chip embedded printed circuit board, comprising: (a) forming a parallel chip by connecting in parallel a plurality of unit chips having electrodes or electrically connected members formed on the upper and lower surfaces thereof, using at least one conductive member; (b) joining an electrode on one side of the parallel chip to a first board; and (c) joining an electrode on the other side of the parallel chip to a second board, chips may be embedded in a printed circuit board at a low cost, as a plurality of unit chips can be embedded at once, and a mechanical drill or router can be used instead of a laser drill in perforating the cavity or via holes.
    Type: Application
    Filed: June 27, 2006
    Publication date: January 11, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin-Yong Ahn, Chang Ryu, Suk-Hyeon Cho, Joon Kim, Han Cho