Patents by Inventor Hyun Han

Hyun Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220352461
    Abstract: A semiconductor device according to an embodiment includes a substrate, a source electrode layer and a drain electrode layer that are disposed to be spaced apart from each other on the substrate, an active layer disposed on the substrate to contact the source electrode layer and the drain electrode layer, and a gate electrode layer disposed on the active layer. The active layer includes metal oxide capable of exsolving and reincorporating metal particles. The electrical resistance in the active layer is configured to be reversibly changed by exsolution and reincorporation of the metal particles.
    Type: Application
    Filed: October 8, 2021
    Publication date: November 3, 2022
    Inventors: Won Tae KOO, Jae Hyun HAN, Jae Gil LEE
  • Patent number: 11482667
    Abstract: A nonvolatile memory device according to an embodiment includes a substrate, a resistance change layer disposed over the substrate, a gate insulation layer disposed on the resistance change layer, a gate electrode layer disposed on the gate insulation layer, and a first electrode pattern layer and a second electrode pattern layer that are disposed respectively over the substrate and disposed to contact a different portion of the resistance change layer.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: October 25, 2022
    Inventors: Jae Hyun Han, Hyangkeun Yoo, Se Ho Lee
  • Publication number: 20220336497
    Abstract: A semiconductor device according to an embodiment of the present disclosure includes a substrate, a gate structure disposed over the substrate, a dielectric structure disposed to contact a sidewall surface of the gate structure over the substrate, and a channel layer disposed on a sidewall surface of the dielectric structure over the substrate. The gate structure includes a gate electrode layer and an interlayer insulation structure which are alternately stacked. The interlayer insulation structure includes a metal-organic framework layer.
    Type: Application
    Filed: September 10, 2021
    Publication date: October 20, 2022
    Applicant: SK hynix Inc.
    Inventors: Won Tae KOO, Jae Hyun HAN, Se Ho LEE
  • Publication number: 20220336788
    Abstract: A lithium secondary battery comprises a cathode formed from a cathode active material including a first cathode active material particle and a second cathode active material particle, an anode and a separator interposed between the cathode and the anode. The first cathode active material particle includes a lithium metal oxide including a continuous concentration gradient in at least one region between a central portion and a surface portion. The second cathode active material particle includes a constant concentration composition.
    Type: Application
    Filed: May 9, 2022
    Publication date: October 20, 2022
    Inventors: Duck Chul HWANG, Kyung Bin YOO, Kook Hyun HAN
  • Publication number: 20220328490
    Abstract: A method of manufacturing a semiconductor device comprises: forming a first array including a first bit line extending in a first direction, a first word line extending in a second direction intersecting the first direction, and a first transistor being located at a first intersection of the first word line and the first bit line, the first transistor being connected to the first word line and the first bit line; forming a first capacitor electrically connected to the first transistor, the first capacitor being located at a first part of the first intersection; and forming a second capacitor located at a second part of the first intersection.
    Type: Application
    Filed: June 17, 2022
    Publication date: October 13, 2022
    Inventor: Jae Hyun HAN
  • Patent number: 11469272
    Abstract: A nonvolatile memory device according to an embodiment includes a substrate, a gate electrode structure disposed on the substrate, a gate dielectric layer covering at least a portion of a sidewall surface of the gate electrode structure on the substrate, a channel layer and a resistance change structure that are sequentially disposed on the gate dielectric layer, and a plurality of bit line structures disposed inside the resistance change structure.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: October 11, 2022
    Assignee: SK hynix Inc.
    Inventors: Jae Hyun Han, Hyangkeun Yoo, Se Ho Lee
  • Publication number: 20220320305
    Abstract: A semiconductor memory device includes a channel layer, a gate electrode spaced apart from the channel layer, a blocking insulating layer between the gate electrode and the channel layer, a tunnel insulating layer between the channel layer and the blocking insulating layer, and nano-particles spaced apart from each other between the tunnel insulating layer and the blocking insulating layer.
    Type: Application
    Filed: September 23, 2021
    Publication date: October 6, 2022
    Applicant: SK hynix Inc.
    Inventors: Jae Hyun HAN, Won Tae KOO
  • Publication number: 20220320575
    Abstract: A cathode active material for a lithium secondary battery includes a lithium-transition metal composite oxide particle having a single particle shape, and a first coating layer formed on a surface of the lithium-transition metal composite oxide particle. The first coating layer includes a La—Zr—O compound. Life-span and capacity properties are improved by a combination of the lithium-transition metal composite oxide particle having the single particle shape and the first coating layer formed thereon.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 6, 2022
    Inventors: Yeong Bin Yoo, Ji Hoon Choi, Kook Hyun Han, Hee Jun Kweon
  • Publication number: 20220311006
    Abstract: A cathode active material for a lithium secondary battery according to an embodiment of the present invention includes a lithium-transition metal composite oxide particle having a single particle shape, and a first coating layer formed on a surface of the lithium-transition metal composite oxide particle. The first coating layer includes a Sr—Zr—O compound. Life-span and capacity properties are improved by a combination of the lithium-transition metal composite oxide particle having the single particle shape and the first coating layer formed thereon.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 29, 2022
    Inventors: Hee Jun Kweon, Yeong Bin Yoo, Ji Hoon Choi, Kook Hyun Han
  • Patent number: 11456318
    Abstract: A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, and a gate structure disposed over the substrate. The gate structure includes at least one gate electrode layer pattern and at least one gate insulation layer pattern, which are alternately stacked along a first direction perpendicular to the upper surface. The gate structure extends in a second direction perpendicular to the first direction. The nonvolatile memory device includes a ferroelectric layer disposed on at least a portion of one sidewall surface of the gate structure. The one sidewall surface of the gate structure forms a plane substantially parallel to the first and second directions. The nonvolatile memory device includes a channel layer disposed on the ferroelectric layer, and a source electrode structure and a drain electrode structure disposed to contact the channel layer and spaced apart from each other in the second direction.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: September 27, 2022
    Assignee: SK hynix Inc.
    Inventors: Jae Hyun Han, Jae Gil Lee, Hyangkeun Yoo, Se Ho Lee
  • Publication number: 20220298385
    Abstract: An adhesive film has an average slope of about ?9.9 to about 0, as measured over a temperature range of about ?20° C. to about 80° C. in a graph depicting a temperature-dependent storage modulus distribution of the adhesive film where the x-axis represents temperature (° C.) and the y-axis represents storage modulus (kPa). The adhesive film also has a storage modulus at about 80° C. of about 10 kPa to about 1,000 kPa.
    Type: Application
    Filed: February 28, 2022
    Publication date: September 22, 2022
    Inventors: Ji Ho KIM, Hyung Rang MOON, II Jin KIM, Byeong Do KWAK, Jee Hee KIM, Sung Hyun MUN, Seon Hee SHIN, Gwang Hwan LEE, Woo Jin LEE, Eun Hwa LEE, lk Hwan CHO, Jae Hyun HAN
  • Publication number: 20220293935
    Abstract: Provided is a method of manufacturing a cathode active material for a lithium secondary battery. The method of manufacturing a cathode active material for a lithium secondary battery includes mixing a transition metal macro precursor and a lithium precursor to prepare a preliminary lithium-transition metal composite oxide particle; calcining the prepared preliminary lithium-transition metal composite oxide particle; and pulverizing the calcined preliminary lithium-transition metal composite oxide particle to form lithium-transition metal composite oxide particle. Accordingly, the process may be easily performed and a single crystal cathode active material having a uniform size may be manufactured.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 15, 2022
    Inventors: Kook Hyun Han, Ji Hoon Choi, Jik Soo Kim, Kwang Ho Lee
  • Publication number: 20220285390
    Abstract: A semiconductor memory device includes a tunnel insulating layer, a data storage layer, and a blocking insulating layer that are sequentially disposed. The tunnel insulating layer includes Metal Organic Frameworks (MOF) having a lower dielectric constant than a dielectric constant of the blocking insulating layer.
    Type: Application
    Filed: August 18, 2021
    Publication date: September 8, 2022
    Applicant: SK hynix Inc.
    Inventors: Jae Hyun HAN, Won Tae KOO
  • Patent number: 11437077
    Abstract: Provided herein may be a semiconductor device. The semiconductor device may include a stack including word lines, a bit line penetrating the stack, a global bit line disposed above the stack, global word lines disposed above the stack, a common select line disposed above the stack, a first contact plug coupling the global bit line and the bit line to each other and penetrating the common select line, and second contact plugs coupling the global word lines and the word lines to each other respectively and penetrating the common select line.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: September 6, 2022
    Assignee: SK hynix Inc.
    Inventor: Jae Hyun Han
  • Publication number: 20220278132
    Abstract: A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, a source electrode structure disposed on the substrate, and a channel structure disposed over the substrate and disposed to contact one sidewall surface of the source electrode structure. In addition, the nonvolatile memory device includes a drain electrode structure disposed to contact one sidewall surface of the channel structure over the substrate. In addition, the nonvolatile memory device includes a plurality of ferroelectric structures extending in a first direction perpendicular to the substrate in the channel structure and disposed to be spaced apart from each other along the second direction perpendicular to the first direction. In addition, the nonvolatile memory device includes a gate electrode structure disposed in each of the plurality of ferroelectric structure to extend along the first direction.
    Type: Application
    Filed: May 19, 2022
    Publication date: September 1, 2022
    Inventors: Jae Hyun HAN, Se Ho LEE, Hyangkeun YOO, Jae Gil LEE
  • Publication number: 20220271221
    Abstract: An electronic device includes a substrate, a source electrode layer and a drain electrode layer that are disposed to be spaced apart from each other over the substrate, a channel layer that is capable of receiving hydrogen, disposed between the source electrode layer and the drain electrode layer over the substrate, a proton conductive layer disposed on the channel layer, a hydrogen source layer disposed on the proton conductive layer, and a gate electrode layer disposed on the hydrogen source layer.
    Type: Application
    Filed: August 11, 2021
    Publication date: August 25, 2022
    Inventors: Won Tae KOO, Jae Hyun HAN
  • Publication number: 20220268924
    Abstract: The embodiments of the present disclosure relate to a radar device including an antenna unit including a transmission antenna for transmitting a transmission signal and a receiving antenna for receiving a reception signal reflected from a target, a signal processor configured to determine target direction information by using a phase difference between the reception signals received from the respective receiving antennas, and a controller configured to control to perform a first mode and a second mode for transmitting and receiving signals at different pulse repetition intervals, respectively.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 25, 2022
    Applicant: Mando Mobility Solutions Corporation
    Inventors: Jung Hwan CHOI, JinGu LEE, Han Byul LEE, Jae Hyun HAN
  • Publication number: 20220263072
    Abstract: A cathode active material for a lithium secondary battery according to exemplary embodiments of the present invention includes a lithium metal oxide particle core part and an organic compound coating layer which includes a functional group containing a sulfur atom. The cathode active material may suppress side reactions with an electrolyte while maintaining the stability of the layered structure of the lithium metal oxide particles, suppress a gelation phenomenon of the slurry during manufacturing a cathode, and maintain the high energy, high output and long life-span characteristics of the lithium secondary battery.
    Type: Application
    Filed: January 10, 2022
    Publication date: August 18, 2022
    Inventors: Jae Ho CHOI, Jik Soo KIM, Ji Hoon CHOI, Kook Hyun HAN
  • Patent number: 11417707
    Abstract: A nonvolatile memory device according to an embodiment includes a substrate and a gate structure disposed on the substrate. The gate structure includes at least one gate electrode layer and at least one interlayer insulation layer that are alternately stacked. In addition, the nonvolatile memory device includes a hole pattern penetrating the gate structure on the substrate, and a gate insulation layer, a first ion retention layer, a second ion retention layer, and a channel layer sequentially covering a sidewall surface of the gate electrode layer in the hole pattern. The first and second ion retention layers comprise ions exchangeable with each other.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: August 16, 2022
    Assignee: SK hynix Inc.
    Inventor: Jae Hyun Han
  • Publication number: 20220254413
    Abstract: A method of programming a nonvolatile memory device including a plurality of memory cells is provided. Each of the plurality of memory cells includes a reversible resistance device. A target memory cell is selected from among the plurality of memory cells. A target resistance state for the reversible resistance device of the target memory cell is determined. A resistance state of the reversible resistance device of the target memory cell is read. The read resistance state is compared with the target resistance state. One of a positive program operation and a negative program operation is performed for the reversible resistance device of the target memory cell when the read resistance state is different from the target resistance state.
    Type: Application
    Filed: July 7, 2021
    Publication date: August 11, 2022
    Inventor: Jae Hyun HAN