Patents by Inventor Hyun-Jin Cho
Hyun-Jin Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20090077642Abstract: The present invention relates to a method of embodying a cooperation system between SEND and IPSec in an IPv6 environment. The cooperation system between SEND and IPSec in accordance with the present invention includes: receiving an authentication completion report message including a first IP address of a host whose authentication is completed by the SEND; generating new authentication information corresponding to the host and storing the new authentication information in a temporary storage area, if authentication information for the host is not present in the temporary storage area, wherein the authentication information includes the first IP address; and if an authentication check request message including a second IP address is received from the IPSec, checking whether the second IP address is present in the temporary storage area, and sending the result of checking to the IPSec.Type: ApplicationFiled: February 29, 2008Publication date: March 19, 2009Applicant: SUNGKYUNKWAN UNIVERSITY FOUNDATION FOR CORPORATE COLLABORATIONInventors: Young-Ik EOM, Kwang-Sun Ko, Hyun-Su Jang, Hyun-jin Cho, Yong-Woo Jung, Hyun-Woo Choi, Gye-Hyeon Gyeong, Jung-Hwan Choi, Zhen Zhao, Tae-Hyoung Kim, Youn-Woo Kim
-
Patent number: 7504286Abstract: A method is provided for fabricating a memory device. A semiconductor substrate is provided which includes a first well region having a first conductivity type, a second well region having the first conductivity type, a first gate structure overlying the first well region and the second gate structure overlying the second well region. An insulating material layer is conformally deposited overlying exposed portions of the semiconductor substrate. Photosensitive material is provided over a portion of the insulating material layer which overlies a portion of the second well region. The photosensitive material exposes portions of the insulating material layer. The exposed portions of the insulating material layer are anisotropically etched to provide a sidewall spacer adjacent a first sidewall of the second gate structure, and an insulating spacer block formed overlying a portion of the second gate structure and adjacent a second sidewall of the second gate structure.Type: GrantFiled: March 28, 2007Date of Patent: March 17, 2009Assignee: Advanced Micro Devices, Inc.Inventor: Hyun-Jin Cho
-
Patent number: 7491586Abstract: A method of fabricating a thyristor-based memory may include forming different opposite conductivity-type regions in silicon for defining a thyristor and an access device in series relationship. An activation anneal may activate dopants previously implanted for the different regions. A damaging implant of germanium or xenon or argon may be directed into select regions of the silicon including at least one p-n junction region for the access device and the thyristor. A re-crystallization anneal may then be performed to re-crystallize at least some of the damaged lattice structure resulting from the damaging implant. The re-crystallization anneal may use a temperature less than that of the previous activation anneal.Type: GrantFiled: June 22, 2005Date of Patent: February 17, 2009Assignee: T-RAM Semiconductor, Inc.Inventors: Andrew E Horch, Hyun-Jin Cho, Farid Nemati, Scott Robins, Rajesh N. Gupta, Kevin J. Yang
-
Patent number: 7488626Abstract: In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.Type: GrantFiled: July 10, 2006Date of Patent: February 10, 2009Assignee: T-RAM Semiconductor, Inc.Inventors: Kevin J. Yang, Farid Nemati, Scott Robins, James D. Plummer, Hyun-Jin Cho
-
Patent number: 7460395Abstract: A new memory cell can contain only a single thyristor. There is no need to include an access transistor in the cell. In one embodiment, the thyristor is a thin capacitively coupled thyristor. The new memory cell can be connected to word, bit, and control lines in several ways to form different memory arrays. Timing and voltage levels of word, bit and control lines are disclosed.Type: GrantFiled: June 22, 2005Date of Patent: December 2, 2008Assignee: T-RAM Semiconductor, Inc.Inventors: Hyun-Jin Cho, Farid Nemati
-
Publication number: 20080268535Abstract: Disclosed herein is a method of inducing the differentiation of leukemia cells derived from human bone marrow into megakaryocytes or thrombocytes, comprising the steps of: (a) culturing OP9 cells; (b) layering leukemia cells derived from human bone marrow over the OP9 cells; and (c) incubating the cells in the presence of a compound ((R)-NALPCE) represented by Chemical Formula 1.Type: ApplicationFiled: November 17, 2006Publication date: October 30, 2008Applicant: EWHA University - Industry Collaboration FoundationInventors: Gil-Ja Jhon, So-Yeop Han, Jin-Kyung Limb, Hyun-Jin Cho, Shin-Young Kim
-
Publication number: 20080262481Abstract: The present invention relates to a hand skin care apparatus for performing multiple functions of drying and cosmetically treating hands, caring hand skin, aiding health, therapeutic activation, and fomentation, therapeutic activation, and fomentation, and employs a cover pivotally opened and closed about a hinge shaft of a main body for sucking air, projecting infrared rays, heating using infrared rays, and projecting laser beams. The introduced air passes through the infrared ray projector and is blown to where a user's hands are placed such that hands are rapidly dried by hot air and heat, infrared rays, and infrared rays generated by the infrared ray projector and the infrared exothermic device prevent and remove the inhabitance of bacteria causing various diseases on the hands. Thus, a user can maintain his/her hands at sanitary state. Due to the increased temperature, the apparatus of the present invention exhibits fomentation and the far infrared rays are helpful to hand skin care and health.Type: ApplicationFiled: March 18, 2005Publication date: October 23, 2008Inventor: Hyun Jin Cho
-
Publication number: 20080239803Abstract: A memory cell is provided which includes an access transistor and a gated lateral thyristor (GLT) device. The access transistor includes a source node. The gated lateral thyristor (GLT) device includes an anode node coupled to the source node of the access transistor.Type: ApplicationFiled: March 28, 2007Publication date: October 2, 2008Applicant: ADVANCED MICRO DEVICES, INC.Inventor: Hyun-Jin CHO
-
Publication number: 20080242009Abstract: A method is provided for fabricating a memory device. A semiconductor substrate is provided which includes a first well region having a first conductivity type, a second well region having the first conductivity type, a first gate structure overlying the first well region and the second gate structure overlying the second well region. An insulating material layer is conformally deposited overlying exposed portions of the semiconductor substrate. Photosensitive material is provided over a portion of the insulating material layer which overlies a portion of the second well region. The photosensitive material exposes portions of the insulating material layer. The exposed portions of the insulating material layer are anisotropically etched to provide a sidewall spacer adjacent a first sidewall of the second gate structure, and an insulating spacer block formed overlying a portion of the second gate structure and adjacent a second sidewall of the second gate structure.Type: ApplicationFiled: March 28, 2007Publication date: October 2, 2008Applicant: ADVANCED MICRO DEVICES, INC.Inventor: Hyun-Jin CHO
-
Publication number: 20080203094Abstract: Disclosed is a can end with an improved opening and drinking convenience. The can end includes a body having an opening piece defined in a predetermined region of an upper surface thereof by scores, and a tab coupled to the body by means of a rivet. The tab has a first end located at one side of the rivet to form a grip portion, and a second end located at the other side of the rivet to form a pressure portion for pressing the opening piece.Type: ApplicationFiled: August 2, 2007Publication date: August 28, 2008Inventor: Hyun Jin CHO
-
Patent number: 7405963Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.Type: GrantFiled: February 24, 2006Date of Patent: July 29, 2008Assignee: T-RAM Semiconductor, Inc.Inventors: Farid Nemati, Hyun-Jin Cho, Robert Homan Igehy
-
Publication number: 20080031036Abstract: A switching device and methods of making and operating the same are provided. In one aspect, a method of operating a switching device is provided that includes providing a MOS transistor that has a gate, a source region, a drain region and a body region. A bipolar transistor is provided that has a collector, a base and an emitter. The body region of the MOS transistor serves as the base of the bipolar transistor and the drain region of the MOS transistor serves as the collector of the bipolar transistor. Activation of the MOS transistor causes the bipolar transistor to turn on. The MOS transistor is activated to turn on the bipolar transistor and the bipolar transistor delivers current to the source region.Type: ApplicationFiled: December 24, 2006Publication date: February 7, 2008Inventor: Hyun-Jin Cho
-
Publication number: 20080012051Abstract: A memory cell and methods of making and operating the same are provided. In one aspect, a method of forming a memory cell is provided that includes forming a MOS transistor that has a gate, a source region and a drain region. A bipolar transistor is formed that has a collector, a base and an emitter. The emitter of the bipolar transistor is formed to serve as the source region for the MOS transistor and the base of the bipolar transistor is formed to serve as a capacitive charge storage region for the memory cell.Type: ApplicationFiled: December 24, 2006Publication date: January 17, 2008Inventor: Hyun-Jin Cho
-
Patent number: 7075122Abstract: In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.Type: GrantFiled: September 25, 2003Date of Patent: July 11, 2006Assignee: T-Ram Semiconductor, Inc.Inventors: Kevin J. Yang, Farid Nemati, Scott Robins, James D. Plummer, Hyun-Jin Cho
-
Publication number: 20060139996Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.Type: ApplicationFiled: February 24, 2006Publication date: June 29, 2006Inventors: Farid Nemati, Hyun-jin Cho, Robert Igehy
-
Patent number: 7042759Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.Type: GrantFiled: April 22, 2005Date of Patent: May 9, 2006Assignee: T-RAM Semiconductor, Inc.Inventors: Farid Nemati, Hyun-Jin Cho, Robert Homan Igehy
-
Publication number: 20050233506Abstract: A method of fabricating a thyristor-based memory may include forming different opposite conductivity-type regions in silicon for defining a thyristor and an access device in series relationship. An activation anneal may activate dopants previously implanted for the different regions. A damaging implant of germanium or xenon or argon may be directed into select regions of the silicon including at least one p-n junction region for the access device and the thyristor. A re-crystallization anneal may then be performed to re-crystallize at least some of the damaged lattice structure resulting from the damaging implant. The re-crystallization anneal may use a temperature less than that of the previous activation anneal.Type: ApplicationFiled: June 22, 2005Publication date: October 20, 2005Inventors: Andrew Horch, Hyun-Jin Cho, Farid Nemati, Scott Robins, Rajesh Gupta, Kevin Yang
-
Publication number: 20050185489Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.Type: ApplicationFiled: April 22, 2005Publication date: August 25, 2005Inventors: Farid Nemati, Hyun-Jin Cho, Robert Igehy
-
Patent number: 6891205Abstract: A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt that effects a leakage current in the thyristor. The thyristor includes a capacitively-coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region. In one implementation, the current shunt is located between the emitter and base region of one of the end portions of the thyristor and is configured and arranged to shunt low-level current therebetween.Type: GrantFiled: September 19, 2003Date of Patent: May 10, 2005Assignee: T-Ram, Inc.Inventors: Hyun-Jin Cho, Farid Nemati, Scott Robins
-
Patent number: 6885581Abstract: A dynamically-operating restoration circuit (106) is used to apply a voltage or current restore pulse signal to thyristor-based memory cells (108) and therein restore data in the cell using the internal positive feedback loop of the thyristor (110). In one example implementation, the internal positive feedback loop in the thyristor (110) is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.Type: GrantFiled: April 5, 2002Date of Patent: April 26, 2005Assignee: T-RAM, Inc.Inventors: Farid Nemati, Hyun-Jin Cho, Robert Homan Igehy