Abstract: A turbocharger including a compressor section having a compressor housing with an air inlet and a compressor air discharge and a compressor wheel in the compressor housing. A turbine section having a turbine housing with an exhaust gas inlet and a turbine exhaust gas outlet and a turbine wheel in the turbine housing, the turbine wheel being drivingly connected to the compressor wheel, the exhaust gas inlet being configured to be connected to an engine exhaust passage and the turbine exhaust gas outlet being configured to be connected to an exhaust system. The compressor housing includes a diffuser with a recess that receives the compressor wheel wherein the recess has a sidewall with an upper edge and the compressor wheel has a base plate with an upper surface that is below the upper edge of the sidewall of the recess in the diffuser.

Abstract: Technologies for a transistor with a ferroelectric gate dielectric are disclosed. In the illustrative embodiment, a transistor has a ferroelectric gate dielectric that is lattice matched to the channel of the transistor. In one embodiment, the ferroelectric polarization changes when voltage is applied and removed from a gate electrode, facilitating switching of the transistor at a lower applied voltage. In another embodiment, the ferroelectric polarization of a gate dielectric of a transistor changes when the voltage is past a positive threshold value or a negative threshold value. Such a transistor can be used as a one transistor memory cell.

Abstract: Magnetoelectric spin-orbit logic (MESO) devices comprise a magnetoelectric switch capacitor coupled to a spin-orbit coupling structure. The logic state of the MESO device is represented by the magnetization orientation of the ferromagnet of the magnetoelectric switch capacitor and the spin-orbit coupling structure converts the magnetization orientation of the ferromagnet to an output current. MESO devices in which all or at least some of the constituent layers of the device are perovskite materials can provide advantages such as improved control over the manufacturing of MESO devices and high quality interfaces between MESO layers due to the lattice matching of perovskite materials.

Abstract: In one embodiment, an integrated circuit die includes: a first layer comprising a magnetoelectric material; a second layer comprising a monolayer transition metal dichalcogenide (TMD); a magnet between the first layer and the second layer, wherein the magnet has perpendicular magnetic anisotropy; a first conductive trace coupled to the first layer; and a second conductive trace coupled to the magnet.

Abstract: Technologies for majority gates are disclosed. In one embodiment, a ferroelectric layer has three inputs and an output adjacent a surface of the ferroelectric. When a voltage is applied to each input, the inputs and a ground plane below the ferroelectric layer form a capacitor. The ferroelectric layer becomes polarized based on the applied voltages at the inputs. The portion of the ferroelectric layer near the output becomes polarized in the direction of polarization of the majority of the inputs. The output voltage then reflects the majority voltage of the inputs.

Abstract: In one embodiment, an integrated circuit apparatus includes a plurality of metallization layers, each metallization layer comprising voltage supply lines and signal lines. The apparatus also includes logic circuits formed between respective pairs of metallization layers, with each logic circuit comprising non-CMOS logic devices to perform an operation on a respective bit of an input set of bits. The non-CMOS logic devices may include one or more of ferroelectric field-effect transistor (FeFET) devices or spintronic logic devices (e.g., magnetoelectric spin orbit (MESO) devices or ferroelectric spin orbit logic (FSOL) devices), and each logic circuit may be formed on a different vertical plane within the apparatus.

Abstract: An apparatus for facilitating nullifying environmental sounds for a device. The apparatus may include a cover configured to be attached to an outer surface of the device. Further, the cover may include a holder attached to the cover in a location of the cover. Further, the holder defines a interior space. Further, the apparatus may include a filtering component configured to be disposed in the interior space. Further, the filtering component covers an opening disposed in the outer surface of the device based on the attaching of the cover to the outer surface of the device. Further, the opening leads to a cavity in the device for a sound capturing device comprised within the device. Further, the filtering component may be comprised of a material. Further, the filtering component may be configured for suppressing a capturing of an environmental sound by the sound capturing device based on the material.

Abstract: In one embodiment, a first integrated circuit component, a second integrated circuit component, and an electrical interconnect coupling the first integrated circuit component and the second integrated circuit component. The interconnect comprises one or more spintronic logic devices.

Abstract: A spin orbit logic device includes: a first electrically conductive layer; a layer including a magnetoelectric material (ME layer) on the first electrically conductive layer; a layer including a ferromagnetic material with in-plane magnetic anisotropy (FM layer) on the ME layer; a second electrically conductive layer on the FM layer; a layer including a dielectric material on the second electrically conductive layer (coupling layer); a layer including a spin orbit coupling material (SOC layer) on the coupling layer; and a layer including a ferromagnetic material with perpendicular magnetic anisotropy (PMA layer) on the SOC layer.

Abstract: Techniques for optimizing a design for a physical device to be fabricated by a fabrication system are disclosed. A computing system receives an initial design of the physical device. The computing system simulates fabrication of the physical device using a fabrication model associated with the fabrication system to determine predicted structural parameters. The computing system determines a gradient of the fabrication model based on an estimator. The computing system backpropagates the gradient of the fabrication model to update the predicted structural parameters and thereby generate updated structural parameters. The computing system backpropagates a gradient associated with the updated structural parameters to update the initial design and thereby generate an updated initial design. In some embodiments, the updated initial design is transmitted to the fabrication system for fabrication of the physical device.

Abstract: A first type of ferroelectric capacitor comprises electrodes and an insulating layer comprising ferroelectric oxides. In some embodiments, the electrodes and the insulating layer comprise perovskite ferroelectric oxides. A second type of ferroelectric capacitor comprises a ferroelectric insulating layer comprising certain monochalcogenides. Both types of ferroelectric capacitors can have a coercive voltage that is less than one volt. Such capacitors are attractive for use in low-voltage non-volatile embedded memories for next-generation semiconductor manufacturing technologies.

Abstract: A probabilistic bit (p-bit) comprises a magnetic tunnel junction (MTJ) comprising a free layer whose magnetization orientation randomly fluctuates in the presence of thermal noise. The p-bit MTJ comprises a reference layer, a free layer, and an insulating layer between the reference and free layers. The reference layer and the free layer comprise synthetic antiferromagnets. The use of a synthetic antiferromagnet for the reference layer reduces the amount of stray magnetic field that can impact the magnetization of the free layer and the use of a synthetic antiferromagnet for the free layer reduces stray magnetic field bias on p-bit random number generation. Tuning the thickness of the nonmagnetic layer of synthetic antiferromagnet free layer can result in faster random number generation time relative to a comparable MTJ with a free layer comprising a single-layer ferromagnet.

Abstract: A multilayer photonic device is described, including an input region configured to receive an input signal, a multilayer stack optically coupled with the input region to receive the input signal, and an output region optically coupled with the multilayer stack to output an output signal. The multilayer stack can include a first metastructured dispersive region disposed in a first patterned layer of the multilayer stack and a second metastructured dispersive region disposed in a second patterned layer of the multilayer stack and optically coupled with the first metastructured dispersive region. The first metastructured dispersive region and the second metastructured dispersive region can together structure the multilayer stack to generate the output signal in response to the input signal.

Abstract: In one embodiment, a piezo-resistive resonator device includes one or more drive transistors with source and drain regions in a first well and a sense transistor with source and drain regions in a second well of opposite polarity than the first well. The gates of the drive and sense transistor are connected to a first direct current (DC) source. The drain region of the sense transistor is connected to a second DC source, and the source and drain regions of the drive transistor are connected to an alternating current (AC) source.

Abstract: An electronic device provides, to a user, a user-curated playlist, the user-curated playlist including an ordered set of media items that were added by the user. While providing a first media item in the ordered set of media items, the electronic device receives a first user input selecting an option to include recommended media items in the user-curated playlist. In response to the first user input, the electronic device updates the user-curated playlist to include a first recommended media item, the first recommended media item selected without user intervention based at least in part on attributes of the user-curated playlist. The first recommended media item is positioned in the user-curated playlist in between media items that were added to the ordered set of media items by the user.

Abstract: A photonic integrated circuit comprises an optical deinterleaver, including an input region, a dispersive region, and at least two output regions. The input region is adapted to receive an input optical signal including a plurality of channels. The dispersive region is optically coupled to the input region to receive the input optical signal. The dispersive region includes an inhomogeneous arrangement of a first material and a second material to structure the dispersive region to separate the input optical signal into a plurality of multi-channel optical signals, including a first multi-channel optical signal and a second multi-channel optical signal. The at least two output regions, include a first out region and a second output region optically coupled to the dispersive region. The first output region is positioned to receive the first multi-channel optical signal and the second output region is positioned to receive the second multi-channel optical signal.

Abstract: In some embodiments, techniques for creating a design for a physical device are provided. A computing system receives an initial design of the physical device. Performance of the physical device is simulated using the initial design. A performance loss value is determined for the physical device based on the simulated performance at a target wavelength and one or more delta wavelengths. The performance loss value is backpropagated to determine a gradient corresponding to an influence of changes in the initial design on the total performance loss value. The initial design of the physical device is revised based at least in part on the gradient.

Abstract: Magnetoelectric magnetic tunnel junction (MEMTJ) logic devices comprise a magnetoelectric switching capacitor coupled to a pair of magnetic tunnel junctions (MTJs) by an insulating layer. The logic state of the MEMTJ is represented by the magnetization orientation of the ferromagnetic layer of the magnetoelectric capacitor and can be switched through the application of an input voltage to the MEMTJ that causes the magnetoelectric switching capacitor to switch states. The magnetization orientation of the magnetoelectric capacitor ferromagnetic layer is read out by the MTJs. The magnetization orientation of a ferromagnetic free layer common to the MTJs is coupled to the ferromagnetic layer of the magnetoelectric capacitor. The potential of the ferromagnetic free layer is based on the power supply voltage applied to the ferromagnetic reference layer of the MTJ having a magnetization orientation parallel to that of the ferromagnetic free layer.

Abstract: A photonic integrated circuit comprises an optical deinterleaver, including an input region, a dispersive region, and at least two output regions. The input region is adapted to receive an input optical signal including a plurality of channels. The dispersive region is optically coupled to the input region to receive the input optical signal. The dispersive region includes an inhomogeneous arrangement of a first material and a second material to structure the dispersive region to separate the input optical signal into a plurality of multi-channel optical signals, including a first multi-channel optical signal and a second multi-channel optical signal. The at least two output regions, include a first out region and a second output region optically coupled to the dispersive region. The first output region is positioned to receive the first multi-channel optical signal and the second output region is positioned to receive the second multi-channel optical signal.

Abstract: A computer-implemented method of creating a design for a physical device using an inverse design process is provided. A computing system receives a proposed design. The computing system conducts an operational simulation based on the proposed design at a first resolution to generate a calculated performance result. The computing system provides the calculated performance result to a machine learning model to generate a predicted performance result of an operational simulation based on the proposed design at a second resolution, where the second resolution is higher than the first resolution. The computing system updates the proposed design based on the predicted performance result.