Abstract: Provided a source driver integrated circuit (IC) and a display driving device eliminating an existing input pad and internal wiring of a source driver integrated circuit (IC) for receiving a sensing reference voltage from an external voltage source by allowing the sensing reference voltage for initializing pixels during sensing of the pixels to be generated by an internal voltage source, rather than the external voltage source.

Abstract: A power semiconductor device includes a semiconductor layer structure and a protective overcoating on a bonding surface of the semiconductor layer structure. The bonding surface includes a plurality of adhesion features along an interface with the protective overcoating. The adhesion features protrude from and/or are recessed in the bonding surface, and define an adhesion strength between the bonding surface and the protective overcoating that spatially varies along the interface. Related devices and fabrication methods are also discussed.

Abstract: Semiconductor devices, and more particularly passivation structures for semiconductor devices are disclosed. A semiconductor device may include an active region, an edge termination region that is arranged along a perimeter of the active region, and a passivation structure that may form a die seal along the edge termination region. The passivation structure may include a number of passivation layers in an arrangement that improves mechanical strength and adhesion of the passivation structure along the edge termination region. An interface formed by at least one of the passivation layers may be provided with a pattern that serves to more evenly distribute forces related to thermal expansion and contraction during power cycling, thereby reducing cracking and delamination in the passivation structure. A patterned layer may be at least partially embedded in the passivation structure in an arrangement that forms the corresponding pattern in overlying portions of the passivation structure.

Abstract: A semiconductor device includes a substrate, a first P-type well region and a second P-type well region disposed in the substrate, wherein the first P-type well region and the second P-type well region are spaced apart from each other, an N-type source region disposed in the substrate, wherein the N-type source region is disposed spaced apart from the second P-type well region, an N-type drain region disposed in the second P-type well region, an N-type LDD region disposed near the N-type drain region, and a gate insulating layer and a gate electrode on the substrate, wherein the gate electrode partially overlaps the second P-type well region.

Abstract: The present disclosure provides a method of manufacturing a semiconductor device includes forming a first gate insulating film on a substrate for a first device, forming a first gate electrode on the first gate insulating film; forming a mask pattern on the first gate electrode to expose opposing end portions of the first gate electrode, wherein a length of the mask pattern is smaller than a length of the first gate electrode; performing ion implantation through the exposed opposing end portions of the first gate electrode using the mask pattern to simultaneously form first and second drift regions in the substrate; forming spacers on sidewalls of the first gate electrode, respectively; and forming a first source region and a first drain region in the first and second drift regions, respectively.

Abstract: A washing machine and a method for controlling the same are provided. The washing machine includes a first rotary tub, a first driver configured to rotate the first rotary tub, a second rotary tub, a second driver configured to rotate the second rotary tub, and at least one processor configured to control the first driver and the second driver in a manner that the first rotary tub and the second rotary tub rotate. If a rotation speed of the first rotary tub is equal to or higher than a first reference speed, the at least one processor controls the second driver such that a rotation speed of the second rotary tub increases to a target speed and then decreases.

Abstract: A feed assembly supplies polysilicon to a growth chamber for growing a crystal ingot from a melt. An example system includes a housing having support rails for receiving one of a granular tray and a chunk tray and a feed material reservoir positioned above the support rails to selectively feed one of either the granular tray or the chunk tray. A valve mechanism and pulse vibrator are also disclosed.

Abstract: A construction robot for a ceiling is provided. The construction robot includes: a robot base having an upper plate; a targeting unit on the upper plate, wherein the targeting unit moves a robotic arm assembly combined with the targeting unit, and wherein the robotic arm assembly includes: a first robotic arm where a drill is mounted, wherein a first elevating unit of the first robotic arm is elevated or lowered according to information on the ceiling, a second robotic arm where an anchor bolt inserting equipment is mounted, wherein a second elevating unit of the second robotic arm is elevated or lowered according to the information, and a third robotic arm where an impact wrench is mounted, wherein a third elevating unit of the third robotic arm is elevated or lowered likewise; and a loading unit on the upper plate or the targeting unit for providing anchor bolt assemblies.

Abstract: An embodiment provides a technology relating to data transmission or reception in a display panel. In the embodiment, a plurality of integrated circuits sharing a data line may transmit an indication signal through signal lines connected 1:1 to the circuits, and transmit data through the data line in response to the indication signal.

Abstract: A washing machine and a method for controlling the same are provided. The washing machine includes a first rotary tub, a first driver configured to rotate the first rotary tub, a second rotary tub, a second driver configured to rotate the second rotary tub, and at least one processor configured to control the first driver and the second driver in a manner that the first rotary tub and the second rotary tub rotate. If a rotation speed of the first rotary tub is equal to or higher than a first reference speed, the at least one processor controls the second driver such that a rotation speed of the second rotary tub increases to a target speed and then decreases.

Abstract: A display driver semiconductor device includes a high voltage well region formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer formed using a deposition process. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer formed using a thermal process. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer.

Abstract: An embodiment provides a technology relating to data transmission or reception in a display panel. In the embodiment, a plurality of integrated circuits sharing a data line may transmit an indication signal through signal lines connected 1:1 to the circuits, and transmit data through the data line in response to the indication signal.

Abstract: A semiconductor device includes a substrate comprising a WELL region, a gate electrode comprising a gate length disposed on the WELL region, and first and second drift regions which overlap with the gate electrode. The first and second draft regions may overlap with the gate electrode at an overlapping length which is a percentage of the gate length.

Abstract: A semiconductor device includes a substrate, a first P-type well region and a second P-type well region disposed in the substrate, wherein the first P-type well region and the second P-type well region are spaced apart from each other, an N-type source region disposed in the substrate, wherein the N-type source region is disposed spaced apart from the second P-type well region, an N-type drain region disposed in the second P-type well region, an N-type LDD region disposed near the N-type drain region, and a gate insulating layer and a gate electrode on the substrate, wherein the gate electrode partially overlaps the second P-type well region.

Abstract: The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2 to thereby imprint an oxygen precipitate profile can degrade the GOI yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. The present invention restores GOI yield by stripping the silicon nitride layer, which is followed by wafer oxidation, which is followed by stripping the silicon oxide layer.

Abstract: A semiconductor device includes a substrate, a first P-type well region and a second P-type well region disposed in the substrate, wherein the first P-type well region and the second P-type well region are spaced apart from each other, an N-type source region disposed in the substrate, wherein the N-type source region is disposed spaced apart from the second P-type well region, an N-type drain region disposed in the second P-type well region, an N-type LDD region disposed near the N-type drain region, and a gate insulating layer and a gate electrode on the substrate, wherein the gate electrode partially overlaps the second P-type well region.

Abstract: A semiconductor device including a first P-type well region and an asymmetric second P-type well region each formed in a semiconductor substrate; a gate insulating layer and a gate electrode formed on the substrate; a first N-type source/drain region and a second N-type source/drain region that are formed on respective sides of the gate electrode; and an asymmetric LDD region of N-type formed to extend from the second source/drain region, wherein the asymmetric second P-type well region encompasses the second N-type source/drain region and the asymmetric LDD region, and the first N-type source/drain region both the asymmetric second P-type well region and the substrate, and the asymmetric second P-type well region is formed encompassing the second N-type source/drain region and in contact with the first N-type source/drain region.

Abstract: A semiconductor device includes a first transistor, a second transistor, and a third transistor. The first transistor includes a first gate insulator, a first source region and a first drain region, a pair of lightly doped drain (LDD) regions that are each shallower than the first source region and the first drain region, and a first gate electrode. The second transistor includes a second gate insulator, a second source region and a second drain region, a pair of drift regions that encompass the second source region and the second drain region respectively, and a second gate electrode, and the third transistor comprises a third gate insulator, a third source region and a third drain region, and a pair of drift regions that encompass the third source and the third drain regions respectively, and a third gate electrode. The second gate insulator is thinner than the other gate insulators.

Abstract: The present invention provides a pixel sensing device for sensing characteristics of pixels arranged on a display panel, processing and converting the same into valid sensing data, and transmitting the valid sensing data to an external device.

Abstract: A feed assembly supplies polysilicon to a growth chamber for growing a crystal ingot from a melt. An example system includes a housing having support rails for receiving one of a granular tray and a chunk tray and a feed material reservoir positioned above the support rails to selectively feed one of either the granular tray or the chunk tray. A valve mechanism and pulse vibrator are also disclosed.