Patents by Inventor In-Hwan Ji

In-Hwan Ji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180286981
    Abstract: A semiconductor device including a first P-type well region and an asymmetric second P-type well region each formed in a semiconductor substrate; a gate insulating layer and a gate electrode formed on the substrate; a first N-type source/drain region and a second N-type source/drain region that are formed on respective sides of the gate electrode; and an asymmetric LDD region of N-type formed to extend from the second source/drain region, wherein the asymmetric second P-type well region encompasses the second N-type source/drain region and the asymmetric LDD region, and the first N-type source/drain region both the asymmetric second P-type well region and the substrate, and the asymmetric second P-type well region is formed encompassing the second N-type source/drain region and in contact with the first N-type source/drain region
    Type: Application
    Filed: November 30, 2017
    Publication date: October 4, 2018
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Jae Hyung JANG, Hee Hwan JI, Jin Yeong SON
  • Publication number: 20180237948
    Abstract: A feed assembly supplies polysilicon to a growth chamber for growing a crystal ingot from a melt. An example system includes a housing having support rails for receiving one of a granular tray and a chunk tray and a feed material reservoir positioned above the support rails to selectively feed one of either the granular tray or the chunk tray. A valve mechanism and pulse vibrator are also disclosed.
    Type: Application
    Filed: August 18, 2016
    Publication date: August 23, 2018
    Applicants: SunEdison Semiconductor Limited (UEN201334164H), DAEVAC International Co., Ltd.
    Inventors: Seok Min Yun, Seong Su Park, Jun Hwan Ji, Won-Jin Choi, UiSung Jung, Young Jung Lee, Tae Su Koo, Sung-Jin Kim
  • Patent number: 9985844
    Abstract: Provided is a method for measuring a throughput of a backhaul network. The method includes: estimating an available bandwidth of a backhaul network; determining the sizes (P) of packet trains by using the estimated available bandwidth; and calculating a virtual throughput of the backhaul network by using at least one parameter by transmitting N packet trains having the determined sizes to the backhaul network (N is a natural number that is equal to or greater than 2).
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: May 29, 2018
    Assignee: Qucell Networks Co., Ltd.
    Inventors: Jin Soup Joung, Seung Hwan Ji, Oh Keol Kwon, Ro Mi Choe
  • Publication number: 20180134892
    Abstract: A resin composition for intake hoses is provided. The resin composition includes a predetermined amount of polyester elastomer incorporated into a polyamide resin and a polypropylene resin and further includes an antioxidant, a heat stabilizer, a lubricant and a master batch if necessary, thereby exhibiting excellent durability, heat resistance, elongation, mechanical rigidity, pressure resistance and cold resistance, and reducing weight and production costs.
    Type: Application
    Filed: November 15, 2017
    Publication date: May 17, 2018
    Applicants: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATION
    Inventors: Young Hak Jang, Joon Chul Park, Jae Hyeon Jung, Hyeon Gyun Ahn, Sung Hwan Ji, Deok Ki Kim, Chung Han Kim, Hee Sok Chang
  • Publication number: 20180083043
    Abstract: A display driver semiconductor device includes a high voltage well region being formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer. The first insulating layer may be formed using a chemical vapor deposition (CVD) process and the second insulating layer is formed using a thermal oxide process.
    Type: Application
    Filed: November 30, 2017
    Publication date: March 22, 2018
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Bo Seok OH, Hee Hwan JI, Jeong Hyeon PARK
  • Publication number: 20180030615
    Abstract: Methods for producing single crystal silicon ingots with a reduced oxygen content toward the seed end of the ingot are disclosed. The methods may involve controlling growth conditions during crown formation and, in some embodiments, controlling the rate of crucible rotation during crown rotation to increase the time the crucible is rotated at or below a threshold value during crown growth.
    Type: Application
    Filed: July 28, 2017
    Publication date: February 1, 2018
    Inventors: Doh Hyung Kwon, Hyung Min Lee, Jae Woo Ryu, Young Jung Lee, Jong Hak Lee, Jun Hwan Ji, Byung Chun Kim
  • Publication number: 20180019262
    Abstract: A display driver semiconductor device includes a high voltage well region being formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer. The first insulating layer may be formed using a chemical vapor deposition (CVD) process and the second insulating layer is formed using a thermal oxide process.
    Type: Application
    Filed: March 6, 2017
    Publication date: January 18, 2018
    Applicant: Magnachip Semiconductor, Ltd.
    Inventors: Bo Seok OH, Hee Hwan JI, Jeong Hyeon PARK
  • Patent number: 9871063
    Abstract: A display driver semiconductor device includes a high voltage well region being formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer. The first insulating layer may be formed using a chemical vapor deposition (CVD) process and the second insulating layer is formed using a thermal oxide process.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: January 16, 2018
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Bo Seok Oh, Hee Hwan Ji, Jeong Hyeon Park
  • Publication number: 20180013421
    Abstract: A semiconductor device includes a first transistor, a second transistor, and a third transistor. The first transistor includes a first gate insulator, a first source region and a first drain region, a pair of lightly doped drain (LDD) regions that are each shallower than the first source region and the first drain region, and a first gate electrode. The second transistor includes a second gate insulator, a second source region and a second drain region, a pair of drift regions that encompass the second source region and the second drain region respectively, and a second gate electrode, and the third transistor comprises a third gate insulator, a third source region and a third drain region, and a pair of drift regions that encompass the third source and the third drain regions respectively, and a third gate electrode. The second gate insulator is thinner than the other gate insulators.
    Type: Application
    Filed: December 28, 2016
    Publication date: January 11, 2018
    Applicant: Magnachip Semiconductor, Ltd.
    Inventors: Jeong Hyeon PARK, Bo Seok OH, Hee Hwan JI
  • Patent number: 9800244
    Abstract: An inverter circuit includes a pull-up control circuit and a pull-up drive circuit. The pull-up control circuit generates a drive signal which is enabled during a first time period in response to an input signal and an output signal. The pull-up drive circuit drives the output signal to a power supply voltage in response to the input signal and the drive signal. The pull-up drive unit drives the output signal with a first drivability during the first time period and drives the output signal with a second drivability during a second time period.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: October 24, 2017
    Assignee: SK hynix Inc.
    Inventors: Jung Ho Lim, Jung Hwan Ji
  • Publication number: 20170230255
    Abstract: Provided is a method for measuring a throughput of a backhaul network. The method includes: estimating an available bandwidth of a backhaul network; determining the sizes (P) of packet trains by using the estimated available bandwidth; and calculating a virtual throughput of the backhaul network by using at least one parameter by transmitting N packet trains having the determined sizes to the backhaul network (N is a natural number that is equal to or greater than 2).
    Type: Application
    Filed: February 22, 2016
    Publication date: August 10, 2017
    Inventors: Jin Soup JOUNG, Seung Hwan JI, Oh Keol KWON, Ro Mi CHOE
  • Patent number: 9691323
    Abstract: The organic light emitting display may include a plurality of pixels for generating light components with predetermined brightness components while controlling the amount of current that flows from a first power source to a second power source via organic light emitting diodes (OLED), a first power source controller for extracting data of the highest gray level among input data items of one frame and for outputting a control value having voltage information corresponding to the highest gray level data, and a first power source generator for generating a controlled voltage value corresponding to the control value and outputting the controlled voltage value to the first power source.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: June 27, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Baek-Woon Lee, In-Hwan Ji
  • Publication number: 20170170831
    Abstract: An inverter circuit includes a pull-up control circuit and a pull-up drive circuit. The pull-up control circuit generates a drive signal which is enabled during a first time period in response to an input signal and an output signal. The pull-up drive circuit drives the output signal to a power supply voltage in response to the input signal and the drive signal. The pull-up drive unit drives the output signal with a first drivability during the first time period and drives the output signal with a second drivability during a second time period.
    Type: Application
    Filed: March 31, 2016
    Publication date: June 15, 2017
    Inventors: Jung Ho LIM, Jung Hwan JI
  • Patent number: 9564195
    Abstract: An address comparator circuit includes a first determination unit suitable for activating a first control signal when a first address corresponding to a previous read command is identical with a second address corresponding to a current read command; a second determination unit suitable for activating a second control signal when the previous and current read commands are consecutively inputted to the address comparator circuit with an interval of a specific number of clocks or less; and a blocking signal generation unit suitable for generating a blocking signal that blocks data transmission between a memory array and an external device based on the first and the second control signals.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: February 7, 2017
    Assignee: SK Hynix Inc.
    Inventors: Jung-Hwan Ji, Ki-Chon Park
  • Patent number: 9565134
    Abstract: Provided is a long term evolution (LTE) femtocell based content service system and a driving method thereof, which include user equipment (UE) connected to an evolved packet core (EPC) network that is a core network through routes, that is, a radio network subsystem (RNS) and a home eNode subsystem (HeNS) having a femtocell and a content service server connected to the EPC network and configured to receive system information including PCI, U_DL BW, Cell ID, TAC, HeNB Name and SNR, and query data from the user equipment (UE), retrieve corresponding content with reference to the received system information and query data, and provide the corresponding content to the user equipment (UE).
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: February 7, 2017
    Assignee: INNOWIRELESS CO., LTD.
    Inventors: Jin Soup Joung, Seung-Hwan Ji, Hong Gil Kim
  • Patent number: 9562816
    Abstract: Provided is an apparatus for inspecting a magazine including a plurality of partially-finished products. The apparatus is configured to inspect a stopper of the magazine before providing the magazine to a packaging process, and further configured to classify the stopper into a normal product. The magazine comprising the stopper classified as the normal product is into the packaging process.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: February 7, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-hwan Ji, Jung-hun Choi, Sung-yeol Lee, Hee-sang Yang, Jae-nam Lee
  • Patent number: 9564191
    Abstract: A signal compensation circuit includes a first path configured to cause a source signal to pass therethrough and be outputted as a first signal; a delay block configured to output a second signal by delaying the source signal by a predetermined time; a second path configured to cause the second signal to pass therethrough and be outputted as a third signal; and a signal combination block configured to generate a compensated signal by combining the first signal and the third signal.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: February 7, 2017
    Assignee: SK HYNIX INC.
    Inventors: Jung Hwan Ji, Ki Chon Park
  • Patent number: 9510238
    Abstract: Provided is a media access control processing unit (MAC) sharing method applied to a fifth generation (5G), which is a next generation, mobile communication system and making it possible to efficiently share a plurality of MACs so as to efficiently distribute and process traffic of user equipment (UE).
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: November 29, 2016
    Assignee: INNOWIRELESS CO., LTD.
    Inventors: Jin Soup Joung, Seung Hwan Ji, Myung Jong Kim, Seung Hwan Lee
  • Patent number: 9497702
    Abstract: A method of controlling power of a physical layer device of a base station in a mobile communication system which is applied to a fifth generation (5G), that is the next generation, mobile communication system and makes it possible to efficiently control the power of physical layer devices managing each beam spot, such as a radio frequency (RF) module and a modem, according to the number of pieces of user equipment (UE) or an amount of traffic processed by the beam spot. The method is applied to a mobile communication system including a plurality of media access control processing units (MACs) corresponding to a plurality of modems on a one-to-one basis and the plurality of modems each connected with one or more RF modules covering beam spots dividing a base station cell.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: November 15, 2016
    Assignee: INNOWIRELESS CO., LTD.
    Inventors: Jin Soup Joung, Seung Hwan Ji, Myung Jong Kim, Seung Hwan Lee
  • Publication number: 20160260470
    Abstract: A semiconductor system may include a first semiconductor configured to output a command signal and an address signal. The semiconductor system may include a second semiconductor device configured to include a first operation circuit including a first MOS transistor and a second operation circuit including a second MOS transistor. The first MOS transistor and the second MOS transistor may be turned on in response to a first internal command signal when a first operation is executed according to the command signal. The first MOS transistor may be turned on in response to a period signal generated from the address signal when a second operation is executed according to the command signal.
    Type: Application
    Filed: May 20, 2015
    Publication date: September 8, 2016
    Inventors: Jung Hwan JI, Geun Il LEE