Patents by Inventor In-ja HAN

In-ja HAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10304807
    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: May 28, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Hyun Park, Eun Jung Jo, Sung Won Jeong, Han Kim, Mi Ja Han
  • Patent number: 10263961
    Abstract: A security chip and an application processor may be included in a device configured to engage in encrypted communications with an external client, including public key infrastructure communications, in an environment where a certificate authority is absent. The security chip may provide the application processor with a device public key from among a pair of device keys related to public key infrastructure communications, receive a request from the application processor to generate a digital signature on a certificate form including the device public key, provide the application processor with a digital signature generated based on an encryption operation using a certificate authority private key, and receive and store a certificate including the digital signature from the application processor.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: April 16, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youn-sung Chu, Min-ja Han, Kyung-jin Lee
  • Publication number: 20190060342
    Abstract: The present invention relates to a composition containing Ivermectin for exterminating Clavinema mariae infection on Sebastes schlegeli, and more specifically, to a composition for exterminating Clavinema mariae infection on Sebastes schlegeli, containing Ivermectin as an active ingredient, and a method for exterminating Clavinema mariae infection by orally administering Ivermectin to Sebastes schlegeli. The composition and the exterminating method according to the present invention are excellent in an effect of exterminating Clavinema mariae infection of Sebastes schlegeli, are safe without causing any side effects on the Sebastes schlegeli, and are able to achieve oral administration to thereby be useful in the aquaculture industry.
    Type: Application
    Filed: July 11, 2018
    Publication date: February 28, 2019
    Inventors: Hyun-Ja Han, Sung-hee Jung, Miyoung Cho, Na Young Kim, Myoung Sug Kim, Jeung-Wan Do, Han-Gil Seo
  • Patent number: 10217631
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The first connection member includes a first electromagnetic interference (EMI) blocking part surrounding side surfaces of the semiconductor chip, the second connection member includes a second EMI blocking part surrounding the redistribution layer, and the first EMI blocking part and the second EMI blocking part are connected to each other.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: February 26, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Han Kim, Mi Ja Han, Dae Hyun Park, Sang Jong Lee, Seong Hee Choi
  • Patent number: 10157886
    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: December 18, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Hyun Park, Eun Jung Jo, Sung Won Jeong, Han Kim, Mi Ja Han
  • Patent number: 10121769
    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: November 6, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Hyun Park, Eun Jung Jo, Sung Won Jeong, Han Kim, Mi Ja Han
  • Patent number: 10083929
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, the second connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip, and at least one of the first connection member and the second connection member includes a dummy pattern layer.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: September 25, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seong Hee Choi, Han Kim, Dae Hyun Park, Mi Ja Han
  • Patent number: 10063541
    Abstract: Provided are a user authentication method and an electronic device performing the method. The method is performed under the control of a processor and includes inputting a user authentication request for identifying a user, generating random number data that corresponds to knowledge-based authentication information in the user authentication request, generating an authentication code by combining biometrics-based authentication information in the user authentication request and the random number data, and processing the user authentication request based on the authentication code.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: August 28, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Pyo Kim, Min-Soo Kang, Ki-Hong Kim, Je-Sang Lee, Min-Ja Han
  • Publication number: 20180233489
    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.
    Type: Application
    Filed: April 12, 2018
    Publication date: August 16, 2018
    Inventors: Dae Hyun PARK, Eun Jung JO, Sung Won JEONG, Han KIM, Mi Ja HAN
  • Publication number: 20180209999
    Abstract: Provided is a technique for automatically performing quality control of a blood cell analyzer so as to minimize waste of time and manpower and quality control errors through automation of everyday repetitive quality control tasks.
    Type: Application
    Filed: October 28, 2015
    Publication date: July 26, 2018
    Inventor: Kyung Ja HAN
  • Publication number: 20180174678
    Abstract: Provided is a technology for medical tests wherein microcells are tested, which allows remote samples to be tested in one integrated testing place automatically and manually and enables learning based on test results therefor, thereby increasing the accuracy of automatic medical testing and maximally reducing limitations on the manpower, time, and place for manual and automatic analyses.
    Type: Application
    Filed: June 16, 2016
    Publication date: June 21, 2018
    Inventors: Kyung Ja HAN, Won Bae LEE
  • Publication number: 20180174994
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, the second connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip, and at least one of the first connection member and the second connection member includes a dummy pattern layer.
    Type: Application
    Filed: August 1, 2017
    Publication date: June 21, 2018
    Inventors: Seong Hee CHOI, Han KIM, Dae Hyun PARK, Mi Ja HAN
  • Publication number: 20180138083
    Abstract: A fan-out semiconductor package includes a first connection member having a through-hole, first and second semiconductor chips disposed in the through-hole, an encapsulant encapsulating at least portions of the first connection member, the first semiconductor chip, and the second semiconductor chip, and a second connection member disposed on the first connection member and on active surfaces of the first semiconductor chip and the second semiconductor chip. A redistribution layer of the second connection member is respectively connected to both the first and second connection pads through first and second conductors, and the second conductor has a height greater than that of the first conductor.
    Type: Application
    Filed: August 3, 2017
    Publication date: May 17, 2018
    Inventors: Han KIM, Mi Ja HAN, Dae Hyun PARK
  • Publication number: 20180138029
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The first connection member includes a first electromagnetic interference (EMI) blocking part surrounding side surfaces of the semiconductor chip, the second connection member includes a second EMI blocking part surrounding the redistribution layer, and the first EMI blocking part and the second EMI blocking part are connected to each other.
    Type: Application
    Filed: August 9, 2017
    Publication date: May 17, 2018
    Inventors: Han KIM, Mi Ja HAN, Dae Hyun PARK, Sang Jong LEE, Seong Hee CHOI
  • Publication number: 20180127798
    Abstract: The present disclosure relates to genetic markers for discrimination and detection of bacteria causing Edwardsiellosis and Streptococcosis in fish, and a method for discriminating and detecting the bacteria using the same. A genetic marker for discrimination and/or detection of each of Edwardsiella tarda, Streptococcus iniae, Streptococcus parauberis and Lactococcus garvieae, which cause fish diseases, is selected and a peptide nucleic acid and a primer pair, which are specific for the genetic marker, are used to amplify and obtain melting curves having different fluorescences depending on bacterial species. Thus, bacteria that cause fish diseases can be discriminated and whether or not fish would be infected with the bacteria can be detected in a simple, rapid and accurate manner.
    Type: Application
    Filed: December 6, 2016
    Publication date: May 10, 2018
    Applicant: National Institute of Fisheries Science
    Inventors: Myoung Sug Kim, Sung-Hee Jung, Hye Sung Choi, Hyun-Ja Han, Jeung-Wan Do, Jin-Do Kim
  • Publication number: 20180114007
    Abstract: A secure element including: a storage configured to store security data; a first interface configured to receive a user input from an external input device; a processor configured to perform a user authentication, based on the user input, and activate the storage when the user authentication succeeds; and a second interface configured to transmit security information based on the security data to an external processor.
    Type: Application
    Filed: September 27, 2017
    Publication date: April 26, 2018
    Inventors: Ki-Hong Kim, Min-Ja Han
  • Publication number: 20180076178
    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.
    Type: Application
    Filed: February 21, 2017
    Publication date: March 15, 2018
    Inventors: Dae Hyun PARK, Eun Jung JO, Sung Won JEONG, Han KIM, Mi Ja HAN
  • Patent number: 9853003
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the first connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: December 26, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Mi Ja Han, Seong Hee Choi, Han Kim, Moon Il Kim, Dae Hyun Park
  • Publication number: 20170363532
    Abstract: Provided is a light scattering cell classification technology which can classify cells into various types and at the same time classify cells with very high accuracy despite the rotation of the cells. A cell analysis apparatus using a plurality of lasers, according to an embodiment of the present invention, comprises: a plurality of laser generators which are installed around a movement path through which cells to be classified are moved, and which irradiate laser beams at one measurement point on the movement path at different angles; a plurality of photodetectors, installed around the one measurement point, which collect a second laser beam, which is a laser beam generated as the laser beams irradiated from the laser generators are incident on the cells and then scattered; and a cell analysis unit which classifies the cells to be classified according to the second laser beam collected by the photodetectors.
    Type: Application
    Filed: October 28, 2015
    Publication date: December 21, 2017
    Applicant: The Catholic University of Korea Industry-Academic Cooperation Foundation
    Inventors: Kyung Ja HAN, Won LEE
  • Publication number: 20170287853
    Abstract: The fan-out semiconductor package includes: a semiconductor chip having an active surface having a connection pad disposed thereon and an inactive surface disposed to oppose the active surface; a first capacitor disposed adjacently to the semiconductor chip; an encapsulant at least partially encapsulating the first connection member and the semiconductor chip; a first connection member disposed on the encapsulant, the first capacitor, and the semiconductor chip, and a second capacitor disposed on the other surface of the first connection member opposing one surface of the first connection member on which the semiconductor chip is disposed, wherein the first connection member includes a redistribution layer electrically connected to the connection pad of the semiconductor chip, the first capacitor, and the second capacitor, and the first capacitor and the second capacitor are electrically connected to the connection pad through a common power wiring of the redistribution layer.
    Type: Application
    Filed: September 28, 2016
    Publication date: October 5, 2017
    Inventors: Han KIM, Mi Ja HAN, Kang Heon HUR, Young Gwan KO