Patents by Inventor In-kyeong Yoo

In-kyeong Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050145835
    Abstract: An emitter for an electron-beam projection lithography (EPL) system and a manufacturing method therefor are provided. The electron-beam emitter includes a substrate, an insulating layer overlying the substrate, and a gate electrode including a base layer formed on top of the insulating layer to a uniform thickness and an electron-beam blocking layer formed on the base layer in a predetermined pattern. The manufacturing method includes steps of: preparing a substrate; forming an insulating layer on the substrate; forming a base layer of a gate electrode by depositing a conductive metal on the insulating layer to a predetermined thickness; forming an electron-beam blocking layer of the gate electrode by depositing a metal capable of anodizing on the base layer to a predetermined thickness; and patterning the electron-beam blocking layer in a predetermined pattern by anodizing. The emitter provides a uniform electric field within the insulating layer and simplify the manufacturing method therefor.
    Type: Application
    Filed: February 15, 2005
    Publication date: July 7, 2005
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In-kyeong Yoo, Chang-wook Moon, Soo-hwan Jeong, Dong-wook Kim
  • Patent number: 6913984
    Abstract: A method of fabricating memory with nano dots includes sequentially depositing a first insulating layer, a charge storage layer, a sacrificial layer, and a metal layer on a substrate in which source and drain electrodes are formed, forming a plurality of holes on the resultant structure by anodizing the metal layer and oxidizing portions of the sacrificial layer that are exposed through the holes, patterning the charge storage layer to have nano dots by removing the oxidized metal layer, and etching the sacrificial layer and the charge storage layer using the oxidized sacrificial layer as a mask, and removing the oxidized sacrificial layer, depositing a second insulating layer and a gate electrode on the patterned charge storage layer, and patterning the first insulating layer, the patterned charge storage layer, the second insulating layer, and the gate electrode to a predetermined shape, for forming memory having uniformly distributed nano-scale storage nodes.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: July 5, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-sook Kim, Sun-ae Seo, In-kyeong Yoo, Soo-hwan Jeong
  • Publication number: 20050139882
    Abstract: In an electronic device, and a method of manufacturing the same, the electronic device includes a first substrate, a first lower capacitor on the first substrate, a first lower switching element on the first lower capacitor, and a second substrate on the first lower switching element. The electronic device may further include a second lower switching element which is isolated from the first lower capacitor, and an upper capacitor on the second substrate, the lower electrode of the upper capacitor being connected to the second lower switching element.
    Type: Application
    Filed: December 30, 2004
    Publication date: June 30, 2005
    Inventors: Wenxu Xianyu, Takashi Noguchi, In-kyeong Yoo, Young-soo Park
  • Patent number: 6891241
    Abstract: A single transistor type magnetic random access memory device and a method of operating and manufacturing the same, wherein the single transistor type magnetic random access memory device includes a substrate, first and second doped regions spaced apart from each other, a gate dielectric layer on a portion of the semiconductor substrate between the first and second doped regions, a magnetic tunnel junction on the gate dielectric layer, word lines on the magnetic tunnel junction extending in a first direction which is the same direction as the second doped region, bit lines connected to the first doped region in a second direction perpendicular to the first direction, and an insulating layer covering the gate dielectric layer, the magnetic tunnel junction, and the word lines. The single transistor type magnetic random access memory device has a simple circuit structure, has a prolonged lifetime and is easy to manufacture.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: May 10, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-wook Kim, In-kyeong Yoo, Jung-hyun Sok, June-key Lee
  • Publication number: 20050095775
    Abstract: A memory device having one transistor and one resistant element as a storing means and a method for driving the memory device, includes an NPN-type transistor formed on a semiconductor substrate, an interlayer insulating film formed on the semiconductor substrate to cover the transistor in which a contact hole exposing a source region of the transistor is formed, a resistant material in which a bit data “0” or “1” is written connected to the source region of the transistor by a conductive plug or an insulating film, and a conductive plate contacting the resistant material. The memory device exhibits improved degree of integration, reduced current consumption by lengthening a refresh period thereof, and enjoys simplified manufacturing process due to a simple memory cell structure.
    Type: Application
    Filed: November 24, 2004
    Publication date: May 5, 2005
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In-Kyeong Yoo, Sun-ae Seo, Hyun-jo Kim
  • Patent number: 6885138
    Abstract: A ferroelectric multi-layered emitter used in a semiconductor lithography process includes a lower electrode, a ferroelectric layer, having a top surface with two end portions, which overlies the lower electrode, an insertion electrode formed on a region excluding the two end portions of the top surface of the ferroelectric layer, a dielectric layer, having sides and a top surface with two end portions, which has a predetermined pattern and is formed along the top surface of the ferroelectric layer and the insertion electrode, and a dummy upper electrode formed on a side of the dielectric layer opposite the ferroelectric layer. The ferroelectric emitter of the present invention guarantees uniform electron emission from wide and narrow gaps of a mask layer and in an isolated pattern such as a doughnut shape for ferroelectric switching emission lithography.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: April 26, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: In-Kyeong Yoo
  • Publication number: 20050077833
    Abstract: An emitter for an electron-beam projection lithography system includes a photoconductor substrate, an insulating layer formed on a front surface of the photoconductor substrate, a gate electrode layer formed on the insulating layer, and a base electrode layer formed on a rear surface of the photoconductor substrate and formed of a transparent conductive material. In operation of the emitter, a voltage is applied between the base electrode and the gate electrode layer, light is projected onto a portion of the photoconductor substrate to convert the portion of the photoconductor substrate into a conductor such that electrons are emitted only from the partial portion where the light is projected. Since the emitter can partially emit electrons, partial correcting, patterning or repairing of a subject electron-resist can be realized.
    Type: Application
    Filed: October 13, 2004
    Publication date: April 14, 2005
    Inventors: In-kyeong Yoo, Chang-wook Moon, Chang-hoon Choi
  • Patent number: 6870173
    Abstract: An electron-beam focusing apparatus for controlling a path of electron beams emitted from an electron-beam emitter in an electron-beam projection lithography (EPL) system includes top and bottom magnets for creating a magnetic field within a vacuum chamber, the top and bottom magnets disposed above and below the vacuum chamber into which a wafer is loaded, respectively; upper and lower pole pieces magnetically contacting the top and bottom magnets, respectively, the upper and lower pole pieces penetrating a top wall and a bottom wall of the vacuum chamber, respectively; and upper and lower projections having a circular shape, extending outwardly from facing surfaces of the upper and lower pole pieces, respectively.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: March 22, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-wook Moon, In-kyeong Yoo, Dong-wook Kim
  • Patent number: 6867999
    Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: March 15, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Byong-man Kim
  • Publication number: 20050036379
    Abstract: A single transistor type magnetic random access memory device and a method of operating and manufacturing the same, wherein the single transistor type magnetic random access memory device includes a substrate, first and second doped regions spaced apart from each other, a gate dielectric layer on a portion of the semiconductor substrate between the first and second doped regions, a magnetic tunnel junction on the gate dielectric layer, word lines on the magnetic tunnel junction extending in a first direction which is the same direction as the second doped region, bit lines connected to the first doped region in a second direction perpendicular to the first direction, and an insulating layer covering the gate dielectric layer, the magnetic tunnel junction, and the word lines. The single transistor type magnetic random access memory device has a simple circuit structure, has a prolonged lifetime and is easy to manufacture.
    Type: Application
    Filed: September 28, 2004
    Publication date: February 17, 2005
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-wook Kim, In-kyeong Yoo, Jung-hyun Sok, June-key Lee
  • Patent number: 6838727
    Abstract: A memory device having one transistor and one resistant element as a storing means and a method for driving the memory device, includes an NPN-type transistor formed on a semiconductor substrate, an interlayer insulating film formed on the semiconductor substrate to cover the transistor in which a contact hole exposing a source region of the transistor is formed, a resistant material in which a bit data “0” or “1” is written connected to the source region of the transistor by a conductive plug or an insulating film, and a conductive plate contacting the resistant material. The memory device exhibits improved degree of integration, reduced current consumption by lengthening a refresh period thereof, and enjoys simplified manufacturing process due to a simple memory cell structure.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: January 4, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Sun-ae Seo, Hyun-jo Kim
  • Publication number: 20040245557
    Abstract: A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage unit connected to a drain of the transistor. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges.
    Type: Application
    Filed: May 25, 2004
    Publication date: December 9, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sun-Ae Seo, In-Kyeong Yoo, Myoung-Jae Lee, Wan-Jun Park
  • Patent number: 6815681
    Abstract: An electron beam lithography apparatus, which uses a patterned emitter, includes a pyroelectric plate emitter that emits electrons using a patterned metal thin layer formed on the pyroelectric plate as a mask. When the emitter is heated, electrons are emitted from portions of the emitter covered with a patterned dielectric layer, and not from portions of the emitter covered with a patterned metal thin layer, and a pattern of the emitter is thereby projected onto a substrate. To prevent dispersion of emitted electron beams, the electron beams may be controlled by a permanent magnet, an electro-magnet, or a deflector unit. A one-to-one or x-to-one projection of a desired pattern on the substrate is thereby obtained.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: November 9, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-wook Kim, In-kyeong Yoo, Chang-wook Moon, In-sook Kim
  • Patent number: 6815783
    Abstract: A single transistor type magnetic random access memory device and a method of operating and manufacturing the same, wherein the single transistor type magnetic random access memory device includes a substrate, first and second doped regions spaced apart from each other, a gate dielectric layer on a portion of the semiconductor substrate between the first and second doped regions, a magnetic tunnel junction on the gate dielectric layer, word lines on the magnetic tunnel junction extending in a first direction which is the same direction as the second doped region, bit lines connected to the first doped region in a second direction perpendicular to the first direction, and an insulating layer covering the gate dielectric layer, the magnetic tunnel junction, and the word lines. The single transistor type magnetic random access memory device has a simple circuit structure, has a prolonged lifetime and is easy to manufacture.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: November 9, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-wook Kim, In-kyeong Yoo, Jung-hyun Sok, June-key Lee
  • Patent number: 6794666
    Abstract: An electron emission lithography apparatus and method using a selectively grown carbon nanotube as an electron emission source, wherein the electron emission lithography apparatus includes an electron emission source installed within a chamber and a stage, which is separated from the electron emission source by a predetermined distance and on which a sample is mounted, and wherein the electron emission source is a carbon nanotube having electron emission power. Since a carbon nanotube is used as an electron emission source, a lithography process can be performed with a precise critical dimension that prevents a deviation from occurring between the center of a substrate and the edge thereof and may realize a high throughput.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: September 21, 2004
    Assignee: Samsugn Electronics Co., Ltd.
    Inventors: Won-bong Choi, In-kyeong Yoo
  • Publication number: 20040178364
    Abstract: An electron beam lithography apparatus for providing one-to-one or x-to-one projection of a pattern includes a pyroelectric emitter, which is disposed a predetermined distance apart from a substrate holder, the pyroelectric emitter including a pyroelectric plate having a dielectric plate on a surface thereof and a patterned semiconductor thin film on the dielectric plate facing the substrate holder, a heating source for heating the pyroelectric emitter, and either a pair of magnets disposed beyond the pyroelectric emitter and the substrate holder, respectively, or a deflection unit disposed between the pyroelectric emitter and the substrate holder, to control paths of electrons emitted by the pyroelectric emitter. In operation, when the pyroelectric emitter is heated in a vacuum, electrons are emitted from portions of the pyroelectric plate that are not covered by the patterned semiconductor thin film.
    Type: Application
    Filed: March 10, 2004
    Publication date: September 16, 2004
    Inventors: Dong-wook Kim, In-kyeong Yoo, Chang-wook Moon
  • Publication number: 20040173755
    Abstract: An electron-beam focusing apparatus for controlling a path of electron beams emitted from an electron-beam emitter in an electron-beam projection lithography (EPL) system includes top and bottom magnets for creating a magnetic field within a vacuum chamber, the top and bottom magnets disposed above and below the vacuum chamber into which a wafer is loaded, respectively; upper and lower pole pieces magnetically contacting the top and bottom magnets, respectively, the upper and lower pole pieces penetrating a top wall and a bottom wall of the vacuum chamber, respectively; and upper and lower projections having a circular shape, extending outwardly from facing surfaces of the upper and lower pole pieces, respectively.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 9, 2004
    Inventors: Chang-wook Moon, In-kyeong Yoo, Dong-wook Kim
  • Patent number: 6784438
    Abstract: An electron projection lithography apparatus using secondary electrons includes a secondary electron emitter which is spaced apart from a substrate holder by a first predetermined interval and has a patterned mask formed on a surface thereof to face the substrate holder, a primary electron emitter which is spaced apart by a second predetermined interval from the secondary electron emitter in a direction opposite to the substrate holder and emits primary electrons to the secondary electron emitter, a second power supply which applies a second predetermined voltage between the substrate holder and the secondary electron emitter, a first power supply which applies a first predetermined voltage between the secondary electron emitter and the primary electron emitter, and a magnetic field generator which controls a path of secondary electrons emitted from the secondary electron emitter.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: August 31, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Chang-wook Moon, Dong-wook Kim
  • Publication number: 20040160816
    Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.
    Type: Application
    Filed: February 12, 2004
    Publication date: August 19, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: In-kyeong Yoo, Byong-man Kim
  • Publication number: 20040155283
    Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 12, 2004
    Applicant: SAMSUNG ELECTRONICS CO, LTD.
    Inventors: In-kyeong Yoo, Byong-man Kim