Abstract: A method and apparatus for fabricating an emitter by colliding an arc with the surface of a wafer inside a vacuum chamber are provided. The apparatus includes: a vacuum chamber in which a wafer is inserted; a magnetic field generating unit for generating a uniform magnetic field inside the vacuum chamber; an electric field generating unit for forming an electric field parallel to the magnetic field inside the vacuum chamber; and a master emitter for emitting electrons towards the wafer. The electrons emitted from the master emitter move along the magnetic field and the electric field. The arc is generated when the electric field or the driving voltage surpasses a threshold by controlling the strength of the electric field and the driving voltage of the master emitter. Thus, the surface of the wafer is instantaneously melted and solidified by the arc, thereby forming the emitter with a sharp tip on the surface of the wafer.

Abstract: A memory device with a silicon rich oxide layer and a method of manufacturing the same are provided. The memory device with a silicon rich oxide layer may include a semiconductor substrate, source/drain regions formed on the semiconductor substrate, and a gate structure formed on the semiconductor substrate. The gate structure may contact with the source/drain regions and may include a silicon oxide layer with a silicon content greater than that of a silicon oxide layer (SiO2).

Abstract: An emitter for an electron-beam projection lithography (EPL) system and a manufacturing method therefor are provided. The electron-beam emitter includes a substrate, an insulating layer overlying the substrate, and a gate electrode including a base layer formed on top of the insulating layer to a uniform thickness and an electron-beam blocking layer formed on the base layer in a predetermined pattern. The manufacturing method includes steps of: preparing a substrate; forming an insulating layer on the substrate; forming a base layer of a gate electrode by depositing a conductive metal on the insulating layer to a predetermined thickness; forming an electron-beam blocking layer of the gate electrode by depositing a metal capable of anodizing on the base layer to a predetermined thickness; and patterning the electron-beam blocking layer in a predetermined pattern by anodizing. The emitter provides a uniform electric field within the insulating layer and simplify the manufacturing method therefor.

Abstract: A nonvolatile memory device having two or more resistors and methods of forming and using the same. A nonvolatile memory device having two resistance layers, and more particularly, to a nonvolatile memory device formed and operated using a resistance layer having memory switching characteristics and a resistance layer having threshold switching characteristics. The nonvolatile semiconductor memory device may include a lower electrode; a first resistance layer having at least two resistance characteristics formed on the lower electrode, a second resistance layer having threshold switching characteristics formed on the first resistance layer, and an upper electrode formed on the second resistance layer.

Abstract: A nonvolatile memory device including one resistor and one transistor. The resistor may correspond to a resistance layer electrically connected to a first impurity region and a second impurity region of the transistor.

Abstract: A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially stacked on the first conductive layer, a first current direction limiting unit and a second current direction limiting unit formed on the second conductive layer by being separated within a space, a third conductive layer and a fourth conductive layer formed on the first current direction limiting unit and the second current direction limiting unit, respectively, a word line connected to the third conductive layer, a bit line connected to the fourth conductive layer, and a voltage lowering unit connected to the word line.

Abstract: A nonvolatile memory device and method that uses a resistor having various resistance states. The memory device may include a switching device and a resistor. The resistor may be electrically connected with the switching device and may have one reset resistance state and at least two or more set resistance states.

Abstract: A nonvolatile memory device including a lower electrode, a resistor structure disposed on the lower electrode, a diode structure disposed on the resistor structure, and an upper electrode disposed on the diode structure. A nonvolatile memory device wherein the resistor structure includes one resistor and the diode structure includes one diode. An array of nonvolatile memory devices as described above.

Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.

Abstract: A fast, reliable, highly integrated memory device formed of a carbon nanotube memory device and a method for forming the same, in which the carbon nanotube memory device includes a substrate, a source electrode, a drain electrode, a carbon nanotube having high electrical and thermal conductivity, a memory cell having excellent charge storage capability, and a gate electrode. The source electrode and drain electrode are arranged with a predetermined interval between them on the substrate and are subjected to a voltage. The carbon nanotube connects the source electrode to the drain electrode and serves as a channel for charge movement. The memory cell is located over the carbon nanotube and stores charges from the carbon nanotube. The gate electrode is formed in contact with the upper surface of the memory cell and controls the amount of charge flowing from the carbon nanotube into the memory cell.

Abstract: A memory device having one transistor and one resistant element as a storing means and a method for driving the memory device, includes an NPN-type transistor formed on a semiconductor substrate, an interlayer insulating film formed on the semiconductor substrate to cover the transistor in which a contact hole exposing a source region of the transistor is formed, a resistant material in which a bit data “0” or “1” is written connected to the source region of the transistor by a conductive plug or an insulating film, and a conductive plate contacting the resistant material. The memory device exhibits improved degree of integration, reduced current consumption by lengthening a refresh period thereof, and enjoys simplified manufacturing process due to a simple memory cell structure.

Abstract: An MRAM having improved integration density and ability to use a magnetic tunneling junction (MTJ) layer having a low MR ratio, and methods for manufacturing and driving the same, are disclosed. The MRAM includes a semiconductor substrate having a bipolar junction transistor (BJT) formed thereon, a bit line coupled to an emitter of the BJT, an MTJ layer coupled to the BJT, a word line coupled to the MTJ layer, a plate line coupled to the BJT so as to be spaced apart from the MTJ layer, and an interlayer dielectric formed between components of the MRAM, wherein the MTJ layer is coupled to a base and a collector of the BJT, the plate line is coupled to the collector, and an amplifying unit for amplifying a signal while data is read out from the MTJ layer is coupled to the bit line, thereby allowing precise reading of the data.

Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.

Abstract: An optical recording medium having a phase transition material film and a method of manufacturing the optical recording medium are provided. In the method, first, a phase transition material film, a sacrificial film, and a metal film are sequentially stacked on a substrate. Next, the metal film is anodized to form a metal oxide film having a plurality of holes, and portions of the sacrificial film exposed through the holes are anode-oxidized to form oxide films. Thereafter, the phase transition material film is patterned by removing the metal oxide film and by etching the sacrificial film and the phase transition material film using the oxide films as a mask. Then, the oxide films are removed from the sacrificial film, and an upper insulation film, a reflection film, and a protection film are deposited on the upper surface of the patterned phase transition material film.

Abstract: A single transistor type magnetic random access memory device and a method of operating and manufacturing the same, wherein the single transistor type magnetic random access memory device includes a substrate, first and second doped regions spaced apart from each other, a gate dielectric layer on a portion of the semiconductor substrate between the first and second doped regions, a magnetic tunnel junction on the gate dielectric layer, word lines on the magnetic tunnel junction extending in a first direction which is the same direction as the second doped region, bit lines connected to the first doped region in a second direction perpendicular to the first direction, and an insulating layer covering the gate dielectric layer, the magnetic tunnel junction, and the word lines. The single transistor type magnetic random access memory device has a simple circuit structure, has a prolonged lifetime and is easy to manufacture.

Abstract: A memory device using a multi-layer with a graded resistance change is provided. The memory device includes: a lower electrode; a data storage layer being located on the lower electrode and having the graded resistance change; and an upper electrode being located on the data storage layer.

Abstract: An emitter for an electron-beam projection lithography (EPL) system and a manufacturing method therefor are provided. The electron-beam emitter includes a substrate, an insulating layer overlying the substrate, and a gate electrode including a base layer formed on top of the insulating layer to a uniform thickness and an electron-beam blocking layer formed on the base layer in a predetermined pattern. The manufacturing method includes steps of: preparing a substrate; forming an insulating layer on the substrate; forming a base layer of a gate electrode by depositing a conductive metal on the insulating layer to a predetermined thickness; forming an electron-beam blocking layer of the gate electrode by depositing a metal capable of anodizing on the base layer to a predetermined thickness; and patterning the electron-beam blocking layer in a predetermined pattern by anodizing. The emitter provides a uniform electric field within the insulating layer and simplify the manufacturing method therefor.

Abstract: Provided is a method of manufacturing a memory device that comprises a gate including uniformly distributed silicon nano dots. The method includes forming a gate on a substrate, the gate including, stacked in sequence an insulating film, nano dot layers separated by a predetermined lateral distance, and a conductive film pattern, forming a source region and a drain region contacting the gate in the substrate, and forming first and second metal layers on the source region and the drain region, respectively.

Abstract: Provided are a method of horizontally growing carbon nanotubes and a carbon nanotube device. The method includes: depositing an aluminum layer on a substrate; forming an insulating layer over the substrate to cover the aluminum layer; patterning the insulating layer and the aluminum layer on the substrate to expose a side of the aluminum layer; forming a plurality of holes in the exposed side of the aluminum layer to a predetermined depth; depositing a catalyst metal layer on the bottoms of the holes; and horizontally growing the carbon nanotubes from the catalyst metal layer. The carbon nanotubes can be grown in directions rather that horizontally relative to the substrate when laid flat.

Abstract: A single transistor type magnetic random access memory device and a method of operating and manufacturing the same, wherein the single transistor type magnetic random access memory device includes a substrate, first and second doped regions spaced apart from each other, a gate dielectric layer on a portion of the semiconductor substrate between the first and second doped regions, a magnetic tunnel junction on the gate dielectric layer, word lines on the magnetic tunnel junction extending in a first direction which is the same direction as the second doped region, bit lines connected to the first doped region in a second direction perpendicular to the first direction, and an insulating layer covering the gate dielectric layer, the magnetic tunnel junction, and the word lines. The single transistor type magnetic random access memory device has a simple circuit structure, has a prolonged lifetime and is easy to manufacture.