Abstract: In a fishing rod having a hand grip and a reel clamped to and held above the rod, the improvement wherein there is provided between the rod and the clamp on the underside of the rod a unitary piece having an elongate central section free of lateral protuberances which is laterally curved to essentially match the curvature of the fishing rod, aligned with the elongate central section at one end and integral therewith a curved finger grip terminating in a free distal end, and also aligned with the elongate central section at its opposite end and integral therewith a projection having an opening therein adapted to receive the hook portion of fishing hook.

Abstract: A wastewater treatment system for treating wastewater by processes which include aeration. The system includes an influent conduit for delivery of wastewater to be processed and a treatment tank for processing of the wastewater. Also included is an air conduit for providing compressed air for aeration of the wastewater and a particle size regulation device disposed between the conduit and the tank, wherein the particle size regulation device regulates a size of particles present in the wastewater to provide particle size regulated wastewater. The system also includes at least one aeration jet having a nozzle diameter sized to allow the particle size regulated wastewater to pass through the nozzle.

Abstract: The present invention provides nucleic acid molecules which may be used as standards for estimating the size (in base pairs) and mass of linear, double-stranded or single-stranded nucleic acid molecules separated by size. The nucleic acid molecules of the invention may be DNA molecules, RNA molecules or DNA/RNA hybrid molecules, and may be double-stranded or single-stranded. The invention also provides methods for producing nucleic acid sizing ladders from these nucleic acid molecules, ladders produced by such methods, and methods for estimating the size and mass of nucleic acid molecules by comparison to these nucleic acid sizing ladders.

Abstract: A method and apparatus for improved performance for reloading translation look-aside buffers in multithreading, multi-core processors. TSB prediction is accomplished by hashing a plurality of data parameters and generating an index that is provided as an input to a predictor array to predict the TSB page size. In one embodiment of the invention, the predictor array comprises two-bit saturating up-down counters that are used to enhance the accuracy of the TSB prediction. The saturating up-down counters are configured to avoid making rapid changes in the TSB prediction upon detection of an error. Multiple misses occur before the prediction output is changed. The page size specified by the predictor index is searched first. Using the technique described herein, errors are minimized because the counter leads to the correct result at least half the time.

Abstract: In one embodiment, a processor comprises a first register file configured to store speculative register state, a second register file configured to store committed register state, a check circuit and a control unit. The first register file is protected by a first error protection scheme and the second register file is protected by a second error protection scheme. A check circuit is coupled to receive a value and corresponding one or more check bits read from the first register file to be committed to the second register file in response to the processor selecting a first instruction to be committed. The check circuit is configured to detect an error in the value responsive to the value and the check bits. Coupled to the check circuit, the control unit is configured to cause reexecution of the first instruction responsive to the error detected by the check circuit.

Abstract: Methods, systems, and computer storage media having computer-executable instructions embodied thereon that, when executed, perform methods in accordance with embodiments hereof, for emulating execution of divergent program execution paths to determine whether any “would be” program defects exist in a particular divergent program execution path and/or to determine the nature of such “would be” program defects are provided. The dynamic execution state (e.g., register values and memory locations) of a program being executed is cloned at a point of potential divergence and a virtual processor having the same dynamic execution state is generated. Subsequently, utilizing the virtual processor, a test trace is initiated along the divergent program execution path and information gathered during the test trace is analyzed to identify any program defects that may have occurred had the program execution followed the divergent path.

Abstract: This invention is directed to a wastewater treatment system having a fluidizable media carrying anoxic bacteria in a first treatment zone and a filter membrane positioned in a second treatment zone. A wastewater is contacted with the fluidizable media and further contacted with air and a filter membrane.

Abstract: A wastewater treatment system for treating wastewater by processes which include aeration. The system includes an influent conduit for delivery of wastewater to be processed and a treatment tank for processing of the wastewater. Also included is an air conduit for providing compressed air for aeration of the wastewater and a particle size regulation device disposed between the conduit and the tank, wherein the particle size regulation device regulates a size of particles present in the wastewater to provide particle size regulated wastewater. The system also includes at least one aeration jet having a nozzle diameter sized to allow the particle size regulated wastewater to pass through the nozzle.

Abstract: A method for tracing of instructions executed by a processor is provided which includes providing a type of instruction to be traced and tracing at least one instruction corresponding to the type of instruction. The method further includes storing data without stopping from the tracing into a memory until the memory is full.

Abstract: In one embodiment, a processor comprises a plurality of processor cores and an interconnect to which the plurality of processor cores are coupled. Each of the plurality of processor cores comprises at least one translation lookaside buffer (TLB). A first processor core is configured to broadcast a demap command on the interconnect responsive to executing a demap operation. The demap command identifies one or more translations to be invalidated in the TLBs, and remaining processor cores are configured to invalidate the translations in the respective TLBs. The remaining processor cores transmit a response to the first processor core, and the first processor core is configured to delay continued processing subsequent to the demap operation until the responses are received from each of the remaining processor cores.

Abstract: This invention is directed to a wastewater treatment system having a fluidizable media carrying anoxic bacteria in a first treatment zone and a filter membrane positioned in a second treatment zone. A wastewater is contacted with the fluidizable media and further contacted with air and a filter membrane.

Abstract: A lighting model specified in light space may be transformed to a 3D scene, which may include numerous lights. When the lighting model is transformed to the 3D scene and is uniformly scaled or near-uniformly scaled, intensity or brightness of light at sample points, corresponding to points in the 3D scene, may be adjusted proportionately for a light source using a value based, at least partly, on a transform matrix. When the lighting model in the light space is scaled to non-uniformly stretch a lit area, the sample points may be transformed to the light space, using an inverse of a transform matrix. Distances from the light source to the transformed sample points in the light space may be used to determine attenuation and range with respect to the light source.

Abstract: The present invention provides a method and apparatus for increased efficiency for translation lookaside buffers by collapsing redundant translation table entries into a single translation table entry (TTE). In the present invention, each thread of a multithreaded processor is provided with multiple context registers. Each of these context registers is compared independently to the context of the TTE. If any of the contexts match (and the other match conditions are satisfied), then the translation is allowed to proceed. Two applications attempting to share one page but that still keep separate pages can then employ three total contexts. One context is for one application's private use; one of the contexts is for the other application's private use; and a third context is for the shared page. In one embodiment of the invention, two contexts are implemented per thread. However, the teachings of the present invention can be extended to a higher number of contexts per thread.

Abstract: In one embodiment, a processor comprises a register file, register management logic coupled to the register file, and at least two sources of window swap operations coupled to the register management logic. The register management logic is configured to control an interface to the register file to switch register windows in the register file in response to one or more window swap operations. The sources of window swap operations and the register management logic are configured to cooperate according to an arbitration scheme to arbitrate between conflicting window swap operations to be performed using the interface. In one particular implementation, for example, block signals may be used from higher priority sources to lower priority sources to block issuance of window swap operations by the lower priority sources.

Abstract: A container (210) for holding granular/powdered material and formed by a top wall (212), a bottom wall (214), a front wall (216), a rear wall (218), a first side wall (220), and a second side wall (222). A removable lid (D) is interiorly mounted with a scoop (32) and is hinged to a collar (300) that includes a sealing gasket (330). The collar (300) mounts to the walls of the container (210). A sealing wall 240 of the lid (D) cooperates with the gasket (330) to prevent the contents from spilling. The container (210) incorporates sealing features, and a geometry for container wall junctions (50) that can have curvilinear and angled or rectilinear profiles. A scoop 32 is releasably carried in the lid (L, D) and can include a rim portion (36,a,b,c) that can be formed and or flexed to be congruent to the profiles.

Abstract: A telephone device such as a speaker phone or message recording device is remotely controlled either as a standalone device or as part of a security system. The telephone device can be controlled by a key fob or other user-operated transmitter that a user actuates to answer a call by speaker phone, end a call, place a call, or control functions of the message recording device such as playing back messages. The key fob transmits a wireless signal that is received and processed by a security system. In response, the security system controls the telephone device. The key fob may control security functions as well. In another approach, the key fob may control the telephone device directly without intervention of a security system. Or, the key fob may control the telephone device via a home automation network.

Abstract: A container comprising a top wall, a bottom wall, a front wall, a rear wall, a first side wall, and a second side wall. Each of the walls has a substantially rectangular shape. The rectangular shape of each wall enables the container to be stored easily on a shelf or counter-top. The top wall and portions of the front wall, the rear wall, the first side wall, and the second side wall form a lid. The lid is pivotally attached to the rear wall by a hinge. The lid can be opened by rotation thereof about the hinge. The front wall has at least one recess and the rear wall has at least one recess. The at least one recess of the front wall and the at least one recess of the rear wall are adjacent to the first side wall. The recesses provide a grip feature, which enables the user to manipulate the lid of the container with one hand when the container rests on a flat surface, e.g., a tabletop or a counter top.

Abstract: A method and system of processing a cryptographic packet includes receiving a first cryptographic packet in a host CPU. A first set of data required to execute the first cryptographic packet is identified. The first cryptographic packet and the required first set of data is transferred to a cryptographic co-processor. The first cryptographic packet is executed in the cryptographic co-processor. The host CPU is notified that the execution of the first cryptographic packet is complete. The executed first cryptographic packet is received in the host CPU.