Patents by Inventor Jürgen Off

Jürgen Off has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200119227
    Abstract: A semiconductor layer sequence and a method for producing a semiconductor layer sequence are disclosed. In an embodiment a semiconductor layer sequence includes a first nitridic compound semiconductor layer, an intermediate layer, a second nitridic compound semiconductor layer and an active layer, wherein the intermediate layer comprises an AlGaN layer with an Al content of at least 5%, wherein the second nitridic compound semiconductor layer has a lower proportion of Al than the AlGaN layer such that relaxed lattice constants of the AlGaN layer of the intermediate layer and of the second nitridic compound semiconductor layer differ, wherein the second nitridic compound semiconductor layer and the active layer are grown on the intermediate layer in a lattice-matched manner, wherein the active layer comprises one or more layers of AlInGaN, and wherein an In content in each of the layers of AlInGaN is at most 12%.
    Type: Application
    Filed: October 24, 2017
    Publication date: April 16, 2020
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Werner BERGBAUER, Lise LAHOURCADE, Jürgen OFF
  • Publication number: 20200035858
    Abstract: A method for manufacturing light emitting diodes and a light emitting diode are disclosed. In an embodiment a method includes growing an n-conductive n-layer, growing an active zone for generating ultraviolet radiation, growing a p-conductive p-layer, producing a p-type semiconductor contact layer having a varying thickness and having a plurality of thickness maxima directly on the p-type layer and applying an ohmic-conductive electrode layer directly on the semiconductor contact layer, wherein each the n-layer and the active zone is based on AlGaN, the p-layer is based on AlGaN or InGaN and the semiconductor contact layer is a GaN layer, wherein the thickness maxima have an area concentration of at least 104 cm?2 in a top view, and wherein the p-layer is only partially covered by the semiconductor contact layer in the top view.
    Type: Application
    Filed: March 13, 2018
    Publication date: January 30, 2020
    Inventors: Bastian Galler, Jürgen Off
  • Patent number: 10475959
    Abstract: The invention relates to a method for producing a nitride semiconductor component (100), comprising the steps of: —providing a growth substrate (1) having a growth surface (10) formed from a planar area (11) with a plurality of three-dimensionally shaped surface structures (12) on said planar area (11), —growing a nitride-based semiconductor layer sequence (30) on the growth surface (10), growth beginning selectively on a growth area (13) of said growth substrate, and the growth area (13) being less than 45% of the growth surface (10). The invention also relates to a nitride semiconductor component (100) which can be produced according to said method.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: November 12, 2019
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Tobias Gotschke, Bastian Galler, Juergen Off, Werner Bergbauer, Thomas Lehnhardt
  • Patent number: 10388828
    Abstract: A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: August 20, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Matthias Peter, Tobias Meyer, Alexander Walter, Tetsuya Taki, Juergen Off, Rainer Butendeich, Joachim Hertkorn
  • Publication number: 20190245110
    Abstract: A semiconductor chip and a method for producing a semiconductor chip are disclosed. In an embodiment an electronic semiconductor chip includes a growth substrate with a growth surface, which is formed by a planar region having a plurality of three-dimensional surface structures on the planar region, a nucleation layer composed of oxygen-containing AlN directly disposed on the growth surface and a nitride-based semiconductor layer sequence disposed on the nucleation layer, wherein the semiconductor layer sequence is selectively grown from the planar region such that a growth of the semiconductor layer sequence on surfaces of the three-dimensional surface structures is reduced or non-existent compared to a growth on the planar region, and wherein a selectivity of the growth of the semiconductor layer sequence on the planar region is targetedly adjusted by an oxygen content of the nucleation layer.
    Type: Application
    Filed: April 15, 2019
    Publication date: August 8, 2019
    Inventors: Werner Bergbauer, Thomas Lehnhardt, Jürgen Off, Joachim Hertkorn
  • Patent number: 10312401
    Abstract: A method for producing an electronic semiconductor chip and a semiconductor chip are disclosed. In embodiments, the method includes providing a growth substrate having a growth surface formed by a flat region having a plurality of three-dimensional surface structures on the flat region, directly applying a nucleation layer of oxygen-containing AlN over a large area to the growth surface and growing a nitride-based semiconductor layer sequence on the nucleation layer, wherein growing the semiconductor layer sequence includes selectively growing the semiconductor layer sequence upwards from the flat region.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: June 4, 2019
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Werner Bergbauer, Thomas Lehnhardt, Jürgen Off, Joachim Hertkorn
  • Patent number: 10249787
    Abstract: The invention relates to a component (10) having a semiconductor layer sequence, which has a p-conducting semiconductor layer (1), an n-conducting semiconductor layer (2), and an active zone (3) arranged between the p-conducting semiconductor layer and the n-conducting semiconductor layer, wherein the active zone has a multiple quantum well structure, which, from the p-conducting semiconductor layer to the n-conducting semiconductor layer, has a plurality of p-side barrier layers (32p) having intermediate quantum well layers (31) and a plurality of n-side barrier layers (32n) having intermediate quantum layers (31). Recesses (4) having flanks are formed in the semiconductor layer sequence on the part of the p-conducting semiconductor layer, wherein the quantum well layers and/or the n- and p-side barrier layers extend in a manner conforming to the flanks of the recesses at least in regions. The interior barrier layers have a larger average layer thickness than the p-side barrier layers.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: April 2, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Tobias Meyer, Thomas Lehnhardt, Matthias Peter, Asako Hirai, Juergen Off, Philipp Drechsel, Peter Stauss
  • Patent number: 10186423
    Abstract: A method for producing a plurality of semiconductor chips and a semiconductor chip are disclosed. The method includes applying a mask material on a growth surface of a growth substrate, wherein the growth surface includes sapphire, patterning the mask material into a multiply-connected mask layer by introducing openings into the mask material, wherein the growth surface is exposed at the bottom of at least some of the openings, applying a semiconductor layer sequence on the mask layer and on the growth surface and singulating at least the semiconductor layer sequence into the plurality of semiconductor chips, wherein each semiconductor chip includes lateral dimensions and the lateral dimensions are large compared to an average distance of the openings to the nearest opening.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: January 22, 2019
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Tobias Gotschke, Juergen Off, Korbinian Perzlmaier
  • Patent number: 10147601
    Abstract: What is specified is a method for producing a layer structure (10) as a buffer layer of a semiconductor component, said method comprising the following steps: a) provision of a carrier (1), which has a silicon surface (1a), b) deposition of a first layer sequence (2), which comprises a seeding layer (21) containing aluminum and nitrogen, on the silicon surface (1a) of the carrier (1) along a stacking direction (H) running perpendicular to a main plane of extent of the carrier (1), c) three-dimensional growth of a 3D-GaN layer (3), which is formed with gallium nitride, on a top surface (2a) of the first layer sequence (2) which is remote from the silicon surface (1a), d) two-dimensional growth of a 2D-GaN layer (4), which is formed with gallium nitride, on the outer surfaces (3a) of the 3D-GaN layer (3) which are remote from the silicon surface (1a).
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: December 4, 2018
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Philipp Drechsel, Werner Bergbauer, Juergen Off, Peter Stauss
  • Publication number: 20180175243
    Abstract: The invention relates to a method for producing a nitride semiconductor component (100), comprising the steps of: —providing a growth substrate (1) having a growth surface (10) formed from a planar area (11) with a plurality of three-dimensionally shaped surface structures (12) on said planar area (11), —growing a nitride-based semiconductor layer sequence (30) on the growth surface (10), growth beginning selectively on a growth area (13) of said growth substrate, and the growth area (13) being less than 45% of the growth surface (10). The invention also relates to a nitride semiconductor component (100) which can be produced according to said method.
    Type: Application
    Filed: June 15, 2016
    Publication date: June 21, 2018
    Inventors: Tobias GOTSCHKE, Bastian GALLER, Juergen OFF, Werner BERGBAUER, Thomas LEHNHARDT
  • Publication number: 20180083160
    Abstract: The invention relates to a component (10) having a semiconductor layer sequence, which has a p-conducting semiconductor layer (1), an n-conducting semiconductor layer (2), and an active zone (3) arranged between the p-conducting semiconductor layer and the n-conducting semiconductor layer, wherein the active zone has a multiple quantum well structure, which, from the p-conducting semiconductor layer to the n-conducting semiconductor layer, has a plurality of p-side barrier layers (32p) having intermediate quantum well layers (31) and a plurality of n-side barrier layers (32n) having intermediate quantum layers (31). Recesses (4) having flanks are formed in the semiconductor layer sequence on the part of the p-conducting semiconductor layer, wherein the quantum well layers and/or the n- and p-side barrier layers extend in a manner conforming to the flanks of the recesses at least in regions. The interior barrier layers have a larger average layer thickness than the p-side barrier layers.
    Type: Application
    Filed: March 1, 2016
    Publication date: March 22, 2018
    Inventors: Tobias MEYER, Thomas LEHNHARDT, Matthias PETER, Asako HIRAI, Juergen OFF, Philipp DRECHSEL, Peter STAUSS
  • Publication number: 20170324001
    Abstract: A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.
    Type: Application
    Filed: July 21, 2017
    Publication date: November 9, 2017
    Inventors: Matthias Peter, Tobias Meyer, Alexander Walter, Tetsuya Taki, Juergen Off, Rainer Butendeich, Joachim Hertkorn
  • Publication number: 20170309481
    Abstract: A method for producing a plurality of semiconductor chips and a semiconductor chip are disclosed. The method includes applying a mask material on a growth surface of a growth substrate, wherein the growth surface includes sapphire, patterning the mask material into a multiply-connected mask layer by introducing openings into the mask material, wherein the growth surface is exposed at the bottom of at least some of the openings, applying a semiconductor layer sequence on the mask layer and on the growth surface and singulating at least the semiconductor layer sequence into the plurality of semiconductor chips, wherein each semiconductor chip includes lateral dimensions and the lateral dimensions are large compared to an average distance of the openings to the nearest opening.
    Type: Application
    Filed: September 1, 2015
    Publication date: October 26, 2017
    Inventors: Tobias Gotschke, Juergen Off, Korbinian Perzlmaier
  • Patent number: 9799797
    Abstract: A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: October 24, 2017
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Matthias Peter, Tobias Meyer, Alexander Walter, Tetsuya Taki, Juergen Off, Rainer Butendeich, Joachim Hertkorn
  • Patent number: 9786498
    Abstract: Described is a method for producing a nitride compound semiconductor layer, involving the steps of:—depositing a first seed layer (1) comprising a nitride compound semiconductor material on a substrate (10);—desorbing at least some of the nitride compound semiconductor material in the first seed layer from the substrate (10);—depositing a second seed layer (2) comprising a nitride compound semiconductor material; and—growing the nitride compound semiconductor layer (3) containing a nitride compound semiconductor material onto the second seed layer (2).
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: October 10, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Juergen Off, Matthias Peter, Thomas Lehnhardt, Werner Bergbauer
  • Patent number: 9761758
    Abstract: An optoelectronic semiconductor component includes a layer sequence including a p-doped layer, an n-doped layer and an active zone that generates electromagnetic radiation arranged between the n-doped layer and the p-doped layer, wherein the n-doped layer includes at least GaN, an interlayer is arranged in the n-doped layer, wherein the interlayer includes AlxGa1-xN, wherein 0<x?1, and the interlayer includes magnesium.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: September 12, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Tobias Meyer, Matthias Peter, Jürgen Off, Alexander Walter, Tobias Gotschke, Christian Leirer
  • Patent number: 9728674
    Abstract: The invention concerns an optoelectronic component comprising a layer structure with a light-active layer. In a first lateral region the light-active layer has a higher density of V-defects than in a second lateral region.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: August 8, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Christian Leirer, Tobias Meyer, Matthias Peter, Juergen Off, Joachim Hertkorn, Andreas Loeffler, Alexander Walter, Dario Schiavon
  • Publication number: 20170141265
    Abstract: A semiconductor chip and a method for producing a semiconductor chip are disclosed. In an embodiment, the semiconductor chip includes a semiconductor layer sequence and a structured substrate including a surface, wherein the surface is in contact with the semiconductor layer sequence, wherein the surface has a structure of depressions, each depression is delimited at an underside by a smooth end region, or wherein the surface has a structure of elevations, each elevation is delimited at a top side by a smooth end region, and wherein the end regions are laterally spaced apart with respect to one another.
    Type: Application
    Filed: June 3, 2015
    Publication date: May 18, 2017
    Inventor: Juergen Off
  • Patent number: 9620673
    Abstract: An optoelectronic device includes a carrier on which a semiconductor layer sequence is applied, said semiconductor layer sequence including an n-doped semiconductor layer and a p-doped semiconductor layer such that a p-n junction is formed which includes an active zone that generates electromagnetic radiation, wherein at least one of the n-doped semiconductor layer and the p-doped semiconductor layer includes a doped region having a first doping concentration greater than a second doping concentration in a surrounding area of the region in the semiconductor layer including the region.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: April 11, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Tobias Meyer, Christian Leirer, Lorenzo Zini, Jürgen Off, Andreas Löffler, Adam Bauer
  • Publication number: 20170053795
    Abstract: Described is a method for producing a nitride compound semiconductor layer, involving the steps of:—depositing a first seed layer (1) comprising a nitride compound semiconductor material on a substrate (10);—desorbing at least some of the nitride compound semiconductor material in the first seed layer from the substrate (10);—depositing a second seed layer (2) comprising a nitride compound semiconductor material; and—growing the nitride compound semiconductor layer (3) containing a nitride compound semiconductor material onto the second seed layer (2).
    Type: Application
    Filed: February 12, 2015
    Publication date: February 23, 2017
    Inventors: Juergen OFF, Matthias PETER, Thomas LEHNHARDT, Werner BERGBAUER