Patents by Inventor Jae-hyoung Choi

Jae-hyoung Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160197136
    Abstract: The inventive concepts provide semiconductor devices and methods for manufacturing the same in which the method includes forming a capacitor including a bottom electrode, a dielectric layer and a top electrode sequentially stacked on a substrate, and also where formation of the top electrode includes forming a first metal nitride layer on the dielectric layer, and forming a second metal nitride layer on the first metal nitride layer, in which the first metal nitride layer is disposed between the dielectric layer and the second metal nitride layer, and the first metal nitride layer is formed at a temperature lower than a temperature at which the second metal nitride layer is formed.
    Type: Application
    Filed: December 14, 2015
    Publication date: July 7, 2016
    Inventors: Se Hoon Oh, Seongyul Park, Chin Moo Cho, Yunjung Choi, Gyu-Hee Park, Youn-Joung Cho, Younsoo Kim, Jae Hyoung Choi
  • Publication number: 20160197081
    Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.
    Type: Application
    Filed: March 17, 2016
    Publication date: July 7, 2016
    Inventors: Ki-Yeon Park, Jae-Hyoung CHOI, Vladimir URAZAEV, Jin-Ha JEONG
  • Patent number: 9349583
    Abstract: Methods of fabricating a semiconductor device include forming a deposited film on a semiconductor substrate in a process chamber by repeatedly forming unit layers on the semiconductor substrate. The unit layer is formed by forming a preliminary unit layer on the semiconductor substrate by supplying a process material including a precursor material and film-control material into the process chamber, purging the process chamber, forming a unit layer from the preliminary unit layer, and again purging the process chamber. The precursor material includes a central atom and a ligand bonded to the central atom, and the film-control material includes a hydride of the ligand.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: May 24, 2016
    Assignee: Samsung Electronis Co., Ltd.
    Inventors: Min-Young Park, Youn-Soo Kim, Sang-Yeol Kang, Cha-Young Yoo, Jae-Soon Lim, Jae-Hyoung Choi
  • Patent number: 9324781
    Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: April 26, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Yeon Park, Jae-Hyoung Choi, Vladimir Urazaev, Jin-Ha Jeong
  • Publication number: 20150243727
    Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.
    Type: Application
    Filed: May 11, 2015
    Publication date: August 27, 2015
    Inventors: Ki-Yeon Park, Jae-Hyoung Choi, Vladimir Urazaev, Jin-Ha Jeong
  • Patent number: 9059331
    Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: June 16, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Yeon Park, Jae-Hyoung Choi, Vladimir Urazaev, Jin-Ha Jeong
  • Patent number: 9059330
    Abstract: Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: June 16, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hyoung Choi, Jung-hee Chung, Cha-young Yoo, Young-sun Kim, Se-hoon Oh
  • Publication number: 20150031186
    Abstract: A semiconductor device having a dielectric layer with improved electrical characteristics and associated methods, the semiconductor device including a lower metal layer, a dielectric layer, and an upper metal layer sequentially disposed on a semiconductor substrate and an insertion layer disposed between the dielectric layer and at least one of the lower metal layer and the upper metal layer, wherein the dielectric layer includes a metal oxide film and the insertion layer includes a metallic material film.
    Type: Application
    Filed: October 9, 2014
    Publication date: January 29, 2015
    Inventors: Youn-soo KIM, Jae-hyoung CHOI, Kyu-ho CHO, Wan-don KIM, Jae-soon LIM, Sang-yeol KANG
  • Patent number: 8859383
    Abstract: A semiconductor device having a dielectric layer with improved electrical characteristics and associated methods, the semiconductor device including a lower metal layer, a dielectric layer, and an upper metal layer sequentially disposed on a semiconductor substrate and an insertion layer disposed between the dielectric layer and at least one of the lower metal layer and the upper metal layer, wherein the dielectric layer includes a metal oxide film and the insertion layer includes a metallic material film.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: October 14, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youn-soo Kim, Jae-hyoung Choi, Kyu-ho Cho, Wan-don Kim, Jae-soon Lim, Sang-yeol Kang
  • Publication number: 20140256112
    Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 11, 2014
    Inventors: Ki-Yeon Park, Jae-Hyoung Choi, Vladimir Urazaev, Jin-Ha Jeong
  • Patent number: 8790986
    Abstract: A method of manufacturing a semiconductor device, the method including: preparing a semiconductor substrate including a mold layer and a support layer disposed on the mold layer; forming multiple holes that pass through the mold layer and the support layer; forming multiple bottom electrodes in the holes; exposing at least a portion of the bottom electrodes by removing at least a portion of the mold layer; removing a portion of the bottom electrodes from an exposed surface of the bottom electrodes; and sequentially forming a dielectric layer and a top electrode layer on the bottom electrodes.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: July 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Hyoung Choi, Ki Yeon Park, Joon Kim, Cha Young Yoo, Youn Soo Kim, Ho Jun Kwon, Sang Yeol Kang
  • Patent number: 8685494
    Abstract: A method of forming a metal thin film can reduce leakage current while improving electric properties by improving step coverage of a device. The method of forming a metal thin film includes supplying a metal precursor including chlorine, purging byproducts produced after the supplying of the metal precursor by injecting a purge gas, supplying a reactant to allow the reactant and the metal precursor to react with each other to form a thin film layer, and purging the byproducts produced after the reaction by injecting a purge gas, wherein before the supplying of the metal precursor, the method further includes supplying a reactant to be adsorbed on a treated product.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: April 1, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Soon Lim, Jae-Hyoung Choi, Youn-Soo Kim, Min-Young Park, Sang-Yeol Kang
  • Patent number: 8563085
    Abstract: In a method of forming a layer, a precursor composition including a metal and a ligand chelating to the metal is stabilized by contacting the precursor composition with an electron donating compound to provide a stabilized precursor composition onto a substrate. A reactant is introduced onto the substrate to bind to the metal in the stabilized precursor composition. The stabilized precursor composition is provided onto the substrate by introducing the precursor composition onto the substrate after the electron donating compound is introduced onto the substrate. The electron donating compound is continuously introduced onto the substrate during and after the precursor composition is introduced.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: October 22, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youn-Joung Cho, Youn-Soo Kim, Kyu-Ho Cho, Jung-Ho Lee, Jae-Hyoung Choi, Seung-Min Ryu
  • Publication number: 20130244445
    Abstract: Methods of fabricating a semiconductor device include forming a deposited film on a semiconductor substrate in a process chamber by repeatedly forming unit layers on the semiconductor substrate. The unit layer is formed by forming a preliminary unit layer on the semiconductor substrate by supplying a process material including a precursor material and film-control material into the process chamber, purging the process chamber, forming a unit layer from the preliminary unit layer, and again purging the process chamber. The precursor material includes a central atom and a ligand bonded to the central atom, and the film-control material includes a hydride of the ligand.
    Type: Application
    Filed: February 25, 2013
    Publication date: September 19, 2013
    Inventors: Min-Young Park, Youn-Soo Kim, Sang-Yeol Kang, Cha-Young Yoo, Jae-Soon Lim, Jae-Hyoung Choi
  • Publication number: 20130130465
    Abstract: Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
    Type: Application
    Filed: December 17, 2012
    Publication date: May 23, 2013
    Inventors: Jae-hyoung Choi, Jung-hee Chung, Cha-young Yoo, Young-sun Kim, Se-hoo Oh
  • Patent number: 8357613
    Abstract: A method of fabricating a semiconductor device includes depositing tungsten on an insulating layer in which a contact hole is formed by chemical vapor deposition (CVD), performing chemical mechanical planarization (CMP) on the tungsten to expose the insulating layer and form a tungsten contact plug, and performing rapid thermal oxidation (RTO) on the tungsten contact plug in an oxygen atmosphere such that the tungsten expands volumetrically into tungsten oxide (W?O?).
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: January 22, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Suk-Hun Choi, Chang-Ki Hong, Jae-Hyoung Choi, Yoon-Ho Son, Min-Young Park, Yong-Suk Tak
  • Patent number: 8344439
    Abstract: Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: January 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hyoung Choi, Jung-hee Chung, Cha-young Yoo, Young-sun Kim, Se-hoon Oh
  • Publication number: 20120225548
    Abstract: To form a dielectric layer, an organometallic precursor is adsorbed on a substrate loaded into a process chamber. The organometallic precursor includes a central metal and ligands bound to the central metal. An inactive oxidant is provided onto the substrate. The inactive oxidant is reactive with the organometallic precursor. An active oxidant is also provided onto the substrate. The active oxidant has a higher reactivity than that of the inactive oxidant.
    Type: Application
    Filed: February 21, 2012
    Publication date: September 6, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: SANG-YEOL KANG, SUK-JIN CHUNG, YOUN-SOO KIM, JAE-HYOUNG CHOI, JAE-SOON LIM, MIN-YOUNG PARK
  • Publication number: 20120178254
    Abstract: A semiconductor device having a dielectric layer with improved electrical characteristics and associated methods, the semiconductor device including a lower metal layer, a dielectric layer, and an upper metal layer sequentially disposed on a semiconductor substrate and an insertion layer disposed between the dielectric layer and at least one of the lower metal layer and the upper metal layer, wherein the dielectric layer includes a metal oxide film and the insertion layer includes a metallic material film.
    Type: Application
    Filed: March 20, 2012
    Publication date: July 12, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Youn-soo KIM, Jae-hyoung Choi, Kyu-ho Cho, Wan-don Kim, Jae-soon Lim, Sang-yeol Kang
  • Publication number: 20120094022
    Abstract: Provided is a method of forming a metal thin film which can reduce leakage current while improving electric properties by improving step coverage of a device. The method of forming a metal thin film includes supplying a metal precursor including chlorine, purging byproducts produced after the supplying of the metal precursor by injecting a purge gas, supplying a reactant to allow the reactant and the metal precursor to react with each other to form a thin film layer, and purging the byproducts produced after the reaction by injecting a purge gas, wherein before the supplying of the metal precursor, the method further includes supplying a reactant to be adsorbed on a treated product.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 19, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Soon Lim, Jae-Hyoung Choi, Youn-Soo Kim, Min-Young Park, Sang-Yeol Kang