Patents by Inventor Jae Il Kim

Jae Il Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICES AND OPERATIONS THEREOF
    Publication number: 20180040363
    Abstract: A semiconductor device may be provided. The semiconductor device may include a power-down signal generation circuit and a refresh signal generation circuit. The power-down signal generation circuit may be configured to generate a power-down signal which is enabled during a power-down operation period based on a multi-operation signal that is generated by decoding commands. The refresh signal generation circuit may be configured to generate a refresh signal which is enabled during a refresh operation period based on the multi-operation signal and an operation selection signal.
    Type: Application
    Filed: June 14, 2017
    Publication date: February 8, 2018
    Applicant: SK hynix Inc.
    Inventors: Ki Hun KWON, Jae Il KIM
  • Video encoding method for encoding division block, video decoding method for decoding division block, and recording medium for implementing the same
    Patent number: 9888259
    Abstract: Disclosed are a method of encoding a division block in video encoding and a method of decoding a division block in video decoding. An input picture is divided into encoding unit blocks. The encoding unit blocks are divided into sub-blocks. The sub-blocks are encoded by selectively using at least one of intra prediction encoding and inter prediction encoding. A decoding process is performed through a reverse process of the encoding method. When pixel values of an encoding unit block are encoded in video encoding, the flexibility in selecting an encoding mode is increased and the efficiency of encoding is increased.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: February 6, 2018
    Assignees: Korea Advanced Institute of Science and Technology, Korean Broadcasting System
    Inventors: Mun Churl Kim, Bum Shik Lee, Jae Il Kim, Chang Seob Park, Sang Jin Hahm, In Joon Cho, Keun Sik Lee, Byung Sun Kim
  • Semiconductor memory apparatus converting serial type data into parallel type data in response to pipe control signals and pipe control signals during a training operation
    Patent number: 9875807
    Abstract: A semiconductor memory apparatus may include a data conversion control block configured to control the number of pipe input control signals and the number of pipe output control signals which are enabled, in response to a training control signal. The semiconductor memory apparatus may also include a data conversion block configured to receive parallel data and output serial data, in response to the pipe input control signals and the pipe output control signals.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: January 23, 2018
    Assignee: SK hynix Inc.
    Inventor: Jae Il Kim
  • POLYAMIDE-IMIDE PRECURSOR, POLYAMIDE-IMIDE FILM AND DISPLAY DEVICE COMPRISING SAME
    Publication number: 20180002486
    Abstract: This invention relates to a polyamide-imide precursor, a polyamide-imide obtained by imidizing the same, a polyamide-imide film, and an image display device including the film. The polyamide-imide precursor includes, in a molecular structure thereof, a first block, obtained by copolymerizing monomers including dianhydride and diamine, and a second block, obtained by copolymerizing monomers including an aromatic dicarbonyl compound and aromatic diamine. The dianhydride includes biphenyltetracarboxylic acid dianhydride (BPDA) and 2-bis(3,4-dicarboxyphenyl)hexafluoropropane dianhydride (6FDA), and the diamine includes bistrifluoromethylbenzidine (TFDB).
    Type: Application
    Filed: December 30, 2015
    Publication date: January 4, 2018
    Applicant: KOLON INDUSTRIES, INC.
    Inventors: Jae Il KIM, Hak Gee JUNG
  • Nonvolatile memory circuit and memory device including same
    Patent number: 9859024
    Abstract: A nonvolatile memory circuit may include: a cell array including a first region comprising a plurality of first cell groups and a second region comprising a plurality of second cell groups, each of the first and second cell groups having one or more nonvolatile memory cells; and a control unit suitable for controlling the cell array to sequentially output repair addresses of the plurality of cells groups included in a region which is not over used among the first and second regions when one of the first and second regions is over used.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: January 2, 2018
    Assignee: SK Hynix Inc.
    Inventors: Jong-Sam Kim, Jae-Il Kim
  • SEMICONDUCTOR DEVICES
    Publication number: 20170372760
    Abstract: A semiconductor device includes a first rank and a second rank. The first rank operates in synchronization with a clock signal in response to a first rank selection signal, and the second rank operates in synchronization with the clock signal in response to a second rank selection signal. The first rank performs a termination operation without performing an internal control operation if the first rank selection signal maintains an enabled state in synchronization with a first edge and a second edge of the clock signal.
    Type: Application
    Filed: June 8, 2017
    Publication date: December 28, 2017
    Applicant: SK hynix Inc.
    Inventor: Jae Il KIM
  • SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM
    Publication number: 20170365311
    Abstract: A semiconductor device may include a division control circuit and a latch circuit. The division control circuit may be configured to divide an external clock to generate a first preliminary divided clock and a second preliminary divided clock. The division control circuit may be configured to output the first and second preliminary divided clocks or any one of the first and second preliminary divided clocks as first and second divided clocks. The latch circuit may be configured to latch an external control signal in response to the first and second divided clocks and configured to output latched signals as first and second latch control signals.
    Type: Application
    Filed: June 5, 2017
    Publication date: December 21, 2017
    Applicant: SK hynix Inc.
    Inventor: Jae Il KIM
  • IMPEDANCE CALIBRATION CIRCUIT
    Publication number: 20170366169
    Abstract: An impedance calibration circuit is disclosed, which relates to a technology for improving precision of pad resistance. The impedance calibration circuit includes: a first On Die Termination (ODT) circuit selected by a first selection signal, configured to tune its own resistance using a first code signal, and output a first resistance value to an output terminal; and a second ODT circuit selected by a second selection signal, configured to tune its own resistance using a second code signal, and output a second resistance value to the output terminal.
    Type: Application
    Filed: September 6, 2017
    Publication date: December 21, 2017
    Applicant: SK hynix Inc.
    Inventors: Seung Geun BAEK, Jae Il KIM
  • SEMICONDUCTOR MEMORY DEVICE AND REFRESH METHOD OF SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20170352400
    Abstract: A semiconductor memory device may include a row address generating circuit, a row active pulse generating circuit and a word line activating circuit. The row address generating circuit may generate a row address in response to a refresh command, a row active pulse, and a normal address. The row active pulse generating circuit may generate a row active pulse in response to a refresh signal and an active signal. The word line activating circuit may selectively enable a word line in response to the row address and the row active pulse.
    Type: Application
    Filed: April 11, 2017
    Publication date: December 7, 2017
    Applicant: SK hynix Inc.
    Inventor: Jae Il KIM
  • Video encoding method for encoding division block, video decoding method for decoding division block, and recording medium for implementing the same
    Patent number: 9838720
    Abstract: Disclosed are a method of encoding a division block in video encoding and a method of decoding a division block in video decoding. An input picture is divided into encoding unit blocks. The encoding unit blocks are divided into sub-blocks. The sub-blocks are encoded by selectively using at least one of intra prediction encoding and inter prediction encoding. A decoding process is performed through a reverse process of the encoding method. When pixel values of an encoding unit block are encoded in video encoding, the flexibility in selecting an encoding mode is increased and the efficiency of encoding is increased.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: December 5, 2017
    Assignees: Korea Advanced Institute of Science and Technology, Korean Broadcasting System
    Inventors: Mun Churl Kim, Bum Shik Lee, Jae Il Kim, Chang Seob Park, Sang Jin Hahm, In Joon Cho, Keun Sik Lee, Byung Sun Kim
  • Video encoding method for encoding division block, video decoding method for decoding division block, and recording medium for implementing the same
    Patent number: 9838721
    Abstract: Disclosed are a method of encoding a division block in video encoding and a method of decoding a division block in video decoding. An input picture is divided into encoding unit blocks. The encoding unit blocks are divided into sub-blocks. The sub-blocks are encoded by selectively using at least one of intra prediction encoding and inter prediction encoding. A decoding process is performed through a reverse process of the encoding method. When pixel values of an encoding unit block are encoded in video encoding, the flexibility in selecting an encoding mode is increased and the efficiency of encoding is increased.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: December 5, 2017
    Assignees: Korea Advanced Institute of Science and Technology, Korean Broadcasting System
    Inventors: Mun Churl Kim, Bum Shik Lee, Jae Il Kim, Chang Seob Park, Sang Jin Hahm, In Joon Cho, Keun Sik Lee, Byung Sun Kim
  • Video encoding method for encoding division block, video decoding method for decoding division block, and recording medium for implementing the same
    Patent number: 9838722
    Abstract: Disclosed are a method of encoding a division block in video encoding and a method of decoding a division block in video decoding. An input picture is divided into encoding unit blocks. The encoding unit blocks are divided into sub-blocks. The sub-blocks are encoded by selectively using at least one of intra prediction encoding and inter prediction encoding. A decoding process is performed through a reverse process of the encoding method. When pixel values of an encoding unit block are encoded in video encoding, the flexibility in selecting an encoding mode is increased and the efficiency of encoding is increased.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: December 5, 2017
    Assignees: Korea Advanced Institute of Science and Technology, Korean Broadcasting System
    Inventors: Mun Churl Kim, Bum Shik Lee, Jae Il Kim, Chang Seob Park, Sang Jin Hahm, In Joon Cho, Keun Sik Lee, Byung Sun Kim
  • Refresh control device and semiconductor device including the same
    Patent number: 9818469
    Abstract: A refresh control device may include a command decoder configured to decode a command signal and a specific address, and output a refresh signal, an active signal and a row hammer refresh signal. The refresh control device may include a refresh controller configured to output an active address, a row hammer address and a refresh address based on the refresh signal, the active signal, the row hammer refresh signal and a latch address. The refresh control device may include a combiner configured to combine the active address, the row hammer address and the refresh address, and output a refresh control signal.
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: November 14, 2017
    Assignee: SK hynix Inc.
    Inventors: Dae Suk Kim, Jae Il Kim
  • Memory device and operating method thereof
    Patent number: 9818491
    Abstract: A memory device includes a plurality of memory cells for storing data; a plurality of memory cells for storing data; a non-volatile memory unit; a test control unit suitable for detecting weak memory cells among the plurality of memory cells; a program control unit suitable for controlling addresses of the detected weak memory cells to be programmed in the non-volatile memory unit; and a refresh control unit suitable for refreshing the addresses stored in the non-volatile memory unit more frequently than other memory cells.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: November 14, 2017
    Assignee: SK Hynix Inc.
    Inventors: Jong-Sam Kim, Jae-Il Kim
  • Impedance calibration circuit
    Patent number: 9787287
    Abstract: An impedance calibration circuit is disclosed, which relates to a technology for improving precision of pad resistance. The impedance calibration circuit includes: a first On Die Termination (ODT) circuit selected by a first selection signal, configured to tune its own resistance using a first code signal, and output a first resistance value to an output terminal; and a second ODT circuit selected by a second selection signal, configured to tune its own resistance using a second code signal, and output a second resistance value to the output terminal.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: October 10, 2017
    Assignee: SK hynix Inc.
    Inventors: Seung Geun Baek, Jae Il Kim
  • Semiconductor device
    Patent number: 9761330
    Abstract: A semiconductor device may include a refresh counter configured to output a plurality of refresh addresses by counting a refresh signal; a check signal generator configured to generate a check signal according to a logic level of any one specific refresh address among the plurality of refresh addresses during a refresh operation, and output the check signal in response to a redundancy check pulse signal; a redundancy checker configured to store information on whether a redundancy cell was used, in response to the check signal, the redundancy check pulse signal and the plurality of refresh addresses, and output a word line control signal according to whether the redundancy cell was used; and a refresh controller configured to control a row address for selectively enabling a word line and a redundancy word line of a cell array in response to the word line control signal.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: September 12, 2017
    Assignee: SK hynix Inc.
    Inventor: Jae Il Kim
  • HIGHLY FUNCTIONAL NATURAL MATERIAL-DERIVED EPOXY RESIN, PREPARATION METHOD THEREFOR, AND EPOXY RESIN CURING COMPOSITION USING SAME
    Publication number: 20170253692
    Abstract: Disclosed are a highly functional natural material-derived epoxy resin, a preparation method therefor, and an epoxy resin curing composition using the same. The highly functional natural material-derived epoxy resin represented by chemical formula 1 is obtained by reacting a compound, represented by chemical formula 2, and epichlorohydrin (ECH), which is obtained by using glycerin as a starting material, in the presence of a hydroxide salt.
    Type: Application
    Filed: June 9, 2015
    Publication date: September 7, 2017
    Inventors: HYE SEUNG LEE, JAE IL KIM
  • Semiconductor device and semiconductor system
    Patent number: 9747984
    Abstract: A semiconductor device may include a ZQ calibration circuit, a reference code setting circuit, a variable information generating circuit, and an internal circuit. The ZQ calibration circuit may perform a ZQ calibration operation in response to a ZQ calibration enable signal to generate a ZQ calibration code. The reference code generating circuit may output a predetermined code value as a reference code. The variable information generating circuit may compare the ZQ calibration code to the reference code to generate variable information. The internal circuit may determine operation timings based on a difference between the ZQ calibration code and the reference code.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: August 29, 2017
    Assignee: SK hynix Inc.
    Inventors: Seung Geun Baek, Jae Il Kim
  • DEVICE FOR CONTROLLING A REFRESH OPERATION TO A PLURALITY OF BANKS IN A SEMICONDUCTOR DEVICE
    Publication number: 20170243632
    Abstract: A refresh control device may include a plurality of latch circuits configured to receive an active signal, a refresh signal, an active control signal, and a refresh control signal, and output a word line enable signal for controlling a refresh operation to banks. The refresh control device may include a command decoder configured to decode a row address in correspondence to an external command signal and generate the active signal and the refresh signal. The refresh control device may include an address buffer configured to buffer an active address and generate the active control signal. The refresh control device may include an address control circuit configured to generate the refresh control signal in correspondence to a refresh command signal.
    Type: Application
    Filed: June 1, 2016
    Publication date: August 24, 2017
    Inventors: Min Su PARK, Jae Il KIM
  • Semiconductor memory apparatus and operating method thereof
    Patent number: 9740556
    Abstract: A semiconductor memory apparatus may include an error check and correction circuit block configured to receive a plurality of cell data, and output error-checked data and error data discrimination signals after receiving an error check enable signal; and a data bus inversion circuit block configured to receive the plurality of cell data, and output the plurality of cell data by inverting or non-inverting the cell data after receiving a read data bus inversion enable signal, the error check enable signal and the error data discrimination signals.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: August 22, 2017
    Assignee: SK hynix Inc.
    Inventor: Jae Il Kim