Patents by Inventor James G. Hermerding, II

James G. Hermerding, II has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160252942
    Abstract: In one embodiment, a system includes: a plurality of compute nodes to couple in a chassis; a first shared power supply to provide a baseline power level to the plurality of compute nodes; and an auxiliary power source to provide power to one or more of the plurality of compute nodes during operation at a higher power level than the baseline power level. Other embodiments are described and claimed.
    Type: Application
    Filed: February 27, 2015
    Publication date: September 1, 2016
    Inventors: Ankush Varma, Vasudevan Srinivasan, Eugene Gorbatov, Andrew D. Henroid, Barnes Cooper, David W. Browning, Guy M. Therien, Neil W. Songer, Krishnakanth V. Sistla, James G. Hermerding, II
  • Publication number: 20160239068
    Abstract: In one embodiment, a processor includes at least one core to execute instructions and a power control logic to receive power capability information from a plurality of devices to couple to the processor and allocate a platform power budget to the devices, set a first power level for the devices at which the corresponding device is allocated to be powered, communicate the first power level to the devices, and dynamically reduce a first power to be allocated to a first device and increase a second power to be allocated to a second device responsive to a request from the second device for a higher power level. Other embodiments are described and claimed.
    Type: Application
    Filed: February 17, 2015
    Publication date: August 18, 2016
    Inventors: ANKUSH VARMA, KRISHNAKANTH V. SISTLA, VASUDEVAN SRINIVASAN, EUGENE GORBATOV, ANDREW D. HENROID, BARNES COOPER, DAVID W. BROWNING, GUY M. THERIEN, NEIL W. SONGER, JAMES G. HERMERDING, II
  • Publication number: 20160216754
    Abstract: A technique to change a thermal design power (TDP) value. In one embodiment, one or more environmental or user-driven changes may cause a processor's TDP value to be changed. Furthermore, in some embodiments a change in TDP may alter a turbo mode target frequency.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 28, 2016
    Inventors: ERIC DISTEFANO, GUY M. THERIEN, VASUDEVAN SRINIVASAN, TAWFIK M. RAHAL-ARABI, VENKATESH RAMANI, RYAN D. WELLS, STEPHEN H. GUNTHER, JEREMY J. SHRALL, JAMES G. HERMERDING, II
  • Patent number: 9395774
    Abstract: Methods and apparatus relating to total platform power control are described. In one embodiment, power consumption by one or more processor cores of a processor and one or more components coupled to the processor are modified based on a total platform power consumption value. The platform, in turn, includes the processor and the one or more components. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: July 19, 2016
    Assignee: Intel Corporation
    Inventors: Efraim Rotem, James G. Hermerding, II, Ruoying Ma, Jorge P. Rodriguez, Nir Rosenzweig
  • Publication number: 20150377955
    Abstract: An apparatus and method for a user configurable reliability control loop. For example, one embodiment of a processor comprises: a reliability meter to track accumulated stress on components of the processor based on measured processor operating conditions; and a controller to receive stress rate limit information from a user or manufacturer and to responsively specify a set of N operating limits on the processor in accordance with the accumulated stress and the stress rate limit information; and performance selection logic to output one or more actual operating conditions for the processor based on the N operating limits specified by the controller.
    Type: Application
    Filed: June 30, 2014
    Publication date: December 31, 2015
    Inventors: Dorit Shapira, Krishnakanth V. Sistla, Efraim Rotem, Eric Distefano, James G. Hermerding, II, Esfir Natanzon
  • Patent number: 9176550
    Abstract: An apparatus may comprise a power management system. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: November 3, 2015
    Assignee: INTEL CORPORATION
    Inventors: Biswajit Sur, Eric Distefano, James G. Hermerding, II, Eugene P. Matter, John P. Wallace, Guy M. Therien
  • Patent number: 9152473
    Abstract: Methods and apparatus relating to table driven multiple passive trip, platform passive thermal management are described. In one embodiment, the power consumption limit of one or more components of a platform is modified based on one or more thermal relationships between one or more power consuming components of the platform and one or more heat generating components of the platform. Furthermore, a first relationship of the one or more thermal relationships indicates a mapping between a plurality of temperature thresholds and a corresponding plurality of performance limits. Other embodiments are also claimed and disclosed.
    Type: Grant
    Filed: December 29, 2012
    Date of Patent: October 6, 2015
    Assignee: Intel Corporation
    Inventors: James G. Hermerding, II, Ramya Subramanian, Vasudevan Srinivasan
  • Publication number: 20150100799
    Abstract: Embodiments of an apparatus, system and method are described for configurable processor thermal management. An apparatus may comprise, for example, a processor arranged to operate in a plurality of thermal modes comprising a thermal limit down mode, a normal thermal limit mode and a thermal limit up mode, and thermal management logic operative to select a thermal mode based on one or more properties of the apparatus. Other embodiments are described and claimed.
    Type: Application
    Filed: December 15, 2014
    Publication date: April 9, 2015
    Applicant: INTEL CORPORATION
    Inventors: Ketan R. Shah, Tawfik M. Rahal-Arabi, Eric Distefano, James G. Hermerding, II
  • Publication number: 20150100800
    Abstract: Embodiments of an apparatus, system and method are described for configurable processor thermal management. An apparatus may comprise, for example, a processor arranged to operate in a plurality of thermal modes comprising a thermal limit down mode, a normal thermal limit mode and a thermal limit up mode, and thermal management logic operative to select a thermal mode based on one or more properties of the apparatus. Other embodiments are described and claimed.
    Type: Application
    Filed: December 15, 2014
    Publication date: April 9, 2015
    Applicant: INTEL CORPORATION
    Inventors: Ketan R. Shah, Tawfik M. Rahal-Arabi, Eric Distefano, James G. Hermerding, II
  • Patent number: 8943336
    Abstract: Embodiments of an apparatus, system and method are described for configurable processor thermal management. An apparatus may comprise, for example, a processor arranged to operate in a plurality of thermal modes comprising a thermal limit down mode, a normal thermal limit mode and a thermal limit up mode, and thermal management logic operative to select a thermal mode based on one or more properties of the apparatus. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: January 27, 2015
    Assignee: Intel Corporation
    Inventors: Ketan R. Shah, Tawfik M. Rahal-Arabi, Eric Distefano, James G. Hermerding, II
  • Publication number: 20140281634
    Abstract: Methods and apparatus relating to controlling power consumption by a Power Supply Unit (PSU) during idle state are described. In one embodiment, a power supply unit enters a lower power consumption state (e.g. S9) based on power state information, corresponding to one or more components of the platform, and comparison of a first value (corresponding to a frequency/frequentness of entry into the lower power consumption state) to a first threshold value. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Inventors: EFRAIM ROTEM, BENJAMIN J. GOULD, JAMES G. HERMERDING, II, JORGE P. RODRIGUEZ, ALON NAVEH, NIR ROSENZWEIG, VIJAY S. R. DEGALAHAL
  • Patent number: 8816539
    Abstract: Systems and methods of managing platform power consumption may involve determining a power consumption level of a platform based on at least in part a current supplied by an AC adaptor. A power limit of an integrated circuit in the platform can be determined based on at least in part the power consumption level of the platform, wherein the power level may be applied to the integrated circuit.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: August 26, 2014
    Assignee: Intel Corporation
    Inventors: James G. Hermerding, II, Jorge P. Rodriguez, Vasudevan Srinivasan
  • Publication number: 20140189378
    Abstract: Methods and apparatus relating to table driven multiple passive trip, platform passive thermal management are described. In one embodiment, the power consumption limit of one or more components of a platform is modified based on one or more thermal relationships between one or more power consuming components of the platform and one or more heat generating components of the platform. Furthermore, a first relationship of the one or more thermal relationships indicates a mapping between a plurality of temperature thresholds and a corresponding plurality of performance limits. Other embodiments are also claimed and disclosed.
    Type: Application
    Filed: December 29, 2012
    Publication date: July 3, 2014
    Inventors: James G. Hermerding, II, Ramya Subramanian, Vasudevan Srinivasan
  • Publication number: 20140189376
    Abstract: Methods and apparatus relating to total platform power control are described. In one embodiment, power consumption by one or more processor cores of a processor and one or more components coupled to the processor are modified based on a total platform power consumption value. The platform, in turn, includes the processor and the one or more components. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 28, 2012
    Publication date: July 3, 2014
    Inventors: Efraim Rotem, James G. Hermerding, II, Ruoying Ma, Jorge P. Rodriguez, Nir Rosenzweig
  • Publication number: 20140188302
    Abstract: Methods and apparatus relating to priority based intelligent platform passive thermal management are described. In one embodiment, the power consumption limit of one or more components of a platform is modified based on one or more thermal relationships between one or more power consuming components of the platform and one or more heat generating components of the platform. Furthermore, a first relationship of the one or more thermal relationships indicates an influence priority of a source component of the platform on a target component of the platform. Other embodiments are also claimed and disclosed.
    Type: Application
    Filed: December 28, 2012
    Publication date: July 3, 2014
    Inventors: Vasudevan Srinivasan, James G. Hermerding, II, Ramya Subramanian
  • Publication number: 20140173305
    Abstract: An apparatus may include first circuitry coupled to one or more platform components, the first circuitry operative to receive an unfiltered input voltage signal, compare a first voltage level of the unfiltered input voltage signal to a first reference voltage level, and generate a control signal operative to lower operation power of one or more of the one or more platform components when the first voltage level is less than the first reference voltage level.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 19, 2014
    Inventors: ALEXANDER B. UAN-ZO-LI, Jorge P. Rodriguez, PHILIP R. LEHWALDER, PATRICK K. LEUNG, James G. Hermerding, II, Vasudevan Srinivasan
  • Publication number: 20130173946
    Abstract: Methods and apparatus relating to controlling power consumption through multiple power limits over multiple time intervals are described. In one embodiment, the level of power consumption by a computing device component (e.g., a processor or one of its processor cores) is modified based on a determined power limit value. The power limit value may be determined based on rolling power consumption averages over multiple time intervals and their comparison against multiple corresponding power limits. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Inventors: Efraim Rotem, Avinash N. Ananthakrishnan, Doron Rajwan, Eliezer Weissmann, Alon Naveh, James G. Hermerding, II, Riad Durr, Hisham Abu Salah
  • Publication number: 20130007440
    Abstract: Embodiments of an apparatus, system and method are described for configurable processor thermal management. An apparatus may comprise, for example, a processor arranged to operate in a plurality of thermal modes comprising a thermal limit down mode, a normal thermal limit mode and a thermal limit up mode, and thermal management logic operative to select a thermal mode based on one or more properties of the apparatus. Other embodiments are described and claimed.
    Type: Application
    Filed: July 1, 2011
    Publication date: January 3, 2013
    Inventors: Ketan R. Shah, Tawfik M. Rahal-Arabi, Eric Distefano, James G. Hermerding, II
  • Publication number: 20120166842
    Abstract: An apparatus may comprise a power management system. Other embodiments are described and claimed.
    Type: Application
    Filed: December 23, 2010
    Publication date: June 28, 2012
    Inventors: Biswajit Sur, Eric Distefano, James G. Hermerding, II, Eugene P. Matter, John P. Wallace, Guy M. Therien
  • Publication number: 20120001489
    Abstract: Systems and methods of managing platform power consumption may involve determining a power consumption level of a platform based on at least in part a current supplied by an AC adaptor. A power limit of an integrated circuit in the platform can be determined based on at least in part the power consumption level of the platform, wherein the power level may be applied to the integrated circuit.
    Type: Application
    Filed: June 30, 2010
    Publication date: January 5, 2012
    Inventors: James G. Hermerding, II, Jorge P. Rodriguez, Vasudevan Srinivasan