Patents by Inventor James M. Derderian

James M. Derderian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7064069
    Abstract: A method and intermediate structure for improving the thinning and planarity of a wafer back side utilizing planarization material applied to the back side prior to at least one portion of the thinning operation and which is subsequently removed concurrently with the wafer material by one or more suitable thinning or planarization techniques. The planarization material may be applied as a thin layer or film of a hardenable material to the rough, bare back side of a wafer to produce a planar surface when hardened. The planarization material is selected to exhibit a material removal rate approximating the removal rate of the wafer material for a given removal technique such as etching, mechanical abrasion or chemical-mechanical planarization (CMP). This approach to wafer thinning and planarization results in improved process control in the form of uniform material removal rates, reduction in wafer warpage, final surface smoothness and planarity, and even distribution of residual stresses.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: June 20, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Nathan R. Draney, James M. Derderian
  • Patent number: 7056812
    Abstract: A semiconductor wafer having a high degree of thinness and exhibiting an enhanced strength state. A layer of tenacious reinforcement material is disposed over a back side of the wafer while in a rough state from backgrinding without prior, conventional polishing or plasma etching of the back side. The thin layer or film of reinforcement material fills grooves, fractures and scratches in the back side of the wafer, enhance the rigidity of the wafer and provide a planar, smooth, back side surface layer. The reinforcement material counteracts internal stresses of the wafer tending to warp, crack and propagate lattice defects in the wafer. The reinforcement material may also be configured to act as a die attach adhesive, may provide an ionic barrier, and may remain as part of the packaging for semiconductor dice singulated from the wafer.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: June 6, 2006
    Assignee: Micron Technology, Inc.
    Inventors: James M. Derderian, Nathan R. Draney
  • Patent number: 6940181
    Abstract: A semiconductor wafer having a high degree of thinness and exhibiting an enhanced strength state. A layer of tenacious reinforcement material is disposed over, a back side of the wafer while in a rough state from backgrinding without prior, conventional polishing or plasma etching of the back side. The thin layer or film of reinforcement material fills grooves, fractures and scratches in the back side of the wafer, enhance the rigidity of the wafer and provide a planar, smooth, back side surface layer. The reinforcement material counteracts internal stresses of the wafer tending to warp, crack and propagate lattice defects in the wafer. The reinforcement material may also be configured to act as a die attach adhesive, may provide an ionic barrier, and may remain as part of the packaging for semiconductor dice singulated from the wafer.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: September 6, 2005
    Assignee: Micron Technology, Inc.
    Inventors: James M. Derderian, Nathan R. Draney
  • Patent number: 6870269
    Abstract: A method for assembling semiconductor devices includes providing a first semiconductor device, applying a volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device over the first semiconductor device and a portion of at least one discrete conductive element protruding thereabove. The adhesive material may be applied to a surface of the first semiconductor device prior to positioning the second semiconductor device thereover, or introduced between the first and second semiconductor devices. Upon curing, the predetermined volume of adhesive material spaces the first and second semiconductor devices a predetermined distance apart from one another. Additional semiconductor devices may also be added to the assembly. The first semiconductor device may be associated with a substrate. Semiconductor device assemblies and packages that are at least partially fabricated in accordance with the method are also disclosed.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: March 22, 2005
    Assignee: Micron Technology, Inc.
    Inventor: James M. Derderian
  • Patent number: 6869828
    Abstract: A method for assembling semiconductor devices includes providing a first semiconductor device, applying a volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device over the first semiconductor device and a portion of at least one discrete conductive element protruding thereabove. The adhesive material may be applied to a surface of the first semiconductor device prior to positioning the second semiconductor device thereover, or introduced between the first and second semiconductor devices. Upon curing, the predetermined volume of adhesive material spaces the first and second semiconductor devices a predetermined distance apart from one another. Additional semiconductor devices may also be added to the assembly. The first semiconductor device may be associated with a substrate. Semiconductor device assemblies and packages that are at least partially fabricated in accordance with the method are also disclosed.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: March 22, 2005
    Assignee: Micron Technology, Inc.
    Inventor: James M. Derderian
  • Publication number: 20040200885
    Abstract: A method for assembling semiconductor devices includes providing a first semiconductor device, securing spacers to noncircuit bond pads of the first semiconductor device, and positioning a second semiconductor device on the spacers. Adhesive material may be applied to a surface of one or both of the first and second semiconductor devices prior to positioning of the second semiconductor device, or introduced between first and second semiconductor devices. The noncircuit bond pads may be electrically isolated from other structures of the first semiconductor device or communicate with a ground or reference voltage plane, in which case the back side of the second semiconductor device may communicate with the ground or reference voltage plane upon being positioning against the spacers. Additional semiconductor devices may be added to the assembly. The first semiconductor device may be associated with a substrate. Assemblies and packages at least partially fabricated by the method are also disclosed.
    Type: Application
    Filed: April 29, 2004
    Publication date: October 14, 2004
    Inventor: James M. Derderian
  • Publication number: 20040157375
    Abstract: A method for assembling semiconductor devices includes providing a first semiconductor device, applying a volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device over the first semiconductor device and a portion of at least one discrete conductive element protruding thereabove. The adhesive material may be applied to a surface of the first semiconductor device prior to positioning the second semiconductor device thereover, or introduced between the first and second semiconductor devices. Upon curing, the predetermined volume of adhesive material spaces the first and second semiconductor devices a predetermined distance apart from one another. Additional semiconductor devices may also be added to the assembly. The first semiconductor device may be associated with a substrate. Semiconductor device assemblies and packages that are at least partially fabricated in accordance with the method are also disclosed.
    Type: Application
    Filed: February 2, 2004
    Publication date: August 12, 2004
    Inventor: James M. Derderian
  • Publication number: 20030176018
    Abstract: A method for assembling semiconductor devices includes providing a first semiconductor device, applying a volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device over the first semiconductor device and a portion of at least one discrete conductive element protruding thereabove. The adhesive material may be applied to a surface of the first semiconductor device prior to positioning the second semiconductor device thereover, or introduced between the first and second semiconductor devices. Upon curing, the predetermined volume of adhesive material spaces the first and second semiconductor devices a predetermined distance apart from one another. Additional semiconductor devices may also be added to the assembly. The first semiconductor device may be associated with a substrate. Semiconductor device assemblies and packages that are at least partially fabricated in accordance with the method are also disclosed.
    Type: Application
    Filed: May 27, 2003
    Publication date: September 18, 2003
    Inventor: James M. Derderian
  • Patent number: 6569709
    Abstract: A method for assembling semiconductor devices includes providing a first semiconductor device, applying a volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device over the first semiconductor device and a portion of at least one discrete conductive element protruding thereabove. The adhesive material may be applied to a surface of the first semiconductor device prior to positioning the second semiconductor device thereover, or introduced between the first and second semiconductor devices. Upon curing, the predetermined volume of adhesive material spaces the first and second semiconductor devices a predetermined distance apart from one another. Additional semiconductor devices may also be added to the assembly. The first semiconductor device may be associated with a substrate. Semiconductor device assemblies and packages that are at least partially fabricated in accordance with the method are also disclosed.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: May 27, 2003
    Assignee: Micron Technology, Inc.
    Inventor: James M. Derderian
  • Publication number: 20030071340
    Abstract: A method for assembling semiconductor devices includes providing a first semiconductor device, applying a volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device over the first semiconductor device and a portion of at least one discrete conductive element protruding thereabove. The adhesive material may be applied to a surface of the first semiconductor device prior to positioning the second semiconductor device thereover, or introduced between the first and second semiconductor devices. Upon curing, the predetermined volume of adhesive material spaces the first and second semiconductor devices a predetermined distance apart from one another. Additional semiconductor devices may also be added to the assembly. The first semiconductor device may be associated with a substrate. Semiconductor device assemblies and packages that are at least partially fabricated in accordance with the method are also disclosed.
    Type: Application
    Filed: October 15, 2001
    Publication date: April 17, 2003
    Inventor: James M. Derderian
  • Publication number: 20030071362
    Abstract: A method for assembling semiconductor devices includes providing a first semiconductor device, applying a volume of adhesive material to at least a surface of the first semiconductor device, and positioning a second semiconductor device over the first semiconductor device and a portion of at least one discrete conductive element protruding thereabove. The adhesive material may be applied to a surface of the first semiconductor device prior to positioning the second semiconductor device thereover, or introduced between the first and second semiconductor devices. Upon curing, the predetermined volume of adhesive material spaces the first and second semiconductor devices a predetermined distance apart from one another. Additional semiconductor devices may also be added to the assembly. The first semiconductor device may be associated with a substrate. Semiconductor device assemblies and packages that are at least partially fabricated in accordance with the method are also disclosed.
    Type: Application
    Filed: April 25, 2002
    Publication date: April 17, 2003
    Inventor: James M. Derderian
  • Publication number: 20030038354
    Abstract: An assembly method that includes providing a first semiconductor device with discrete conductive elements protruding above a surface thereof and positioning a second semiconductor device at least partially over the first semiconductor device. A back side of the second semiconductor device rests upon at least some of the discrete conductive elements while remaining electrically isolated therefrom. The first and second semiconductor devices may be secured to one another with an adhesive material which is either placed on an active surface of the first semiconductor device before positioning the second semiconductor device thereover or introduced between the first and second semiconductor devices. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
    Type: Application
    Filed: August 29, 2002
    Publication date: February 27, 2003
    Inventor: James M. Derderian
  • Publication number: 20030038357
    Abstract: A semiconductor device that includes at least one nonconfluent spacer layer on at least one surface thereof. The at least one nonconfluent spacer layer at least partially spaces the surface of the semiconductor device apart from another semiconductor device assembled in stacked arrangement therewith. Adjacent stacked semiconductor devices may include abutting nonconfluent spacer layers which together define a distance between opposed surfaces of the semiconductor devices. Each nonconfluent spacer layer includes voids therein that communicate with an exterior periphery of the layer to facilitate the lateral introduction of adhesive or encapsulant material into the layer and between the adjacent, stacked semiconductor devices. Multi-chip modules are also disclosed, as are methods for forming the nonconfluent spacer layers and assembly and packaging methods.
    Type: Application
    Filed: August 22, 2002
    Publication date: February 27, 2003
    Inventor: James M. Derderian
  • Publication number: 20030038355
    Abstract: A semiconductor device that includes at least one nonconfluent spacer layer on at least one surface thereof. The at least one nonconfluent spacer layer at least partially spaces the surface of the semiconductor device apart from another semiconductor device assembled in stacked arrangement therewith. Adjacent stacked semiconductor devices may include abutting nonconfluent spacer layers which together define a distance between opposed surfaces of the semiconductor devices. Each nonconfluent spacer layer includes voids therein that communicate with an exterior periphery of the layer to facilitate the lateral introduction of adhesive or encapsulant material into the layer and between the adjacent, stacked semiconductor devices. Multi-chip modules are also disclosed, as are methods for forming the nonconfluent spacer layers and assembly and packaging methods.
    Type: Application
    Filed: August 24, 2001
    Publication date: February 27, 2003
    Inventor: James M. Derderian
  • Publication number: 20030038353
    Abstract: An assembly method that includes providing a first semiconductor device with discrete conductive elements protruding above a surface thereof and positioning a second semiconductor device at least partially over the first semiconductor device. A back side of the second semiconductor device rests upon at least some of the discrete conductive elements while remaining electrically isolated therefrom. The first and second semiconductor devices may be secured to one another with an adhesive material which is either placed on an active surface of the first semiconductor device before positioning the second semiconductor device thereover or introduced between the first and second semiconductor devices. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
    Type: Application
    Filed: August 23, 2001
    Publication date: February 27, 2003
    Inventor: James M. Derderian
  • Publication number: 20030038356
    Abstract: A method for assembling semiconductor devices includes providing a first semiconductor device, securing spacers to noncircuit bond pads of the first semiconductor device, and positioning a second semiconductor device on the spacers. Adhesive material may be applied to a surface of one or both of the first and second semiconductor devices prior to positioning of the second semiconductor device, or introduced between first and second semiconductor devices. The noncircuit bond pads may be electrically isolated from other structures of the first semiconductor device or communicate with a ground or reference voltage plane, in which case the back side of the second semiconductor device may communicate with the ground or reference voltage plane upon being positioning against the spacers. Additional semiconductor devices may be added to the assembly. The first semiconductor device may be associated with a substrate. Assemblies and packages at least partially fabricated by the method are also disclosed.
    Type: Application
    Filed: August 24, 2001
    Publication date: February 27, 2003
    Inventor: James M. Derderian