Patents by Inventor Jang Yeon Kwon

Jang Yeon Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100178738
    Abstract: A transistor includes; at least two polycrystalline silicon layers disposed substantially parallel to each other, each polycrystalline silicon layer including a channel region and at least two high conductivity regions disposed at opposing sides of the channel region; a gate which corresponds to the channel region of the two polycrystalline silicon layers and which crosses the two polycrystalline silicon layers, and a gate insulating layer interposed between the gate and the two polycrystalline silicon layers, wherein low conductivity regions are disposed adjacent to one edge of the gate and are formed between the channel region and one high conductivity region of each polycrystalline silicon layer.
    Type: Application
    Filed: February 17, 2010
    Publication date: July 15, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Takashi NOGUCHI, Jong-man KIM, Jang-yeon KWON, Kyung-bae PARK, Ji-sim JUNG, Hyuck LIM
  • Patent number: 7745314
    Abstract: A method of degassing a thin layer and a method of manufacturing a silicon thin film includes applying microwaves to a silicon thin film deposited on a substrate to induce a resonance of impurities of H2, Ar, He, Xe, O2, and the like present in the silicon thin film so as to remove the impurities from the silicon thin film. A wavelength of the microwaves is equal to a natural frequency of an element of an object to be removed. According to a resonance of impurities induced by microwaves, the impurities can be very effectively removed from the silicon thin film so as to obtain a high quality silicon thin film. In particular, the microwaves are very suitable to be used in the manufacture of silicon thin films at low temperature.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: June 29, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-bae Park, Jong-man Kim, Jang-yeon Kwon, Ji-sim Jung
  • Publication number: 20100127257
    Abstract: Provided is a method of manufacturing a ZnO-based thin film transistor (TFT). The method may include forming source and drain electrodes using one or two wet etchings. A tin (Sn) oxide, a fluoride, or a chloride having relatively stable bonding energy against plasma may be included in a channel layer. Because the source and drain electrodes are formed by wet etching, damage to the channel layer and an oxygen vacancy may be prevented or reduced. Because the material having higher bonding energy is distributed in the channel layer, damage to the channel layer occurring when a passivation layer is formed may be prevented or reduced.
    Type: Application
    Filed: January 22, 2010
    Publication date: May 27, 2010
    Inventors: Myung-kwan Ryu, Sang-yoon Lee, Je-hun Lee, Tae-sang Kim, Jang-yeon Kwon, Kyung-bae Park, Kyung-seok Son, Ji-sim Jung
  • Patent number: 7700954
    Abstract: A transistor includes; at least two polycrystalline silicon layers disposed substantially parallel to each other, each polycrystalline silicon layer including a channel region and at least two high conductivity regions disposed at opposing sides of the channel region; a gate which corresponds to the channel region of the two polycrystalline silicon layers and which crosses the two polycrystalline silicon layers, and a gate insulating layer interposed between the gate and the two polycrystalline silicon layers, wherein low conductivity regions are disposed adjacent to one edge of the gate and are formed between the channel region and one high conductivity region of each polycrystalline silicon layer.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: April 20, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Takashi Noguchi, Jong-man Kim, Jang-yeon Kwon, Kyung-bae Park, Ji-sim Jung, Hyuck Lim
  • Publication number: 20100072480
    Abstract: A thin film transistor (TFT) and a method of manufacturing the same are provided, the TFT including a gate insulating layer on a gate. A channel may be formed on a portion of the gate insulating layer corresponding to the gate. A metal material may be formed on a surface of the channel. The metal material crystallizes the channel. A source and a drain may contact side surfaces of the channel.
    Type: Application
    Filed: May 6, 2009
    Publication date: March 25, 2010
    Inventors: Byung-wook Yoo, Sang-yoon Lee, Myung-kwan Ryu, Tae-sang Kim, Jang-yeon Kwon, Kyung-bae Park, Kyung-seok Son, Ji-sim Jung
  • Patent number: 7682882
    Abstract: Provided is a method of manufacturing a ZnO-based thin film transistor (TFT). The method may include forming source and drain electrodes using one or two wet etchings. A tin (Sn) oxide, a fluoride, or a chloride having relatively stable bonding energy against plasma may be included in a channel layer. Because the source and drain electrodes are formed by wet etching, damage to the channel layer and an oxygen vacancy may be prevented or reduced. Because the material having higher bonding energy is distributed in the channel layer, damage to the channel layer occurring when a passivation layer is formed may be prevented or reduced.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: March 23, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-kwan Ryu, Sang-yoon Lee, Je-hun Lee, Tae-sang Kim, Jang-yeon Kwon, Kyung-bae Park, Kyung-seok Son, Ji-sim Jung
  • Patent number: 7682950
    Abstract: Provided are a method of manufacturing a laterally crystallized semiconductor layer and a method of manufacturing a thin film transistor (TFT) using the method. The method of manufacturing the laterally crystallized semiconductor layer comprises: forming a semiconductor layer on a substrate; irradiating laser beams on the semiconductor layer; splitting the laser beams using a prism sheet comprising an array of a plurality of prisms, advancing the laser beams toward the semiconductor layer to alternately form first and second areas in the semiconductor layer so as to fully melt the first areas, wherein the laser beams are irradiated onto the first areas, and the laser beams are not irradiated onto the second areas; and inducing the first areas to be laterally crystallized using the second areas as seeds.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: March 23, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-bae Park, Kyung-yeup Kim, Jong-man Kim, Jang-yeon Kwon, Ji-sim Jung
  • Publication number: 20100059756
    Abstract: Disclosed is a thin film transistor (TFT). The TFT may include an intermediate layer between a channel and a source and drain. An increased off current, which may occur to a drain area of the TFT, is reduced due to the intermediate layer. Accordingly, the TFT may be stably driven.
    Type: Application
    Filed: May 6, 2009
    Publication date: March 11, 2010
    Inventors: Kyung-bae Park, Myung-kwan Ryu, Byung-wook Yoo, Sang-yoon Lee, Tae-sang Kim, Jang-yeon Kwon, Kyung-seok Son, Ji-sim Jung
  • Publication number: 20100051942
    Abstract: A ZnO-based thin film transistor (TFT) is provided herein, as is a method of manufacturing the TFT. The ZnO-based TFT has a channel layer that comprises ZnO and ZnCl, wherein the ZnCl has a higher bonding energy than ZnO with respect to plasma. The ZnCl is formed through the entire channel layer, and specifically is formed in a region near THE surface of the channel layer. Since the ZnCl is strong enough not to be decomposed when exposed to plasma etching gas, an increase in the carrier concentration can be prevented. The distribution of ZnCl in the channel layer, may result from the inclusion of chlorine (Cl) in the plasma gas during the patterning of the channel layer.
    Type: Application
    Filed: November 10, 2009
    Publication date: March 4, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myung-kwan RYU, Jun-seong KIM, Sang-yoon LEE, Euk-che HWANG, Tae-sang KIM, Jang-yeon KWON, Kyung-bae PARK, Kyung-seok SON, Ji-sim JUNG
  • Publication number: 20100012942
    Abstract: Provided may be a Poly-Si thin film transistor (TFT) and a method of manufacturing the same. The Poly-Si TFT may include a first Poly-Si layer on an active layer formed of Poly-Si and doped with a low concentration; and a second Poly-Si layer on the first Poly-Si layer and doped with the same concentration as the first Poly-Si layer or with a higher concentration than the first Poly-Si layer, wherein lightly doped drain (LDD) regions capable of reducing leakage current may be formed in inner end portions of the first Poly-Si layer.
    Type: Application
    Filed: December 5, 2008
    Publication date: January 21, 2010
    Inventors: Myung-kwan Ryu, Kyung-bae Park, Sang-yoon Lee, Jang-yeon Kwon, Byung-wook Yoo, Tae-sang Kim, Kyung-seok Son, Ji-sim Jung
  • Patent number: 7648866
    Abstract: Provided is a method of manufacturing a driving-device for a unit pixel of an organic light emitting display having an improved manufacturing process in which the driving device can be manufactured with a smaller number of processes and in simpler processes.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: January 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-sim Jung, Jung-seok Hahn, Sang-yoon Lee, Jong-man Kim, Jang-yeon Kwon, Kyung-bae Park
  • Patent number: 7638360
    Abstract: A ZnO-based thin film transistor (TFT) is provided herein, as is a method of manufacturing the TFT. The ZnO-based TFT has a channel layer that comprises ZnO and ZnCl, wherein the ZnCl has a higher bonding energy than ZnO with respect to plasma. The ZnCl is formed through the entire channel layer, and specifically is formed in a region near THE surface of the channel layer. Since the ZnCl is strong enough not to be decomposed when exposed to plasma etching gas, an increase in the carrier concentration can be prevented. The distribution of ZnCl in the channel layer, may result from the inclusion of chlorine (Cl) in the plasma gas during the patterning of the channel layer.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: December 29, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-kwan Ryu, Jun-seong Kim, Sang-yoon Lee, Euk-che Hwang, Tae-sang Kim, Jang-yeon Kwon, Kyung-bae Park, Kyung-seok Son, Ji-sim Jung
  • Patent number: 7629205
    Abstract: A thin film transistor (TFT) that can prevent damage to a silicon layer under a gate electrode in an annealing process by using a first gate electrode having high thermal resistance and a second gate electrode having high reflectance and a method of manufacturing the TFT are provided. The method of manufacturing a TFT includes forming a double-layered gate electrode which includes a first gate electrode formed of a material having high thermal resistance and a second gate electrode formed of a metal having high optical reflectance on the first gate electrode, and forming a source and a drain by annealing doped regions on both sides of a silicon layer under the gate electrode by radiating a laser beam onto the entire upper surface of the silicon layer.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: December 8, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hans S. Cho, Hyuck Lim, Takashi Noguchi, Jang-yeon Kwon
  • Publication number: 20090298268
    Abstract: A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using ICP-CVD. After the ICP-CVD, ELA is performed while increasing energy by predetermined steps. A poly-Si active layer and a Si02 gate insulating layer are deposited at a temperature of about 150° C. using ICP-CVD. The poly-Si has a large grain size of about 3000 A or more. An interface trap density of the Si02 can be as high as lo?/cm2. A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 3, 2009
    Inventors: Jang-yeon Kwon, Min-koo Han, Se-young Cho, Kyung-bae Park, Do-young Kim, Min-cheol Lee, Sang-myeon Han, Takashi Noguchi, Young-soo Park, Ji-sim Jung
  • Publication number: 20090291211
    Abstract: Example embodiments provide an atomic layer deposition apparatus and a method of depositing an atomic layer using the atomic layer deposition apparatus. The atomic layer deposition apparatus may include a reaction chamber, a substrate supporter installed in the reaction chamber to support a substrate, and a shower head that is disposed above the substrate supporter and has at least one nozzle set that simultaneously inject a first source gas, a second source gas, and a purge gas onto the substrate. The method of depositing an atomic layer may include moving at least one of the substrate and the shower head in a first direction and simultaneously depositing at least one first atomic layer and at least one second atomic layer on the substrate by injecting the first source gas, the second source gas, and the purge gas through the shower head while the moving operation is performed.
    Type: Application
    Filed: November 21, 2008
    Publication date: November 26, 2009
    Inventors: Myung-kwan Ryu, Kyung-bae Park, Sang-yoon Lee, Tae-sang Kim, Jang-yeon Kwon, Byung-wook Yoo, Kyung-seok Son, Ji-sim Jung
  • Publication number: 20090206332
    Abstract: An oxide semiconductor thin film transistor (TFT) and a method of manufacturing the oxide semiconductor TFT. The oxide semiconductor TFT includes a first gate insulating layer arranged between an oxide semiconductor channel layer and a first gate and a second gate insulating layer arranged between the channel layer and a second gate. The first and second gate insulating layers are made out of different materials and have different thicknesses. Preferably, the second gate insulating layer is silicon oxide and is thinner than the first gate insulating layer which is preferably silicon nitride. Oxide semiconductor refers to an oxide material such as Zinc Oxide, Tin Oxide, Ga—In—Zn Oxide, In—Zn Oxide, In—Sn Oxide, and one of Zinc Oxide, Tin Oxide, Ga—In—Zn Oxide, In—Zn Oxide and In—Sn Oxide.
    Type: Application
    Filed: February 2, 2009
    Publication date: August 20, 2009
    Inventors: Kyoung-Seok Son, Tae-Sang Kim, Jang-Yeon Kwon, Ji-Sim Jung, Sang-Yoon Lee, Myung-Kwan Ryu, Kyung-Bae Park, Byung-Wook Yoo
  • Patent number: 7563659
    Abstract: A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using inductively coupled plasma chemical vapor deposition (ICP-CVD). After the ICP-CVD, excimer laser annealing (ELA) is performed while increasing energy by predetermined steps. A poly-Si active layer and a SiO2 gate insulating layer are deposited at a temperature of about 150° C. using ICP-CVD. The poly-Si has a large grain size of about 3000 ? or more. An interface trap density of the SiO2 can be as high as 1011/cm2. A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: July 21, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jang-yeon Kwon, Min-koo Han, Se-young Cho, Kyung-bae Park, Do-young Kim, Min-cheol Lee, Sang-myeon Han, Takashi Noguchi, Young-soo Park, Ji-sim Jung
  • Publication number: 20090140243
    Abstract: Oxide semiconductor thin film transistors (TFT) and methods of manufacturing the same are provided. The methods include forming a channel layer on a substrate, forming source and drain electrodes at opposing sides of the channel layer, and oxidizing a surface of the channel layer by placing an oxidizing material in contact with the surface of the channel layer, reducing carriers on the surface of the channel layer. Due to the oxidizing agent treatment of the surface of the channel layer, excessive carriers that are generated naturally, or during the manufacturing process, may be more effectively controlled.
    Type: Application
    Filed: July 25, 2008
    Publication date: June 4, 2009
    Inventors: Tae-sang Kim, Sang-yoon Lee, Myung-kwan Ryu, Jang-yeon Kwon, Kyung-bae Park, Kyung-seok Son, Ji-sim Jung
  • Publication number: 20090142887
    Abstract: Methods of manufacturing an oxide semiconductor thin film transistor are provided. The methods include forming a gate on a substrate, and a gate insulating layer on the substrate to cover the gate. A channel layer, which is formed of an oxide semiconductor, may be formed on the gate insulating layer. Source and drain electrodes may be formed on opposing sides of the channel layer. The method includes forming supplying oxygen to the channel layer, forming a passivation layer to cover the source and drain electrodes and the channel layer, and performing an annealing process after forming the passivation layer.
    Type: Application
    Filed: May 22, 2008
    Publication date: June 4, 2009
    Inventors: Kyoung-seok Son, Sang-yoon Lee, Myung-kwan Ryu, Tae-sang Kim, Jang-yeon Kwon, Kyung-bae Park, Ji-sim Jung
  • Publication number: 20090141203
    Abstract: A display device including an oxide semiconductor thin film transistor is provided. The display device includes at least one thin film transistor, and at least one storage capacitor. The storage capacitor includes a storage electrode formed of a transparent oxide semiconductor, and a pixel electrode over the storage electrode. The pixel electrode may be separated from the storage electrode by a desired distance.
    Type: Application
    Filed: May 22, 2008
    Publication date: June 4, 2009
    Inventors: Kyoung-seok Son, Sang-yoon Lee, Myung-kwan Ryu, Tae-sang Kim, Jang-yeon Kwon, Kyung-bae Park, Ji-sim Jung