Patents by Inventor Jason Zhang

Jason Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12261519
    Abstract: A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.
    Type: Grant
    Filed: September 7, 2023
    Date of Patent: March 25, 2025
    Assignee: Navitas Semiconductor Limited
    Inventors: Marco Giandalia, Jason Zhang, Hongwei Jia, Daniel M. Kinzer
  • Publication number: 20250015707
    Abstract: An electronic circuit is disclosed. The electronic circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, and a gate driver circuit including a pull-down transistor coupled to the gate terminal, and an input terminal arranged to receive an input signal and generate a corresponding output signal at an output terminal coupled to the gate terminal, where the gate driver circuit is arranged to store energy harvested from the input signal and use the stored energy to change a conductive state of the pull-down transistor. In one aspect, the transistor includes gallium nitride (GaN). In another aspect, the pull-down transistor includes GaN.
    Type: Application
    Filed: September 23, 2024
    Publication date: January 9, 2025
    Applicant: Navitas Semiconductor Limited
    Inventors: Marco GIANDALIA, Ju Jason ZHANG, Hongwei JIA, Daniel M. KINZER
  • Publication number: 20240405764
    Abstract: A circuit is disclosed. The circuit includes a gallium nitride (GaN) switch having a gate terminal, a drain terminal and a source terminal, a driver circuit having an output terminal coupled to the gate terminal, where the driver circuit is arranged to generate an output voltage at the output terminal such that: the output voltage is at a first voltage when a voltage at the drain terminal is below a predetermined voltage; the output voltage is at a second voltage when 1) the voltage at the drain terminal is above the predetermined voltage and 2) a time period during which the output voltage is at the second voltage is less than a predetermined time. In one aspect, the second voltage is greater than the first voltage.
    Type: Application
    Filed: June 4, 2024
    Publication date: December 5, 2024
    Applicant: Navitas Semiconductor Limited
    Inventors: Nabil Akel, Jason Zhang, Victor Sinow, Thomas Ribarich
  • Patent number: 12119739
    Abstract: An electronic circuit is disclosed. The electronic circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, and a gate driver circuit including a pull-down transistor coupled to the gate terminal, and an input terminal arranged to receive an input signal and generate a corresponding output signal at an output terminal coupled to the gate terminal, where the gate driver circuit is arranged to store energy harvested from the input signal and use the stored energy to change a conductive state of the pull-down transistor. In one aspect, the transistor includes gallium nitride (GaN). In another aspect, the pull-down transistor includes GaN.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: October 15, 2024
    Assignee: Navitas Semiconductor Limited
    Inventors: Marco Giandalia, Jason Zhang, Hongwei Jia, Daniel M. Kinzer
  • Patent number: 12072687
    Abstract: A method, system and apparatus for flexible component routing design, wherein a flexible component includes a first end and a second end, includes moving the second end relative to the first end to simulate an operational motion state of the flexible component, scanning the flexible component to obtain a first set of routing data for the flexible component, changing position of the second end from a first position to a second position, moving the second end relative to the first end to simulate an operational motion state of the flexible component, scanning the flexible component to obtain a second set of routing data for the flexible component, and comparing the first set of routing data with the second set of routing data to determine a routing design for the flexible component.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: August 27, 2024
    Assignee: Ford Global Technologies, LLC
    Inventors: Cherry Xie, Jason Zhang, Ethan Wang, Chris Nie
  • Patent number: 12050684
    Abstract: The disclosure herein describes the detection of malware campaigns based on analysis of attributes of telemetry data. Telemetry data associated with malware campaign detection includes multiple attributes and is associated with a first time interval. Statistics of a target statistic set are calculated based on a composite time series of the multiple attributes of the telemetry data. The target set is compared to a historical statistic set based on a second time interval and, based on the target set exceeding a statistic threshold of the historical set, peak detection analysis of the target set is performed. Based on the analysis indicating the presence of a valid peak result, a notification of detection of a malware campaign is sent, wherein the notification includes data indicative of the valid peak result and enables a receiver of the notification to take corrective action.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: July 30, 2024
    Assignee: VMware, Inc.
    Inventors: Jason Zhang, Stefano Ortolani, Giovanni Vigna
  • Publication number: 20240178675
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
    Type: Application
    Filed: December 12, 2023
    Publication date: May 30, 2024
    Applicant: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Jason Zhang
  • Publication number: 20240114001
    Abstract: A method is provided that comprises monitoring for a change in a first security configuration setting in a relay server and comparing the change in the first security configuration setting to historical data that contains validated authentication configuration settings that previously allowed for the delivery of a historical electronic mail message to an external network. The method further comprises identifying a candidate change to the first security configuration setting based on the comparison, where the candidate change to the first security configuration setting when implemented results in the delivery of a first electronic mail message to the external network. The method further comprises implementing the candidate change to the first security configuration setting such that the relay server allows the delivery of the first electronic message to the external network.
    Type: Application
    Filed: October 3, 2022
    Publication date: April 4, 2024
    Inventors: Yi Jason Zhang, Daniel Joseph Serna
  • Patent number: 11888332
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: January 30, 2024
    Assignee: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Jason Zhang
  • Patent number: 11862996
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: January 2, 2024
    Assignee: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Jason Zhang
  • Publication number: 20230421046
    Abstract: A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.
    Type: Application
    Filed: September 7, 2023
    Publication date: December 28, 2023
    Applicant: Navitas Semiconductor Limited
    Inventors: Marco Giandalia, Jason Zhang, Hongwei Jia, Daniel M. Kinzer
  • Publication number: 20230387067
    Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.
    Type: Application
    Filed: June 21, 2023
    Publication date: November 30, 2023
    Applicant: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Jason Zhang, Thomas Ribarich
  • Patent number: 11825789
    Abstract: A connector system and method comprising a coupling with 3 walls defining a cavity. Disposed on the first side wall and second side wall are lips protruding into the cavity, such that a grooved board inserted into the cavity is in contact with the lips and back wall. Disposed on the walls are mounting holes, such that other apparatuses may be mounted to the mounting holes. The couplings may be mounted on other identical couplings or on couplings of different heights.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: November 28, 2023
    Inventor: Jason Zhang
  • Patent number: 11791709
    Abstract: A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: October 17, 2023
    Assignee: Navitas Semiconductor Limited
    Inventors: Marco Giandalia, Jason Zhang, Hongwei Jia, Daniel M. Kinzer
  • Patent number: 11770010
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: September 26, 2023
    Assignee: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Jason Zhang
  • Patent number: 11757290
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
    Type: Grant
    Filed: August 12, 2022
    Date of Patent: September 12, 2023
    Assignee: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Jason Zhang
  • Publication number: 20230278621
    Abstract: A lower rotor assembly for a torque sensor includes a lower rotor over-mold including at least one heat staking structure extending from an upper surface thereof. The lower rotor assembly further includes a lower stator integrally formed with the lower rotor over-mold as a single, unitary component. The lower rotor assembly also includes an upper stator including at least one receiving structure, where each receiving structure receives a respective heat staking structure of the lower rotor over-mold when the upper stator is coupled to the lower stator.
    Type: Application
    Filed: April 14, 2022
    Publication date: September 7, 2023
    Inventors: Rong (Jason) Zhang, Keyi (Michael) He, Fusong (Stuart) Zhao
  • Patent number: 11715720
    Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: August 1, 2023
    Assignee: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Jason Zhang, Thomas Ribarich
  • Publication number: 20230111993
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
    Type: Application
    Filed: December 9, 2022
    Publication date: April 13, 2023
    Applicant: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Jason Zhang
  • Patent number: 11605955
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: March 14, 2023
    Assignee: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Jason Zhang