Abstract: An electronic circuit is disclosed. The electronic circuit includes a substrate having GaN, and a power switch formed on the substrate and including a first control gate and a first source. The electronic circuit also includes a drive circuit formed on the substrate and including an output coupled to the first control gate, and a power supply having a supply voltage and coupled to the drive circuit, where the output can be driven to the supply voltage.

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments, a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions.

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.

Abstract: A control scheme and architecture for a wireless electrical energy transmission circuit employs two solid-state switches and a zero voltage switching (ZVS) topology to power an antenna network. The switches drive the antenna network at its resonant frequency and simultaneously energize a separate resonant circuit that has a resonant frequency lower than the antenna circuit. The resonant circuit creates out of phase voltage and current waveforms that enable the switches to operate with (ZVS).

Abstract: Some exemplary embodiments of a III-nitride switching device with an emulated diode have been disclosed. One exemplary embodiment comprises a GaN switching device fabricated on a substrate comprising a high threshold GaN transistor coupled across a low threshold GaN transistor, wherein a gate and a source of the low threshold GaN transistor are shorted with an interconnect metal to function as a parallel diode in a reverse mode. The high threshold GaN transistor is configured to provide noise immunity for the GaN switching device when in a forward mode. The high threshold GaN transistor and the low threshold GaN transistor are typically fabricated on the same substrate, and with significantly different thresholds. As a result, the superior switching characteristics of III-nitride devices may be leveraged while retaining the functionality and the monolithic structure of the inherent body diode in traditional silicon FETs.

Abstract: There are disclosed herein various implementations of composite semiconductor devices with active oscillation control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device may be configured to include one or both of a reduced output resistance due to, for example, a modified body implant and a reduced transconductance due to, for example, a modified oxide thickness to cause a gain of the composite semiconductor device to be less than approximately 10,000.

Abstract: A power converter driver that is supplied with two different voltages.

Abstract: One exemplary disclosed embodiment comprises a two-terminal stacked-die package including a diode, such as a silicon diode, stacked atop a III-nitride transistor, such that a cathode of the diode resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a drain of the III-nitride transistor, and a second terminal of the package is coupled to an anode of the diode. In this manner, devices such as cascoded rectifiers may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.

Abstract: According to one exemplary embodiment, an efficient and high speed E-mode N/Schottky switch includes a silicon transistor coupled with a D-mode III-nitride device, where the silicon transistor causes the D-mode III-nitride device to operate in an enhancement mode. The E-mode III-N/Schottky switch further includes a Schottky diode coupled across the silicon transistor so as to improve efficiency, recovery time, and speed of the E-mode III-N/Schottky switch. An anode of the Schottky diode can be coupled to a source of the silicon transistor and a cathode of the Schottky diode can he coupled to a drain of the silicon transistor. The Schottky diode can be integrated with the silicon transistor. In one embodiment the III-nitride device is a GaN device.

Abstract: A power converter driver that is supplied with two different voltages.

Abstract: One exemplary disclosed embodiment comprises a two-terminal stacked-die package including a diode, such as a silicon diode, stacked atop a III-nitride transistor, such that a cathode of the diode resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a drain of the III-nitride transistor, and a second terminal of the package is coupled to an anode of the diode. In this manner, devices such as cascoded rectifiers may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.

Abstract: According to one exemplary embodiment, an efficient and high speed E-mode III-N/Schottky switch includes a silicon transistor coupled with a D-mode III-nitride device, where the silicon transistor causes the D-mode III-nitride device to operate in an enhancement mode. The E-mode III-N/Schottky switch further includes a Schottky diode coupled across the silicon transistor so as to improve efficiency, recovery time, and speed of the E-mode III-N/Schottky switch. An anode of the Schottky diode can be coupled to a source of the silicon transistor and a cathode of the Schottky diode can be coupled to a drain of the silicon transistor. The Schottky diode can be integrated with the silicon transistor. In one embodiment the III-nitride device is a GaN device.

Abstract: One exemplary disclosed embodiment comprises a three-terminal stacked-die package including a field effect transistor (PET), such as a silicon PET, stacked atop a III-nitride transistor, such that a drain of the PET resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a gate of the FET, a second terminal of the package is coupled to a drain of the III-nitride transistor. A third terminal of the package is coupled to a source of the FET. In this manner, devices such as cascoded switches may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.

Abstract: There are disclosed herein various implementations of composite semiconductor devices with active oscillation control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device may be configured to include one or both of a reduced output resistance due to, for example, a modified body implant and a reduced transconductance due to, for example, a modified oxide thickness to cause a gain of the composite semiconductor device to be less than approximately 10,000.

Abstract: One exemplary disclosed embodiment comprises a three-terminal stacked-die package including a field effect transistor (FET), such as a silicon FET, stacked atop a III-nitride transistor, such that a drain of the FET resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a gate of the FET, a second terminal of the package is coupled to a drain of the III-nitride transistor. A third terminal of the package is coupled to a source of the FET. In this manner, devices such as cascoded switches may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.

Abstract: Described herein is the use of ultrasound pulses at different frequencies to track the dispersion properties of intracranial tissues which may have been altered due to traumatic or other neurological brain injury. Dispersive ultrasound does not provide imaging, but it can provide data of significant diagnostic value by using decision support systems that can be trained as a medical diagnostic system for traumatic brain injuries applications to detect specific patterns of dispersion that are associated with specific intracranial injuries.

Abstract: Disclosed is a buck converter for converting a high voltage at the input of the buck converter to a low voltage at the output of the buck converter. The buck converter includes a control circuitry configured to control a duty cycle of a control switch, the control switch being interposed between the input and the output of the buck converter. A synchronous switch is interposed between the output and ground. The control switch and the synchronous switch comprise depletion-mode III-nitride transistors. In one embodiment, at least one of the control switch and the synchronous switches comprises a depletion-mode GaN HEMT. The buck converter further includes protection circuitry configured to disable current conduction through the control switch while the control circuitry is not powered up.