Patents by Inventor Jaspreet Singh

Jaspreet Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11127643
    Abstract: A device includes a die with perimeters associated therewith, a substrate, and a test channel. The die is coupled to the substrate via a plurality of C4 bumps on a first side of the substrate. The substrate has connections on a second side of the substrate, opposite to the first side. A first connection connects a C4 bump on the first side of the substrate to a connection on the second side using a metal layer. The test channel is positioned within the substrate and further positioned outside of the perimeter of the die coupled to the substrate. The test channel is positioned at substantially a same depth as the metal layer of the first connection. A probe connecting to the test channel via pads positioned on a same side of the substrate that provides electrical characteristics that is substantially the same as electrical characteristics of the first connection.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: September 21, 2021
    Assignee: XILINX, INC.
    Inventors: Vadim Heyfitch, Jaspreet Singh Gandhi
  • Patent number: 11114360
    Abstract: Examples described herein provide techniques for multi-die device structures having improved gap uniformity between neighboring dies. In some examples, a first die and a second die are attached to an interposer. A first gap is defined by and between the first die and the second die. At least one of the first die or the second die is etched at the first gap. The etching defines a second gap defined by and between the first die and the second die. The first die, the second die, and the interposer are encapsulated with an encapsulant. The encapsulant is disposed in the second gap.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: September 7, 2021
    Assignee: XILINX, INC.
    Inventors: Jaspreet Singh Gandhi, Myongseob Kim
  • Patent number: 11097525
    Abstract: A system and method for laminating filter media can include applying an adhesive to a layer of the filter media and curing the adhesive. A multilayer filter assembly can include a first and a second layer laminated together using an inorganic adhesive.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: August 24, 2021
    Assignee: Molekule, Inc.
    Inventors: Jaspreet S. Dhau, Avtar Singh, David Goslin
  • Patent number: 11095573
    Abstract: A resource recommendation system is described to recommend and standardize resource tagging in a networked computing environment. In one example, cloud resources and related data are discovered, a database of the discovered information is generated, machine learning is applied to the database to build a prediction model, and tags for the resources are recommended, based on the prediction model, at a computing device.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: August 17, 2021
    Assignee: Micro Focus LLC
    Inventors: Vishwanath Pargaonkar, Jaspreet Singh, Chilakam Prathapa Reddy
  • Publication number: 20210249328
    Abstract: A chip package assembly and method for fabricating the same are provided which utilize a plurality of electrically floating heat transfer structures for improved thermal management. In one example, a chip package assembly is provided. The chip package assembly includes a substrate, a first integrated circuit (IC) die and a plurality of electrically floating conductive heat transfer structures. The substrate has a first surface and an opposing second surface. The first IC die has a first surface, an opposing second surface, and four lateral sides. The second surface of the first IC die is mounted to the first surface of the substrate. The plurality of electrically floating conductive heat transfer structures extend in a first direction defined between the first and second surfaces of the first IC die.
    Type: Application
    Filed: February 10, 2020
    Publication date: August 12, 2021
    Inventors: Gamal REFAI-AHMED, Suresh RAMALINGAM, Jaspreet Singh GANDHI, Cheang-Whang CHANG
  • Patent number: 11071032
    Abstract: A method of coordinating a plurality of radio access networks (RANs) includes aggregating, with a gateway, communications interfaces between a plurality of RANs and a packet core network through the gateway. A plurality of radio nodes (RNs) in each of the RANs is communicatively coupled to the gateway and to user equipment (UE) devices associated with the RNs in each of the RANs. The gateway also controls and coordinates mobility of the UE devices within and among the RANs. In addition, the gateway acts as a virtual enhanced NodeB (eNB) to the packet core network, thereby hiding the aggregated communications interfaces from the packet core network.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: July 20, 2021
    Assignee: Corning Optical Communications LLC
    Inventors: Behrooz Parsay, Shashikant Tiwari, Hithesh Nama, Yashodhan Dandekar, Brian Patrick Dunn, Jaspreet Singh
  • Publication number: 20210193620
    Abstract: A chip package assembly and method for fabricating the same are provided which utilize a plurality of electrically floating extra-die heat transfer posts for improved thermal management. In one example, a chip package assembly is provided that includes a substrate, a first integrated circuit (IC) die, and a first plurality of electrically floating extra-die conductive posts. The substrate has a first surface and an opposing second surface. The first integrated circuit (IC) die has a first surface and an opposing second surface. The second surface of the first IC die is mounted to the first surface of the substrate. The first plurality of electrically floating extra-die conductive posts extend from the first surface of the first IC die to provide a heat transfer path away from the first IC die.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 24, 2021
    Inventors: Gamal Refai-Ahmed, Suresh Ramalingam, Jaspreet Singh Gandhi, Cheang-Whang Chang
  • Patent number: 11039397
    Abstract: Systems and methods are disclosed that provide a closed loop power control system including adaptively adjusting the desired target SINR over time so as to ultimately achieve a feasible SINR. In one implementation, a method is provided of optimizing uplink closed loop power control in a RAN in which one or more base stations each service a plurality of mobile stations, including: determining a power level for each mobile station for its respective uplink transmissions, including measuring a current achieved SINR for each mobile station; and for each mobile station, adjusting the power level to be sufficiently high to meet desired transmission characteristics but not so high as to cause unnecessary interference with transmissions from other mobile stations, by adjusting a desired target SINR based on factors selected from the following: current and prior achieved SINRs, current and prior interference measurements, and current and prior transmission power control commands.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: June 15, 2021
    Assignee: Corning Optical Communications LLC
    Inventors: Brian Dunn, Hithesh Nama, Srinivas Pinagapany, Jaspreet Singh
  • Publication number: 20210175569
    Abstract: A battery pack for a vehicle electrical system includes a casing for receiving one or more battery modules. The battery modules are insertable into a casing of the battery pack by sliding couplers along pairs of rails and are securable to the ends of the rails. After insertion, the rails thermally insulate one battery module from other battery modules coupled to the casing. In some examples, a first stiffness or a first mechanical frequency of the casing with the one or more battery modules inserted may differ from a second stiffness or a second mechanical frequency associated with a body of a vehicle or another component associated therewith by a threshold amount. Additionally, the casing may be configured with vents for venting the hot gases, such as those generated by a battery module in a thermal runaway event.
    Type: Application
    Filed: February 22, 2021
    Publication date: June 10, 2021
    Inventors: Robert Alan Ng, Moritz Boecker, Kyle Matthew Foley, Jason Jaspreet Singh Haer, David Sands
  • Publication number: 20210176191
    Abstract: A resource recommendation system is described to recommend and standardize resource tagging in a networked computing environment. In one example, cloud resources and related data are discovered, a database of the discovered information is generated, machine learning is applied to the database to build a prediction model, and tags for the resources are recommended, based on the prediction model, at a computing device.
    Type: Application
    Filed: December 6, 2019
    Publication date: June 10, 2021
    Inventors: Vishwanath Pargaonkar, Jaspreet Singh, Chilakam Prathapa Reddy
  • Publication number: 20210134757
    Abstract: A chip package assembly and method for fabricating the same are provided which utilize a plurality of posts in mold compound for improved resistance to delamination. In one example, a chip package assembly is provided that includes a first integrated circuit (IC) die, a substrate, a redistribution layer, a mold compound and a plurality of posts. The redistribution layer provides electrical connections between circuitry of the first IC die and circuitry of the substrate. The mold compound is disposed in contact with the first IC die and spaced from the substrate by the redistribution layer. The plurality of posts are disposed in the mold compound and are laterally spaced from the first IC die. The plurality of posts are not electrically connected to the circuitry of the first IC die.
    Type: Application
    Filed: November 4, 2019
    Publication date: May 6, 2021
    Inventors: Jaspreet Singh GANDHI, Suresh RAMALINGAM
  • Patent number: 10985352
    Abstract: A battery pack for a vehicle electrical system includes a casing for receiving one or more battery modules. The battery modules are insertable into a casing of the battery pack by sliding couplers along pairs of rails and are securable to the ends of the rails. After insertion, the rails thermally insulate one battery module from other battery modules in the battery pack. Additionally, the battery modules may include a top cover with an insulating material to further thermally insulate one battery module from another battery module. The battery pack may additionally be configured with vents for venting the hot gases, such as those generated by a battery module in a thermal runaway event. Additionally, the battery modules may include a second insulating material disposed between cells and configured to thermally insulate the cells from one another.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: April 20, 2021
    Assignee: Zoox, Inc.
    Inventors: Robert Alan Ng, Moritz Boecker, Kyle Matthew Foley, Jason Jaspreet Singh Haer, David Sands
  • Patent number: 10971474
    Abstract: A chip package and method of fabricating the same are described herein. The chip package generally includes a stand-off which spaces a die from a substrate to control the collapse of a solder joint coupling the die to the substrate.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: April 6, 2021
    Assignee: XILINX, INC.
    Inventors: Jaspreet Singh Gandhi, Henley Liu
  • Publication number: 20210092012
    Abstract: Methods and systems for an ubiquitous collaboration feature in a managed application environment are described herein. The collaboration service and/or server may store session information and one or more configuration files for use in rendering the collaboration features in combination with managed applications executing on a user's computing device.
    Type: Application
    Filed: October 19, 2020
    Publication date: March 25, 2021
    Inventors: Jaspreet Singh, Maria Isabel Gomez
  • Publication number: 20210073083
    Abstract: A proactive data recovery system is provided. The system includes a memory having computer-readable instructions stored therein and a processor configured to execute the computer-readable instructions to access a data storage platform and to monitor a plurality of parameters indicative of a requirement of data restore and/or recovery for the data storage platform. The requirement corresponds to a predicted occurrence of a disaster event. The processor is further configured trigger backup of data stored in the data storage platform based upon the plurality of parameters to create a restore package and to initiate the data restore and/or data recovery operation for the data storage platform using the restore package in response to the occurrence of the disaster event.
    Type: Application
    Filed: December 12, 2019
    Publication date: March 11, 2021
    Inventors: Amar Solanke, Somesh Jain, Ramanan Balakrishnan, Jaspreet Singh
  • Patent number: 10930611
    Abstract: An integrated circuit assembly having an improved solder connection, and methods for fabricating the same are provided that utilize platelets within the solder connections to inhibit solder connection failure, thus providing a more robust solder interface. In one example, an integrated circuit assembly is provided that includes a package substrate having a first plurality of contact pads exposed on a first surface of the package substrate and a second plurality of contact pads exposed on a second surface of the package substrate. The second plurality of contact pads have a pitch that is greater than a pitch of the first plurality of contact pads. Interconnect circuitry is disposed in the package substrate and couples the first and second pluralities of contact pads. At least a first contact pad of the second plurality of contact pads includes a solder ball disposed directly in contact with a palladium layer.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: February 23, 2021
    Assignee: XILINX, INC.
    Inventors: Jaspreet Singh Gandhi, Tien-Yu Lee
  • Patent number: 10916758
    Abstract: A battery pack for a vehicle electrical system configured with high-voltage bus bars. A positive bus bar and a negative bus bar may provide power generated by the battery pack to a drive module of the vehicle, to power one or more components of the vehicle. The drive module may additionally couple to high-voltage positive and negative bus bars. The high-voltage bus bars may be configured to provide additional power to the drive module from another battery pack, such as via a battery balance box. Additionally, the high-voltage bus bars may be configured to carry excess power from the drive module to another drive module associated with the vehicle via the battery balance box. The high-voltage bus bars may be configured to de-energize in the event of a thermal runaway or other failure of a battery module of the associated battery pack.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: February 9, 2021
    Assignee: Zoox, Inc.
    Inventors: Robert Alan Ng, Moritz Boecker, Kyle Matthew Foley, Jason Jaspreet Singh Haer, David Sands
  • Patent number: 10891423
    Abstract: A portal page may be displayed in the active area of a portable computing device display. The portable computing device may receive display data that includes original page display instructions specifying how to display a plurality of portlets within a common page. The personal computing device may identify an initial portlet of the plurality of portlets and remove portlets, other than the initial portlet, from the original page display instructions to produce modified page display instructions having at least one transition instruction. The personal computing device may scale, based upon the modified page display instructions, the initial portlet to render within the active display area; and render, based upon the scaled initial portlet, a web page within the active display area.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: January 12, 2021
    Assignee: International Business Machines Corporation
    Inventors: Stefan A. Hepper, Jaspreet Singh
  • Patent number: 10879157
    Abstract: An improved interconnect substrate having high density routings for a chip package assembly, a chip package assembly having a high density substrate, and methods for fabricating the same are provided that utilize substrates having a region of high density routings disposed over a region of low density routings. In one example, a method for fabricating an interconnect substrate is provided that includes forming a high density routing region by depositing a seed layer on a top surface of a low density routing region, patterning a mask layer on the seed layer, forming a plurality of conductive posts on the seed layer, removing the mask layer and the seed layer exposed between the conductive posts, and depositing a dielectric layer between the between the conductive posts, wherein at least some of the conductive posts are electrically coupled to conductive routing comprising the low density routing region.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: December 29, 2020
    Assignee: XILINX, INC.
    Inventor: Jaspreet Singh Gandhi
  • Patent number: 10878175
    Abstract: A portal page may be displayed in the active area of a portable computing device display. The portable computing device may receive display data that includes original page display instructions specifying how to display a plurality of portlets within a common page. The personal computing device may identify an initial portlet of the plurality of portlets and remove portlets, other than the initial portlet, from the original page display instructions to produce modified page display instructions having at least one transition instruction. The personal computing device may scale, based upon the modified page display instructions, the initial portlet to render within the active display area; and render, based upon the scaled initial portlet, a web page within the active display area.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: December 29, 2020
    Assignee: International Business Machines Corporation
    Inventors: Stefan A. Hepper, Jaspreet Singh