Patents by Inventor Jaspreet Singh

Jaspreet Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11979232
    Abstract: A system performs verification of Ethernet hardware. A data frame including a first portion for storing a checksum value and a second portion for storing a timestamp value is received. The second portion of data frame is set to zero. A timestamp value for including in second portion of the data frame is received. A modified checksum value is determined based on the checksum value included in the first portion of the data frame and the timestamp value. A cyclic redundancy check (CRC) value is determined for the data frame by nullifying the checksum value in the data frame and considering the timestamp value. A final CRC value is determined by combining the CRC value for the data frame and a CRC correction value based on the checksum. The modified data frame is sent for processing using an emulator.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: May 7, 2024
    Assignee: Synopsys, Inc.
    Inventors: Jishnu De, Jaspreet Singh Gambhir
  • Publication number: 20240120578
    Abstract: A system that includes a wettable thermal insulator, a phase change material, and a flexible pouch. In the event a thermal event occurs, the phase change material changes from a liquid state to a gaseous state. The flexible pouch is configured to envelope the wettable thermal insulator and the phase change material in the liquid state.
    Type: Application
    Filed: July 6, 2023
    Publication date: April 11, 2024
    Inventors: Nigel Adrien Myers, Jason Jaspreet Singh Haer, Mark Daniel Goldman, Erica Viola Lewis
  • Patent number: 11947506
    Abstract: A computer-implemented method is disclosed for mapping a dataset from a Hilbert space of a given dimension to a Hilbert space of a different dimension, the method comprising obtaining a dataset, for each data sample of the dataset, for a plurality of episodes, generating an encoded sample; configuring an adiabatic quantum device by embedding each encoded sample into a q-body Hamiltonian H representative of an adiabatic quantum device, causing the adiabatic quantum device to evolve from an initial state to a final state; and performing a projective measurement along z axis at the final state to determine the value of each qubit; generating a corresponding binary vector representative of the given data sample in a transformed Hilbert space using the determined value of each qubit at each episode and providing a mapped dataset comprising each of the generated corresponding binary vectors.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: April 2, 2024
    Assignee: 1QB INFORMATION TECHNOLOGIES, INC.
    Inventors: Seyed Shakib Vedaie, Ehsan Zahedinejad, Roohollah Ghobadi, Daniel J. Crawford, Jaspreet S. Oberoi, Inderpreet Singh, Moslem Noori
  • Patent number: 11948207
    Abstract: A method for automatically recommending to a user of a software application one or more categories of a plurality of different categories of tax deductible expenses includes providing input data to a trained machine learning model and receiving output from the trained machine learning model based on the input data. The output includes a recommendation for the user that includes (i) one or more categories of the plurality of different categories of tax deductible expenses; and (ii) a plurality of examples of tax deductible expenses for each of the one or more categories. The method includes receiving feedback from the user on the recommendation and generating updated training data for the trained machine learning model based on the feedback.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: April 2, 2024
    Assignee: Intuit, Inc.
    Inventors: Shankar Sankararaman, Lan Jin, Shivani Gowrishankr, Jaspreet Singh
  • Patent number: 11934761
    Abstract: In some embodiments, techniques for creating fabricable segmented designs for physical devices are provided. A proposed segmented design is determined based on a design specification. The proposed segmented design includes a plurality of segments that each includes an indication of a material for the segment. The proposed segmented design also includes lattice members and lattice voids. A size of the lattice members and a size of the lattice voids are greater than a size of the segments and are greater than or equal to at least one of a minimum feature width and a minimum feature spacing of a fabrication system Performance of the proposed segmented design is simulated. One or more lattice members and lattice voids are chosen to change to improve the performance of the proposed segmented design.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: March 19, 2024
    Assignee: X Development LLC
    Inventors: Jaspreet Singh Jhoja, Brian Adolf
  • Patent number: 11901300
    Abstract: A universal interposer for an integrated circuit (IC) device has a body having a first surface and a second surface opposite the first surface. A first region is formed on a first side of the body along a first edge. The first region has first slots, each having an identical first bond pad layout. A second region is formed on the first side along a second edge, opposite the first edge. The second region has second slots having an identical second bond pad layout. A third region having third slots is formed on the first side between the first and second regions, each slot having an identical third bond pad layout. A pad density of the third bond pad layout is greater than the first bond pad layout. One of the third slots is coupled to contact pads disposed in a region not directly below any of the second slots.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: February 13, 2024
    Assignee: XILINX, INC.
    Inventors: Jaspreet Singh Gandhi, Brian C. Gaide
  • Patent number: 11887356
    Abstract: The disclosed systems, structures, and methods are directed to receiving a training data set comprising a plurality of original training samples, augmenting the original training samples by applying default transformations, training the machine learning model on at least a portion of the original training samples and at least a portion of the first set of augmented training samples, computing an unaugmented accuracy, augmenting the original training samples and the first set of augmented training samples by applying a candidate transformation, training the machine learning model on at least a portion of the original training samples, at least a portion of the first set of augmented training samples, and at least a portion of the second set of augmented training samples, computing an augmented accuracy, computing an affinity metric from the unaugmented accuracy and the augmented accuracy, and updating the candidate augmentation transformations list and the default augmentation transformations list.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: January 30, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Forouqsadat Khonsari, Jaspreet Singh Sambee
  • Publication number: 20240032019
    Abstract: A process for reducing contentions and/or packet collisions during downlink and/or uplink communications in a multipoint environment that uses time slice scheduling to overcome the technical deficiencies of CBAP and rasterized-based scheduling is described herein. For example, an access point (AP) controller configured to communicate with one or more APs may obtain interference data from one or more APs and/or stations (STAs) and/or traffic load data, and can use this information to divide a time period into one or more time slices and to assign each AP to one or more of the time slices. The AP controller can use this information to determine a number of time slices in which to divide the time period and a length (e.g., in time) of each time slice. The AP controller can also use this information to assign one or more APs to each time slice and to assign the STAs to be served by each AP in the AP's assigned time slice.
    Type: Application
    Filed: July 20, 2023
    Publication date: January 25, 2024
    Inventors: Jaspreet Singh, Siddhartha Mallik, Peter John Black, Tamer Adel Kadous
  • Patent number: 11809363
    Abstract: A method for debugging an electronic subsystem is disclosed. The method includes converting a first message in a first protocol format received at a first functional logical block of a plurality of functional logical blocks of an electronic subsystem into a second message in a second protocol format at the first functional logical block, wherein the second message includes a unique identifier (UID), and generating a first trace file corresponding to the first functional logical block, wherein the first trace file includes the UID. The method includes forwarding the second message from the first functional logical block to a second functional logical block. The method includes generating a second trace file corresponding to the second functional logical block, wherein the second trace file includes the UID, and performing an analysis on the first and the second functional logical blocks.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: November 7, 2023
    Assignee: Synopsys, Inc.
    Inventors: Jishnu De, Jaspreet Singh Gambhir
  • Publication number: 20230328611
    Abstract: A method of coordinating a plurality of radio access networks (RANs) includes aggregating, with a gateway, communications interfaces between a plurality of RANs and a packet core network through the gateway. A plurality of radio nodes (RNs) in each of the RANs is communicatively coupled to the gateway and to user equipment (UE) devices associated with the RNs in each of the RANs. The gateway also controls and coordinates mobility of the UE devices within and among the RANs. In addition, the gateway acts as a virtual enhanced NodeB (eNB) to the packet core network, thereby hiding the aggregated communications interfaces from the packet core network.
    Type: Application
    Filed: June 13, 2023
    Publication date: October 12, 2023
    Inventors: Yashodhan Dandekar, Brian Patrick Dunn, Hithesh Nama, Behrooz Parsay, Jaspreet Singh, Shashikant Tiwari
  • Patent number: 11777167
    Abstract: A battery pack for a vehicle electrical system includes a casing for receiving one or more battery modules. The battery modules are insertable into a casing of the battery pack by sliding couplers along pairs of rails and are securable to the ends of the rails. After insertion, the rails thermally insulate one battery module from other battery modules coupled to the casing. In some examples, a first stiffness or a first mechanical frequency of the casing with the one or more battery modules inserted may differ from a second stiffness or a second mechanical frequency associated with a body of a vehicle or another component associated therewith by a threshold amount. Additionally, the casing may be configured with vents for venting the hot gases, such as those generated by a battery module in a thermal runaway event.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: October 3, 2023
    Assignee: Zoox, Inc.
    Inventors: Robert Alan Ng, Moritz Boecker, Kyle Matthew Foley, Jason Jaspreet Singh Haer, David Sands
  • Publication number: 20230306877
    Abstract: A ground-based wing mockup station is provided. The mockup station comprises a primary support structure removably coupled to a floor and a wing mockup coupled to the primary support structure. A secondary support structure configured to suspend the wing mockup over the floor from the primary support structure. A payload pylon mockup is coupled to the wing mockup, wherein the payload pylon mockup is configured to hold an apparatus. The primary support structure, secondary support structure, wing mockup, and payload pylon mockup are configured to support a weight at least equal to the apparatus.
    Type: Application
    Filed: March 25, 2022
    Publication date: September 28, 2023
    Inventors: Sujib Dutta, James John, Jaspreet Singh
  • Patent number: 11750449
    Abstract: Methods and systems for an ubiquitous collaboration feature in a managed application environment are described herein. The collaboration service and/or server may store session information and one or more configuration files for use in rendering the collaboration features in combination with managed applications executing on a user's computing device.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: September 5, 2023
    Inventors: Jaspreet Singh, Maria Isabel Gomez
  • Publication number: 20230268280
    Abstract: A universal interposer for an integrated circuit (IC) device has a body having a first surface and a second surface opposite the first surface. A first region is formed on a first side of the body along a first edge. The first region has first slots, each having an identical first bond pad layout. A second region is formed on the first side along a second edge, opposite the first edge. The second region has second slots having an identical second bond pad layout. A third region having third slots is formed on the first side between the first and second regions, each slot having an identical third bond pad layout. A pad density of the third bond pad layout is greater than the first bond pad layout. One of the third slots is coupled to contact pads disposed in a region not directly below any of the second slots.
    Type: Application
    Filed: February 22, 2022
    Publication date: August 24, 2023
    Inventors: Jaspreet Singh GANDHI, Brian C. GAIDE
  • Patent number: 11735786
    Abstract: A system that includes a wettable thermal insulator, a phase change material, and a flexible pouch. In the event a thermal event occurs, the phase change material changes from a liquid state to a gaseous state. The flexible pouch is configured to envelope the wettable thermal insulator and the phase change material in the liquid state.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: August 22, 2023
    Assignee: Lunar Energy, Inc.
    Inventors: Nigel Adrien Myers, Jason Jaspreet Singh Haer, Mark Daniel Goldman, Erica Viola Lewis
  • Patent number: 11705986
    Abstract: A method and a system for correcting cyclic redundancy check (CRC) for a frame with last bytes changed are provided. The method includes acquiring a data frame, calculating a CRC of a modified data frame, and determining a corrected CRC for the data frame based on at least the CRC of the modified data frame and a CRC correction field calculated on the bytes to be replaced at the end of the frame. An altered data frame includes the data frame with a number of last bytes of the data frame replaced with new bytes.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: July 18, 2023
    Assignee: Synopsys, Inc.
    Inventors: Jishnu De, Jaspreet Singh Gambhir, Jitendra Puri
  • Patent number: 11700561
    Abstract: A method of coordinating a plurality of radio access networks (RANs) includes aggregating, with a gateway, communications interfaces between a plurality of RANs and a packet core network through the gateway. A plurality of radio nodes (RNs) in each of the RANs is communicatively coupled to the gateway and to user equipment (UE) devices associated with the RNs in each of the RANs. The gateway also controls and coordinates mobility of the UE devices within and among the RANs. In addition, the gateway acts as a virtual enhanced NodeB (eNB) to the packet core network, thereby hiding the aggregated communications interfaces from the packet core network.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: July 11, 2023
    Assignee: CORNING OPTICAL COMMUNICATIONS LLC
    Inventors: Yashodhan A. Dandekar, Brian Dunn, Hithesh Nama, Behrooz Parsay, Jaspreet Singh, Shashikant Tiwari
  • Publication number: 20230186117
    Abstract: A method includes receiving a computing system future state description in response to prompting a user; determining specific properties; predicting a solution architecture based on the specific properties; and generating infrastructure-as-code. A computing system includes a processor; and a memory having stored thereon instructions that, when executed, cause the computing system to: prompt a user to describe a future state of a computing system; receive a description of the future state; determine specific properties; predict a solution architecture based on the specific properties; and generate infrastructure-as-code.
    Type: Application
    Filed: February 1, 2023
    Publication date: June 15, 2023
    Inventors: Sastry Vsm Durvasula, Neema Uthappa, Sriram Venkatesan, Sonam Jha, Jaspreet Singh, Rares Almasan
  • Publication number: 20230170707
    Abstract: A power system includes an integrated energy storage system (ESS). It further includes a photovoltaic (PV) source. It further includes an integrated inverter having power connections to both the energy storage system and the photovoltaic source. The inverter includes an integrated PV disconnect switch.
    Type: Application
    Filed: November 7, 2022
    Publication date: June 1, 2023
    Inventors: Jason Jaspreet Singh Haer, Conrad Xavier Murphy
  • Patent number: 11645548
    Abstract: A method includes receiving first input, analyzing the first input using a first model, receiving second input, analyzing the second input using a second model; and generating infrastructure-as-code. A computing system includes a processor; and a memory comprising instructions, that when executed, cause the computing system to: receive first input, analyze the first input using a first model, receive second input, analyze the second input using a second model; and generate infrastructure-as-code. A non-transitory computer-readable storage medium storing executable instructions that, when executed by a processor, cause a computer to: receive first input, analyze the first input using a first model, receive second input, analyze the second input using a second model; and generate infrastructure-as-code.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: May 9, 2023
    Assignee: MCKINSEY & COMPANY, INC.
    Inventors: Sastry Vsm Durvasula, Neema Uthappa, Sriram Venkatesan, Sonam Jha, Jaspreet Singh, Rares Almasan