Patents by Inventor Jaspreet Singh

Jaspreet Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210134757
    Abstract: A chip package assembly and method for fabricating the same are provided which utilize a plurality of posts in mold compound for improved resistance to delamination. In one example, a chip package assembly is provided that includes a first integrated circuit (IC) die, a substrate, a redistribution layer, a mold compound and a plurality of posts. The redistribution layer provides electrical connections between circuitry of the first IC die and circuitry of the substrate. The mold compound is disposed in contact with the first IC die and spaced from the substrate by the redistribution layer. The plurality of posts are disposed in the mold compound and are laterally spaced from the first IC die. The plurality of posts are not electrically connected to the circuitry of the first IC die.
    Type: Application
    Filed: November 4, 2019
    Publication date: May 6, 2021
    Inventors: Jaspreet Singh GANDHI, Suresh RAMALINGAM
  • Patent number: 10985352
    Abstract: A battery pack for a vehicle electrical system includes a casing for receiving one or more battery modules. The battery modules are insertable into a casing of the battery pack by sliding couplers along pairs of rails and are securable to the ends of the rails. After insertion, the rails thermally insulate one battery module from other battery modules in the battery pack. Additionally, the battery modules may include a top cover with an insulating material to further thermally insulate one battery module from another battery module. The battery pack may additionally be configured with vents for venting the hot gases, such as those generated by a battery module in a thermal runaway event. Additionally, the battery modules may include a second insulating material disposed between cells and configured to thermally insulate the cells from one another.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: April 20, 2021
    Assignee: Zoox, Inc.
    Inventors: Robert Alan Ng, Moritz Boecker, Kyle Matthew Foley, Jason Jaspreet Singh Haer, David Sands
  • Patent number: 10971474
    Abstract: A chip package and method of fabricating the same are described herein. The chip package generally includes a stand-off which spaces a die from a substrate to control the collapse of a solder joint coupling the die to the substrate.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: April 6, 2021
    Assignee: XILINX, INC.
    Inventors: Jaspreet Singh Gandhi, Henley Liu
  • Publication number: 20210092012
    Abstract: Methods and systems for an ubiquitous collaboration feature in a managed application environment are described herein. The collaboration service and/or server may store session information and one or more configuration files for use in rendering the collaboration features in combination with managed applications executing on a user's computing device.
    Type: Application
    Filed: October 19, 2020
    Publication date: March 25, 2021
    Inventors: Jaspreet Singh, Maria Isabel Gomez
  • Publication number: 20210073083
    Abstract: A proactive data recovery system is provided. The system includes a memory having computer-readable instructions stored therein and a processor configured to execute the computer-readable instructions to access a data storage platform and to monitor a plurality of parameters indicative of a requirement of data restore and/or recovery for the data storage platform. The requirement corresponds to a predicted occurrence of a disaster event. The processor is further configured trigger backup of data stored in the data storage platform based upon the plurality of parameters to create a restore package and to initiate the data restore and/or data recovery operation for the data storage platform using the restore package in response to the occurrence of the disaster event.
    Type: Application
    Filed: December 12, 2019
    Publication date: March 11, 2021
    Inventors: Amar Solanke, Somesh Jain, Ramanan Balakrishnan, Jaspreet Singh
  • Patent number: 10930611
    Abstract: An integrated circuit assembly having an improved solder connection, and methods for fabricating the same are provided that utilize platelets within the solder connections to inhibit solder connection failure, thus providing a more robust solder interface. In one example, an integrated circuit assembly is provided that includes a package substrate having a first plurality of contact pads exposed on a first surface of the package substrate and a second plurality of contact pads exposed on a second surface of the package substrate. The second plurality of contact pads have a pitch that is greater than a pitch of the first plurality of contact pads. Interconnect circuitry is disposed in the package substrate and couples the first and second pluralities of contact pads. At least a first contact pad of the second plurality of contact pads includes a solder ball disposed directly in contact with a palladium layer.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: February 23, 2021
    Assignee: XILINX, INC.
    Inventors: Jaspreet Singh Gandhi, Tien-Yu Lee
  • Patent number: 10916758
    Abstract: A battery pack for a vehicle electrical system configured with high-voltage bus bars. A positive bus bar and a negative bus bar may provide power generated by the battery pack to a drive module of the vehicle, to power one or more components of the vehicle. The drive module may additionally couple to high-voltage positive and negative bus bars. The high-voltage bus bars may be configured to provide additional power to the drive module from another battery pack, such as via a battery balance box. Additionally, the high-voltage bus bars may be configured to carry excess power from the drive module to another drive module associated with the vehicle via the battery balance box. The high-voltage bus bars may be configured to de-energize in the event of a thermal runaway or other failure of a battery module of the associated battery pack.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: February 9, 2021
    Assignee: Zoox, Inc.
    Inventors: Robert Alan Ng, Moritz Boecker, Kyle Matthew Foley, Jason Jaspreet Singh Haer, David Sands
  • Patent number: 10891423
    Abstract: A portal page may be displayed in the active area of a portable computing device display. The portable computing device may receive display data that includes original page display instructions specifying how to display a plurality of portlets within a common page. The personal computing device may identify an initial portlet of the plurality of portlets and remove portlets, other than the initial portlet, from the original page display instructions to produce modified page display instructions having at least one transition instruction. The personal computing device may scale, based upon the modified page display instructions, the initial portlet to render within the active display area; and render, based upon the scaled initial portlet, a web page within the active display area.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: January 12, 2021
    Assignee: International Business Machines Corporation
    Inventors: Stefan A. Hepper, Jaspreet Singh
  • Patent number: 10878175
    Abstract: A portal page may be displayed in the active area of a portable computing device display. The portable computing device may receive display data that includes original page display instructions specifying how to display a plurality of portlets within a common page. The personal computing device may identify an initial portlet of the plurality of portlets and remove portlets, other than the initial portlet, from the original page display instructions to produce modified page display instructions having at least one transition instruction. The personal computing device may scale, based upon the modified page display instructions, the initial portlet to render within the active display area; and render, based upon the scaled initial portlet, a web page within the active display area.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: December 29, 2020
    Assignee: International Business Machines Corporation
    Inventors: Stefan A. Hepper, Jaspreet Singh
  • Patent number: 10879157
    Abstract: An improved interconnect substrate having high density routings for a chip package assembly, a chip package assembly having a high density substrate, and methods for fabricating the same are provided that utilize substrates having a region of high density routings disposed over a region of low density routings. In one example, a method for fabricating an interconnect substrate is provided that includes forming a high density routing region by depositing a seed layer on a top surface of a low density routing region, patterning a mask layer on the seed layer, forming a plurality of conductive posts on the seed layer, removing the mask layer and the seed layer exposed between the conductive posts, and depositing a dielectric layer between the between the conductive posts, wherein at least some of the conductive posts are electrically coupled to conductive routing comprising the low density routing region.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: December 29, 2020
    Assignee: XILINX, INC.
    Inventor: Jaspreet Singh Gandhi
  • Patent number: 10826761
    Abstract: Methods and systems for an ubiquitous collaboration feature in a managed application environment are described herein. The collaboration service and/or server may store session information and one or more configuration files for use in rendering the collaboration features in combination with managed applications executing on a user's computing device.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: November 3, 2020
    Assignee: Citrix Systems, Inc.
    Inventors: Jaspreet Singh, Maria Isabel Gomez
  • Publication number: 20200303341
    Abstract: An electronic device and method for fabricating the same are disclosed herein. In one example the electronic device includes a substrate, a first die stack, and a second die stack. The first die stack includes a first functional die and a first dummy die. The first functional die is mounted to the substrate. The second stack includes a plurality of serially stacked second functional dies mounted to the substrate. The first dummy die is stacked on the first functional die. The first dummy die has a top surface that is substantially coplanar with a top surface of the second die stack. In one particular example, the first die stack includes a logic die and the second die stack includes a plurality of serially stacked memory dies.
    Type: Application
    Filed: March 22, 2019
    Publication date: September 24, 2020
    Applicant: Xilinx, Inc.
    Inventors: Myongseob Kim, Henley Liu, Cheang-Whang Chang, Jaspreet Singh Gandhi
  • Publication number: 20200288405
    Abstract: Systems and methods are disclosed that provide a closed loop power control system including adaptively adjusting the desired target SINR over time so as to ultimately achieve a feasible SINR. In one implementation, a method is provided of optimizing uplink closed loop power control in a RAN in which one or more base stations each service a plurality of mobile stations, including: determining a power level for each mobile station for its respective uplink transmissions, including measuring a current achieved SINR for each mobile station; and for each mobile station, adjusting the power level to be sufficiently high to meet desired transmission characteristics but not so high as to cause unnecessary interference with transmissions from other mobile stations, by adjusting a desired target SINR based on factors selected from the following: current and prior achieved SINRs, current and prior interference measurements, and current and prior transmission power control commands.
    Type: Application
    Filed: May 21, 2020
    Publication date: September 10, 2020
    Inventors: Brian Dunn, Hithesh Nama, Srinivas Pinagapany, Jaspreet Singh
  • Patent number: 10770430
    Abstract: An electronic device and method for fabricating the same are disclosed herein. In one example the electronic device includes a substrate, a first die stack, and a second die stack. The first die stack includes a first functional die and a first dummy die. The first functional die is mounted to the substrate. The second stack includes a plurality of serially stacked second functional dies mounted to the substrate. The first dummy die is stacked on the first functional die. The first dummy die has a top surface that is substantially coplanar with a top surface of the second die stack. In one particular example, the first die stack includes a logic die and the second die stack includes a plurality of serially stacked memory dies.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: September 8, 2020
    Assignee: XILINX, INC.
    Inventors: Myongseob Kim, Henley Liu, Cheang-Whang Chang, Jaspreet Singh Gandhi
  • Publication number: 20200272559
    Abstract: An aspect of the present disclosure enhances efficiency in regression testing of software applications by predicting failures of test cases in a proposed test suite. In an embodiment, a system receives as an input multiple test cases of a test suite, where each test case is specified associated with a case identifier, a version number of the test case, a requirement identifier, and a last run status. The system then predicts a set of test cases expected to fail in a next run of the test suite by providing the input to a model implementing machine learning (ML). According to another aspect, the system also predicts a count of defects expected for each requirement in the next run and a severity for each defect.
    Type: Application
    Filed: February 26, 2020
    Publication date: August 27, 2020
    Inventors: Gurpreet Singh Ahluwalia, Jaspreet Singh, Mohit Bardaiyar, Manish Srivastava
  • Patent number: 10743357
    Abstract: Methods and systems for enabling multiple mobile devices to access an access gateway when at least one of the multiple mobile devices is unable to establish a virtual private network connection with the access gateway are described herein. For example, in some embodiments, a mobile device may configure itself as a member of a mesh network. A virtual private network connection may be established between the mobile device and the access gateway. The mesh network may include one or more other member devices that are unable to establish a virtual private network with the access gateway. After completing its configuration, the mobile device may receive, over a peer-to-peer connection of the mesh network, data that is intended for the access gateway and that is from one of the other member devices. The mobile device may transmit the data to the access gateway via the virtual private network connection.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: August 11, 2020
    Assignee: Citrix Systems, Inc.
    Inventors: Chakravarthi Valicherla, Grant Kennell, Jaspreet Singh
  • Patent number: 10728806
    Abstract: A method of coordinating a plurality of radio access networks (RANs) includes aggregating, with a gateway, communications interfaces between a plurality of RANs and a packet core network through the gateway. A plurality of radio nodes (RNs) in each of the RANs is communicatively coupled to the gateway and to user equipment (UE) devices associated with the RNs in each of the RANs. The gateway also controls and coordinates mobility of the UE devices within and among the RANs.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: July 28, 2020
    Assignee: Corning Optical Communications LLC
    Inventors: Tsung-Yi Chen, Jaspreet Singh, Peter J Worters
  • Publication number: 20200234292
    Abstract: Various methods, apparatuses, and media for processing a transaction are provided. A request to process the transaction is received. A plurality of pieces of transaction data is identified from the request. A contract provider that is configured to process the transaction is determined based on at least a first piece of the transaction data. A contract is loaded based on the contract provider. The contract includes at least one mono-service. The contract, including the at least one mono-service, is executed. Each of the at least one mono-service is a function literal that includes a defined input and output. The input includes at least one of the plurality of pieces of transaction data. The at least one mono-service is configured to return a result of the processing of the transaction.
    Type: Application
    Filed: January 22, 2019
    Publication date: July 23, 2020
    Applicant: JPMorgan Chase Bank, N.A.
    Inventors: Jason CARLYLE, Nicholas P. STUMPOS, Jaspreet Singh SETHI
  • Publication number: 20200228997
    Abstract: A method for assigning a percentage of a CSAT time cycle to each radio node (RN) in a plurality of RNs that belong to a small cell radio access network (RAN) having a central controller includes: (i) for each time cycle period during which the RNs share a channel with one or more nodes that employ a different radio access technology (RAT), assigning a default occupancy percentage of the time cycles to each of the RNs; (ii) determining if the default occupancy percentage is able to be increased without violating one or more co-existence principles pre-established for the RAT employed by the RNs in the RAN and the different RAT; (iii) increasing the occupancy percentage of the first RN if it is determined that the default occupancy percentage is able to be increased without violating the co-existence principles; and (iv) sequentially repeating (ii)-(iii) for each remaining RN in the RAN.
    Type: Application
    Filed: April 2, 2020
    Publication date: July 16, 2020
    Inventors: Tsung-Yi Chen, Hithesh Nama, Jaspreet Singh
  • Patent number: 10694468
    Abstract: Systems and methods are disclosed that provide a closed loop power control system including adaptively adjusting the desired target SINR over time so as to ultimately achieve a feasible SINR. In one implementation, a method is provided of optimizing uplink closed loop power control in a RAN in which one or more base stations each service a plurality of mobile stations, including: determining a power level for each mobile station for its respective uplink transmissions, including measuring a current achieved SINR for each mobile station; and for each mobile station, adjusting the power level to be sufficiently high to meet desired transmission characteristics but not so high as to cause unnecessary interference with transmissions from other mobile stations, by adjusting a desired target SINR based on factors selected from the following: current and prior achieved SINRs, current and prior interference measurements, and current and prior transmission power control commands.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: June 23, 2020
    Assignee: Corning Optical Communications LLC
    Inventors: Brian Dunn, Hithesh Nama, Srinivas Pinagapany, Jaspreet Singh