Abstract: ML methods and systems for cataloging and making recommendations based on domain-specific knowledge are disclosed. An example method includes: cataloging, using knowledge engines, data to develop knowledge repositories for respective domains; obtain current domain state data; obtain future domain state data; analyze, using first ML models, one or more of (i) data from the knowledge repositories, (ii) the first domain state data, and (iii) the second domain state data to identify a recommended set of one or more regulations, standards, policies and/or rules for a desired second domain state; analyze, using second ML models, (i) the recommended set and (ii) a current data and architecture state for a current computing environment to generate a summary of one or more cloud deployment options for migrating a current computing environment to a future computing environment for a future domain state; and cause the summary to be displayed on a computing device.

Abstract: A method includes receiving first input, analyzing the first input using a first model, receiving second input, analyzing the second input using a second model; and generating infrastructure-as-code. A computing system includes a processor; and a memory comprising instructions, that when executed, cause the computing system to: receive first input, analyze the first input using a first model, receive second input, analyze the second input using a second model; and generate infrastructure-as-code. A non-transitory computer-readable storage medium storing executable instructions that, when executed by a processor, cause a computer to: receive first input, analyze the first input using a first model, receive second input, analyze the second input using a second model; and generate infrastructure-as-code.

Abstract: A method includes collecting current data and architecture state, collecting future data and architecture state; analyzing the current and/or future data and architecture state to generate deployment options; and causing the summary of options to be displayed. A computing system includes a processor and a memory comprising instructions, that when executed, cause the system to collect current data and architecture state, collect future data and architecture state; analyze the current and/or future data and architecture state to generate deployment options; and cause the summary of options to be displayed. A non-transitory computer-readable storage medium includes executable instructions that, when executed by a processor, cause a computer to collect current data and architecture state, collect future data and architecture state; analyze the current and/or future data and architecture state to generate deployment options; and cause the summary of options to be displayed.

Abstract: A system performs verification of Ethernet hardware. A data frame including a first portion for storing a checksum value and a second portion for storing a timestamp value is received. The second portion of data frame is set to zero. A timestamp value for including in second portion of the data frame is received. A modified checksum value is determined based on the checksum value included in the first portion of the data frame and the timestamp value. A cyclic redundancy check (CRC) value is determined for the data frame by nullifying the checksum value in the data frame and considering the timestamp value. A final CRC value is determined by combining the CRC value for the data frame and a CRC correction value based on the checksum. The modified data frame is sent for processing using an emulator.

Abstract: An insurance recommendation engine receives customer data and using trained models recommends one or more insurance products that are suitable for the customer. The recommendation engine also provides an explanation as to why the particular products have been recommended. The recommendation models are incorporated into a system that can improves the customer's experience.

Abstract: A power system includes an integrated energy storage system (ESS). It further includes a photovoltaic (PV) source. It further includes an integrated inverter having power connections to both the energy storage system and the photovoltaic source. The inverter includes an integrated PV disconnect switch.

Abstract: A chip package assembly and method for fabricating the same are provided which utilize a plurality of electrically floating extra-die heat transfer posts for improved thermal management. In one example, a chip package assembly is provided that includes a substrate, a first integrated circuit (IC) die, and a first plurality of electrically floating extra-die conductive posts. The substrate has a first surface and an opposing second surface. The first integrated circuit (IC) die has a first surface and an opposing second surface. The second surface of the first IC die is mounted to the first surface of the substrate. The first plurality of electrically floating extra-die conductive posts extend from the first surface of the first IC die to provide a heat transfer path away from the first IC die.

Abstract: Various methods, apparatuses, and media for processing a transaction are provided. A request to process the transaction is received. The request includes a plurality of pieces of transaction data. An initial contract is identified, based on at least a first piece of the transaction data, and loaded. The initial contract includes a plurality of mono-services, with each of the mono-services being a function literal that includes a defined input and output and being configured to implement exactly one piece of functionality. The initial contract is executed, with the mono-services being configured to return a result for responding to the request to process the transaction.

Abstract: A method includes receiving first input, analyzing the first input using a first model, receiving second input, analyzing the second input using a second model; and generating infrastructure-as-code. A computing system includes a processor; and a memory comprising instructions, that when executed, cause the computing system to: receive first input, analyze the first input using a first model, receive second input, analyze the second input using a second model; and generate infrastructure-as-code. A non-transitory computer-readable storage medium storing executable instructions that, when executed by a processor, cause a computer to: receive first input, analyze the first input using a first model, receive second input, analyze the second input using a second model; and generate infrastructure-as-code.

Abstract: A method and a system for correcting cyclic redundancy check (CRC) for a frame with last bytes changed are provided. The method includes acquiring a data frame, calculating a CRC of a modified data frame, and determining a corrected CRC for the data frame based on at least the CRC of the modified data frame and a CRC correction field calculated on the bytes to be replaced at the end of the frame. An altered data frame includes the data frame with a number of last bytes of the data frame replaced with new bytes.

Abstract: A chip package assembly and method of fabricating the same are described herein. The chip package assembly generally includes at least one integrated circuit (IC) die that has had the original solder interconnects at least partially replaced to enhance the reliability of a redistribution layer disposed between the IC die and the substrate. In the resulting chip package assembly, at least one IC die includes first and second pillars extending from exposed contact pads through a first mold compound. The second pillars are fabricated from a material that has a composition different than that of the first pillars. A redistribution layer is formed on the first and second pillars. The solder interconnects mechanically couple the redistribution layer to landing pads of a substrate. The solder interconnects also electrically couple circuitry of the substrate to the circuitry of the IC die through the redistribution layer and first and second pillars.

Abstract: In some embodiments, techniques for creating fabricable segmented designs for physical devices are provided. A proposed segmented design is determined based on a design specification. The proposed segmented design includes a plurality of segments that each includes an indication of a material for the segment. The proposed segmented design also includes lattice members and lattice voids. A size of the lattice members and a size of the lattice voids are greater than a size of the segments and are greater than or equal to at least one of a minimum feature width and a minimum feature spacing of a fabrication system Performance of the proposed segmented design is simulated. One or more lattice members and lattice voids are chosen to change to improve the performance of the proposed segmented design.

Abstract: The disclosed systems, structures, and methods are directed to receiving a training data set comprising a plurality of original training samples, augmenting the original training samples by applying default transformations, training the machine learning model on at least a portion of the original training samples and at least a portion of the first set of augmented training samples, computing an unaugmented accuracy, augmenting the original training samples and the first set of augmented training samples by applying a candidate transformation, training the machine learning model on at least a portion of the original training samples, at least a portion of the first set of augmented training samples, and at least a portion of the second set of augmented training samples, computing an augmented accuracy, computing an affinity metric from the unaugmented accuracy and the augmented accuracy, and updating the candidate augmentation transformations list and the default augmentation transformations list.

Abstract: Various methods, apparatuses, and media for processing a transaction are provided. A request to process the transaction is received. A plurality of pieces of transaction data is identified from the request. A contract provider that is configured to process the transaction is determined based on at least a first piece of the transaction data. A contract is loaded based on the contract provider. The contract includes at least one mono-service. The contract, including the at least one mono-service, is executed. Each of the at least one mono-service is a function literal that includes a defined input and output. The input includes at least one of the plurality of pieces of transaction data. The at least one mono-service is configured to return a result of the processing of the transaction.

Abstract: A chip package assembly and method for fabricating the same are provided which utilize a plurality of extra-die heat transfer posts for improved thermal management. In one example, a chip package assembly is provided that includes a first integrated circuit (IC) die mounted to a substrate, a cover disposed over the first IC die, and a plurality of extra-die conductive posts disposed between the cover and substrate. The extra-die conductive posts provide a heat transfer path between the cover and substrate that is laterally outward of the first IC die.

Abstract: A method of making a light sensor module includes connecting a light sensing circuit to an interconnect on a substrate, and forming a cap. The cap is formed by producing a cap substrate from material opaque to light to have an opening formed therein, placing the cap substrate top-face down, dispensing a light transmissible material into the opening, compressing the light transmissible material using a hot tool to thereby cause the light transmissible material to fully flow into the opening to form at a light transmissible aperture, and placing the cap substrate into a curing environment. A bonding material is dispensed onto the substrate. The cap is picked up and placed onto the substrate positioned such that the light transmissible aperture is aligned with the light sensing circuit, with the bonding material bonding the cap to the substrate to thereby form the light sensor module.

Abstract: A chip package assembly having robust solder connections are described herein. In one example, a chip package assembly is provided that includes an integrated circuit (IC) die and a package substrate. Solder pads are arranged to connect to pillars of the IC die via solder connections. Solder resist in the corners of the package substrate and surrounding the solder connections may be inhibited from cracking isolating the portion of the solder resist surrounding the solder pads and/or by providing an offset between centerlines of the pillars and solder pads.

Abstract: A method for assigning a percentage of a CSAT time cycle to each radio node (RN) in a plurality of RNs that belong to a small cell radio access network (RAN) having a central controller includes: (i) for each time cycle period during which the RNs share a channel with one or more nodes that employ a different radio access technology (RAT), assigning a default occupancy percentage of the time cycles to each of the RNs; (ii) determining if the default occupancy percentage is able to be increased without violating one or more co-existence principles pre-established for the RAT employed by the RNs in the RAN and the different RAT; (iii) increasing the occupancy percentage of the first RN if it is determined that the default occupancy percentage is able to be increased without violating the co-existence principles; and (iv) sequentially repeating (ii)-(iii) for each remaining RN in the RAN.

Abstract: A chip package assembly and method for fabricating the same are provided that provide a modular chip stack that can be matched with one or more chiplets. The use of chiplets enables the same modular stack to be utilized in a large number of different chip package assembly designs, resulting much faster development times at a fraction of the overall solution cost.

Abstract: A chip package assembly having pillars extending between an interconnect layer and solder balls, and methods for manufacturing the same are provide. The pillars decouple stress from the interconnect layer, making crack initiation and propagation to the interconnect layer less likely, resulting in a more robust assembly. In one example, a chip package assembly is provided that includes an integrated circuit (IC) die, an interconnect layer and a plurality of pillars. The IC dies includes a die body containing functional circuitry. The body has a lower surface, an upper surface and sides. The IC die includes contact pads coupled to the functional circuitry and exposed on the lower surface of the die body. The interconnect layer is formed on the lower surface of the body. The plurality of pillars are formed on the interconnect layer and electrically couple to the contact pads through routing formed through the interconnect layer.