Abstract: The present disclosure relates to a storage device. The storage device includes a memory device including write-completed blocks storing data and free blocks each containing no data and a memory controller controlling the memory device to perform a garbage collection operation to store valid data stored in a victim block, among the write-completed blocks, in one of the free blocks based on the number of map segments including mapping information between logical addresses and physical addresses of the valid data, and erase counts of the free blocks.

Abstract: A memory system includes a memory device including plural memory groups, each memory group including plural non-volatile memory cells; and a controller configured to transmit a command to the memory device so that the memory device performs a data input/output operation within at least one memory group among the plural memory groups, receive a response for the command and a status data regarding the at least one memory group from the memory device, and determine whether the data input/output operation has succeeded or failed based on the response and the status data.

Abstract: A memory device is provided to include: a plurality of memory cells; a peripheral circuit configured to perform an operation on the plurality of memory cells; a temperature circuit configured to measure a temperature of the memory device; a monitoring component configured to generate, based on whether a measured temperature is within a reference range, monitoring information representing an operation mode that is either a normal mode in which the operation is performed or a protection mode in which the operation is suspended; and an operation controller configured to output a signal for controlling the operation according to the monitoring information. The monitoring component is further configured to store the monitoring information and output the monitoring information to the operation controller in response to receiving the measured temperature from the temperature circuit.

Abstract: A controller controls a semiconductor memory device including a plurality of pages. The controller includes a command generator configured to generate a command for controlling a program operation or a read operation of a semiconductor memory device, and a data recovery manager configured to generate parity data corresponding to a weak page among a plurality of pages included in the semiconductor memory device and recover data programmed to the weak page.

Abstract: A nonvolatile memory device may include: a memory cell array operated by a first voltage, and including a plurality of memory cells; a peripheral circuit operated by the first voltage, and configured to store data in the memory cell array or read data from the memory cell array; an operation recorder operated by a second voltage, and configured to record information on an operation being performed in the nonvolatile memory device; and a control logic operated by the first voltage, and configured to control the peripheral circuit such that the nonvolatile memory device performs an operation corresponding to a command received from an external device, and control the operation recorder to store the information on the operation being performed in the nonvolatile memory device.

Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may completely scan each of one or more target memory blocks among the plurality of memory blocks, once in each scan period to detect an error in data stored in the corresponding target memory block and may block an attempted second scan of each target memory block in a scan period in which the corresponding target memory block has already been scanned until the scan period is completed.

Abstract: The present disclosure relates to a storage device. The storage device includes a memory device including write-completed blocks storing data and free blocks each containing no data and a memory controller controlling the memory device to perform a garbage collection operation to store valid data stored in a victim block, among the write-completed blocks, in one of the free blocks based on the number of map segments including mapping information between logical addresses and physical addresses of the valid data, and erase counts of the free blocks.

Abstract: A storage device may include: a memory device including a plurality of memory blocks; a buffer memory device to store event information; and a memory controller configured to: upon occurrence of the predetermined event while a write operation, store, in the buffer memory device, the event information for the event page, and control the memory device to perform a test read operation to read at least one page in the plurality of memory blocks except the event page, based on the event information; upon failure of the test read operation, control the memory device to perform a migration operation of moving, to a replacement block, data stored in valid pages except a page on which the test read operation has fails among pages included in a memory block on which the test read operation fails.

Abstract: A memory device is provided to include: a plurality of memory cells; a peripheral circuit configured to perform an operation on the plurality of memory cells; a temperature circuit configured to measure a temperature of the memory device; a monitoring component configured to generate, based on whether a measured temperature is within a reference range, monitoring information representing an operation mode that is either a normal mode in which the operation is performed or a protection mode in which the operation is suspended; and an operation controller configured to output a signal for controlling the operation according to the monitoring information. The monitoring component is further configured to store the monitoring information and output the monitoring information to the operation controller in response to receiving the measured temperature from the temperature circuit.

Abstract: The present disclosure relates to a storage device and an operating method thereof. The storage device includes a memory device including write-completed blocks storing data and free blocks each containing no data and a memory controller controlling the memory device to perform a garbage collection operation to store valid data stored in a victim block, among the write-completed blocks, in one of the free blocks based on the number of map segments including mapping information between logical addresses and physical addresses of the valid data, and erase counts of the free blocks.

Abstract: A storage device performs a read operation, based on a temperature measured in a program operation or an erase operation. The storage device includes: a memory device including a plurality of memory blocks, the memory device measuring a temperature in a program operation or an erase operation; and a memory controller for setting an area in which the measured temperature is to be stored in the memory device, and controlling a read operation to be performed in the memory device. When a read command for a selected page among a plurality of pages included in each of the plurality of memory blocks is received from the memory controller, the memory device determines a read voltage and a pass voltage based on a temperature corresponding to the selected page and performs a read operation on the selected page by using the read voltage and the pass voltage.

Abstract: A data storage device may include a nonvolatile memory device, and a controller configured to increase an assert count, when a malfunction occurs while an operation for a command received from a host device is executed, the assert count representing the number of times the malfunction has occurred, and execute a flash translation layer (FTL) resetting operation in a read-dedicated mode in response to an initialization request from the host device when the assert count is greater than or equal to a reference value.

Abstract: A storage device may include: a memory device including a plurality of memory blocks; a buffer memory device to store event information; and a memory controller configured to: upon occurrence of the predetermined event while a write operation, store, in the buffer memory device, the event information for the event page, and control the memory device to perform a test read operation to read at least one page in the plurality of memory blocks except the event page, based on the event information; upon failure of the test read operation, control the memory device to perform a migration operation of moving, to a replacement block, data stored in valid pages except a page on which the test read operation has fails among pages included in a memory block on which the test read operation fails.

Abstract: A memory system includes a memory device including plural memory groups, each memory group including plural non-volatile memory cells; and a controller configured to transmit a command to the memory device so that the memory device performs a data input/output operation within at least one memory group among the plural memory groups, receive a response for the command and a status data regarding the at least one memory group from the memory device, and determine whether the data input/output operation has succeeded or failed based on the response and the status data.

Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may completely scan each of one or more target memory blocks among the plurality of memory blocks, once in each scan period to detect an error in data stored in the corresponding target memory block and may block an attempted second scan of each target memory block in a scan period in which the corresponding target memory block has already been scanned until the scan period is completed.

Abstract: The present disclosure relates to a storage device. The storage device includes a memory device including write-completed blocks storing data and free blocks each containing no data and a memory controller controlling the memory device to perform a garbage collection operation to store valid data stored in a victim block, among the write-completed blocks, in one of the free blocks based on the number of map segments including mapping information between logical addresses and physical addresses of the valid data, and erase counts of the free blocks.

Abstract: A data storage device may include a nonvolatile memory device, and a controller configured to increase an assert count, when a malfunction occurs while an operation for a command received from a host device is executed, the assert count representing the number of times the malfunction has occurred, and execute a flash translation layer (FTL) resetting operation in a read-dedicated mode in response to an initialization request from the host device when the assert count is greater than or equal to a reference value.

Abstract: A nonvolatile memory device may include: a memory cell array operated by a first voltage, and including a plurality of memory cells; a peripheral circuit operated by the first voltage, and configured to store data in the memory cell array or read data from the memory cell array; an operation recorder operated by a second voltage, and configured to record information on an operation being performed in the nonvolatile memory device; and a control logic operated by the first voltage, and configured to control the peripheral circuit such that the nonvolatile memory device performs an operation corresponding to a command received from an external device, and control the operation recorder to store the information on the operation being performed in the nonvolatile memory device.

Abstract: A nonvolatile memory device may include: a memory cell array operated by a first voltage, and including a plurality of memory cells; a peripheral circuit operated by the first voltage, and configured to store data in the memory cell array or read data from the memory cell array; an operation recorder operated by a second voltage, and configured to record information on an operation being performed in the nonvolatile memory device; and a control logic operated by the first voltage, and configured to control the peripheral circuit such that the nonvolatile memory device performs an operation corresponding to a command received from an external device, and control the operation recorder to store the information on the operation being performed in the nonvolatile memory device.

Abstract: A memory system may include: a memory device storing data and including a memory interface in communication with a memory controller; and the memory controller controlling the memory device and including a controller interface in communication with the memory device, and, wherein, when the memory device is inaccessible, the memory controller requests a current state information including current operation mode of the memory interface from the memory device, and changes an operation mode of the controller interface to match the current operation mode of the memory interface according to the current state information received from the memory device.