Abstract: A memory system may include: a memory device storing data and including a memory interface in communication with a memory controller; and the memory controller controlling the memory device and including a controller interface in communication with the memory device, and, wherein, when the memory device is inaccessible, the memory controller requests a current state information including current operation mode of the memory interface from the memory device, and changes an operation mode of the controller interface to match the current operation mode of the memory interface according to the current state information received from the memory device.

Abstract: A nonvolatile memory device includes a memory cell array; a peripheral circuit configured to perform an operation corresponding to a command provided from an external device, for the memory cell array; a fail occurrence register configured to store fail occurrence information for intentionally causing an operation fail to occur; and a control logic configured to store the fail occurrence information in the fail occurrence register based on a fail occurrence command received from the external device, control the peripheral circuit to perform a test operation corresponding to a test operation command received from the external device, for the memory cell array, and control the peripheral circuit to cause an intentional fail to occur in the test operation, based on the fail occurrence information.

Abstract: A data storage device includes a nonvolatile memory device including an address map table in which a plurality of map segments including a plurality of logical-to-physical (P2L) entries are stored and a controller controlling the nonvolatile memory device. The controller includes a processor and a memory storing a map update module configured to be driven through the processor and perform map updating on the plurality of map segments. The map update module divides each of the map segments into a plurality of sub segments, updates a first sub segment as an updating target among the plurality of sub segments by loading the first sub segment into a map update buffer of the memory, and encodes second sub segments as a non-updating target among the plurality of sub segments and stores the encoded second sub segments in a page buffer of the nonvolatile memory device.

Abstract: A memory system comprises a memory device including a plurality of memory blocks, the memory device being configured to perform a program operation and a program verify operation to program data to the memory blocks, and a controller configured to detect program error bit information as a result of the program verify operation, select a victim memory block among the memory blocks based on the detected program error bit information, and copy programmed data of the victim memory block.

Abstract: A nonvolatile memory device includes a memory cell array; a peripheral circuit configured to perform an operation corresponding to a command provided from an external device, for the memory cell array; a fail occurrence register configured to store fail occurrence information for intentionally causing an operation fail to occur; and a control logic configured to store the fail occurrence information in the fail occurrence register based on a fail occurrence command received from the external device, control the peripheral circuit to perform a test operation corresponding to a test operation command received from the external device, for the memory cell array, and control the peripheral circuit to cause an intentional fail to occur in the test operation, based on the fail occurrence information.

Abstract: A nonvolatile memory device may include: a memory cell array operated by a first voltage, and including a plurality of memory cells; a peripheral circuit operated by the first voltage, and configured to store data in the memory cell array or read data from the memory cell array; an operation recorder operated by a second voltage, and configured to record information on an operation being performed in the nonvolatile memory device; and a control logic operated by the first voltage, and configured to control the peripheral circuit such that the nonvolatile memory device performs an operation corresponding to a command received from an external device, and control the operation recorder to store the information on the operation being performed in the nonvolatile memory device.

Abstract: A memory system may include: a memory device storing data and including a memory interface in communication with a memory controller; and the memory controller controlling the memory device and including a controller interface in communication with the memory device, and, wherein, when the memory device is inaccessible, the memory controller requests a current state information including current operation mode of the memory interface from the memory device, and changes an operation mode of the controller interface to match the current operation mode of the memory interface according to the current state information received from the memory device.

Abstract: A memory system may include: a memory device including a plurality of pages in which data are stored and a plurality of memory blocks which include the pages; and a controller suitable for storing data segments of user data corresponding to a write command received from a host, in the pages included in the memory blocks, generating map segments of map data corresponding to storage of the data segments and lists, and searching and updating the map segments through the lists.

Abstract: A data storage device includes a nonvolatile memory device including an address map table in which a plurality of map segments including a plurality of logical-to-physical (P2L) entries are stored and a controller controlling the nonvolatile memory device. The controller includes a processor and a memory storing a map update module configured to be driven through the processor and perform map updating on the plurality of map segments. The map update module divides each of the map segments into a plurality of sub segments, updates a first sub segment as an updating target among the plurality of sub segments by loading the first sub segment into a map update buffer of the memory, and encodes second sub segments as a non-updating target among the plurality of sub segments and stores the encoded second sub segments in a page buffer of the nonvolatile memory device.

Abstract: A memory system includes a nonvolatile memory device configured to store a plurality of segments each of which is configured by a plurality of map data, a first region configured to cache a target segment including target map data among the plurality of segments, a second region configured to cache a target map data group selected among a plurality of map data groups in the target segment and a controller configured to control data caching of the first region and the second region, wherein each of plurality of map data groups includes a plurality of map data, and the second region caches data of a unit smaller than the first region.

Abstract: A memory system includes a memory device including a plurality of memory blocks each block including a plurality of pages; and a controller including a memory, and suitable for buffering segments of user data and metadata for a command operation into the memory, and storing the buffered segments into a super memory block including two or more of the plurality of memory blocks during the command operation in response to a command, wherein, when the total size of to-be-stored data among the buffered segments of the memory is smaller than an unit size of the one shot program, the controller stores dummy data as well as the to-be-stored data into the super memory block.

Abstract: A memory system includes: a memory device including a plurality of pages which include a plurality of memory cells coupled to a plurality of word lines and in which data are stored, and a plurality of memory blocks in which the pages are included; and a controller including a memory, and suitable for storing data segments of user data corresponding to a write command received from a host, in pages included in a first memory block and a second memory block among the memory blocks and generating map data corresponding to storage of the data segments by sorting map segments of the map data according to logical informations of the data segments.

Abstract: A data storage device includes a first memory device including an operation information region for an original operation information, and suitable for performing a first initialization operation based on the original operation information and a controller suitable for performing a management operation to the original operation information, wherein the original operation information of the operation information region is prohibited from being changed until completion of the management operation.

Abstract: A memory system, a semiconductor memory device and methods of operating the same may perform a read operation on the basis of flag data stored in a flag register, without reading the flag data stored in a memory array, when performing the read operation, so that a time taken for the read operation may be reduced.

Abstract: A memory system may include: a memory device including a plurality of pages in which data are stored and a plurality of memory blocks which include the pages; and a controller suitable for storing data segments of user data corresponding to a write command received from a host, in the pages included in the memory blocks, generating map segments of map data corresponding to storage of the data segments and lists, and searching and updating the map segments through the lists.

Abstract: A memory system comprises a memory device including a normal cell region and a redundancy cell region, and a controller suitable for programming data in duplicate in both the normal and the redundancy cell regions, wherein when detecting an error in the data read from the normal cell region, the controller invalidates the data of the normal cell region and validates the data of the redundancy cell region.

Abstract: A memory system comprises a memory device including a plurality of memory blocks, the memory device being configured to perform a program operation and a program verify operation to program data to the memory blocks, and a controller configured to detect program error bit information as a result of the program verify operation, select a victim memory block among the memory blocks based on the detected program error bit information, and copy programmed data of the victim memory block.

Abstract: A memory system includes: a memory device including a plurality of pages which include a plurality of memory cells coupled to a plurality of word lines and in which data are stored, and a plurality of memory blocks in which the pages are included; and a controller including a memory, and suitable for storing data segments of user data corresponding to a write command received from a host, in pages included in a first memory block and a second memory block among the memory blocks and generating map data corresponding to storage of the data segments by sorting map segments of the map data according to logical informations of the data segments.

Abstract: A data storage device includes a first memory device including an operation information region for an original operation information, and suitable for performing a first initialization operation based on the original operation information and a controller suitable for performing a management operation to the original operation information, wherein the original operation information of the operation information region is prohibited from being changed until completion of the management operation.

Abstract: A memory system includes a memory device including a plurality of memory blocks each block including a plurality of pages; and a controller including a memory, and suitable for buffering segments of user data and metadata for a command operation into the memory, and storing the buffered segments into a super memory block including two or more of the plurality of memory blocks during the command operation in response to a command, wherein, when the total size of to-be-stored data among the buffered segments of the memory is smaller than an unit size of the one shot program, the controller stores dummy data as well as the to-be-stored data into the super memory block.