Abstract: Methods of manufacturing interconnect structures as part of a microelectronic device fabrication process are described. The methods include forming a dielectric layer including at least one feature defining a gap having sidewalls and a bottom on a substrate. The methods further include forming a blocking layer on the bottom by exposing the substrate to a blocking compound; selectively depositing a barrier layer on the sidewalls; selectively depositing a metal liner on the barrier layer on the sidewalls; removing the blocking layer; and performing a gap fill process to fill the gap with a gapfill material.

Abstract: Described herein is a method for selectively cleaning and/or etching a sample. The method includes selectively forming a film in a trench of a substrate such that the trench may be selectively etched. A polymer film is deposited on the bottom surface of the trench without being deposited on the side wall. A second film is selectively formed in the trench without forming the second film on the polymer film. The polymer is then removed from the bottom surface of the trench and then etching is performed on the bottom surface of the trench using an etch chemistry, wherein the second film protects the side wall from being etched.

Abstract: A method includes obtaining a base structure of an electronic device, the base structure including at least one opening, and forming, using a reactive-ion deposition process, a dielectric material within the at least one opening.

Abstract: Embodiments of the disclosure relate to methods of selectively depositing polysilicon after forming a flowable polymer film to protect a substrate surface within a feature. A first silicon (Si) layer is deposited by physical vapor deposition (PVD). The flowable polymer film is formed on the first silicon (Si) layer on the bottom. A portion of the first silicon (Si) layer is selectively removed from the top surface and the at least one sidewall. The flowable polymer film is removed. In some embodiments, a second silicon (Si) layer is selectively deposited on the first silicon (Si) layer to fill the feature. In some embodiments, the remaining portion of the first silicon (Si) layer on the bottom is oxidized to form a first silicon oxide (SiOx) layer on the bottom, and a silicon (Si) layer or a second silicon oxide (SiOx) layer is deposited on the first silicon oxide (SiOx) layer.

Abstract: Embodiments of the disclosure relate to methods of etching a copper material. In some embodiments, the copper material is exposed to a halide reactant to form a copper halide species. The substrate is then heated to remove the copper halide species. In some embodiments, the etching methods are performed at relatively low temperatures. Additional embodiments of the disclosure relate to methods of copper gapfill. In some embodiments, a copper material within a substrate feature is exposed to a halide reactant to form a copper halide species. The copper halide species is then heated and flowed to fill at least a portion of the substrate feature. The reflow methods are performed at lower temperatures than similar reflow methods without formation of the copper halide species.

Abstract: Exemplary methods of semiconductor processing may include providing a first precursor to a semiconductor processing chamber. A substrate may be disposed within a processing region of the semiconductor processing chamber. The substrate may define a feature. The methods may include contacting the substrate with the first precursor. The contacting may form a first portion of a silicon-carbon-and-nitrogen-containing material on the substrate. The methods may include providing a second precursor to the semiconductor processing chamber. The methods may include contacting the substrate with the second precursor. The contacting may form the silicon-carbon-and-nitrogen-containing material on the substrate. The silicon-carbon-and-nitrogen-containing material may be void free.

Abstract: Methods of manufacturing an extreme ultraviolet (EUV) pellicles are disclosed. The methods comprise forming on a carbon nanotube (CNT) membrane of an EUV pellicle a nucleation layer. A protective material layer is deposited on the nucleation layer, the protective material layer exhibiting greater than 90% transmission of 13.5 nm EUV light. The methods may be performed by atomic layer deposition. The protective material layer may be selected from aluminum (Al), aluminum nitride (AlN), aluminum oxide (Al2O3), boron carbide (B4C), boron nitride (BN), molybdenum (Mo), molybdenum silicide (MoSi2), molybdenum carbide (MoC, Mo2C), ruthenium (Ru), ruthenium niobium alloy (RuNb), ruthenium oxide (RuO, RUO2), tantalum nitride (TaN), tantalum (Ta), yttrium nitride (YN), zirconium boride (ZrB2), zirconium silicide (ZrSi2), and silicon carbide (SiC).

Abstract: A method includes depositing a coating including stoichiometric one-to-one ruthenium oxide (RuO) onto a surface of a substrate. The coating is deposited by performing an atomic layer deposition (ALD) process using at least one precursor.

Abstract: Methods for depositing film comprise depositing an aluminum-containing gap-fill film in a bottom-up manner in a feature of a substrate surface. The substrate can be sequentially exposed to an aluminum-containing precursor, a reactant, a fluorinating agent, and an etchant any number of times to promote bottom-up growth of the film in the feature.

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

Abstract: A method includes providing, within an etch chamber, a base structure including a target layer disposed on a substrate, and an etch mask disposed on the target layer, dry etching, within the etch chamber, the target layer using thionyl chloride to obtain a processed base structure, and after forming the plurality of features. The processed base structure includes a plurality of features and a plurality of openings defined by the etch mask. The method further includes removing the processed base structure from the etch chamber. In some embodiments, the target layer includes carbon. In some embodiments, the dry etching is performed at a sub-zero degree temperature.

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

Abstract: Methods of depositing platinum group metal films of high purity, low resistivity, and good conformality are described. A platinum group metal film is formed in the absence of an oxidant. The platinum group metal film is selectively deposited on a conductive substrate at a temperature less than 200° C. by using an organic platinum group metal precursor.

Abstract: Described herein is a method for selectively cleaning and/or etching a sample. The method includes selectively forming a film in a trench of a substrate such that the trench may be selectively etched. A polymer film is deposited on the bottom surface of the trench without being deposited on the side wall. A second film is selectively formed in the trench without forming the second film on the polymer film. The polymer is then removed from the bottom surface of the trench and then etching is performed on the bottom surface of the trench using an etch chemistry, wherein the second film protects the side wall from being etched.

Abstract: Methods of depositing metal films comprising exposing a substrate surface to a first metal precursor followed by a non-oxygen containing reducing agent comprising a second metal to form a zero-valent first metal film are described. The reducing agent has a metal center that is more electropositive than the metal center of the first metal precursor. In some embodiments, methods of depositing ruthenium films are described in which a substrate surface is exposed to a ruthenium precursor to form a ruthenium containing film on the substrate surface followed by exposure to a non-oxygen containing reducing agent to reduce the ruthenium containing film to a zero-valent ruthenium film and generate an oxidized form of the reducing agent.

Abstract: A mesa etch may form the geometry of microLED structures. However, the mesa etch may induce defects in the microLED structures that decreases the efficiency of the microLEDs. To correct these defects, a dry etch process may be performed that incrementally removes the surface layers of the microLED structures with the defects. The dry etch may be configured to incrementally remove a small outer layer, and thus may preserve the overall shape of the microLED structures while leaving a smooth surface for the application of a dielectric layer. The dry etch process may include two steps that are repeatedly performed. A first gas may react with the surface to form a gallium compound layer, and a second gas may then selectively remove that layer. The dry etch may include plasma-based etches or reactive thermal etches.

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

Abstract: Methods of depositing platinum group metal films of high purity, low resistivity, and good conformality are described. A platinum group metal film is formed in the absence of an oxidant. The platinum group metal film is selectively deposited on a conductive substrate at a temperature less than 200° C. by using an organic platinum group metal precursor.

Abstract: Memory devices and methods of forming memory devices are described. The memory devices comprise two work-function metal layers, where one work-function layer has a lower work-function than the other work-function layer. The low work-function layer may reduce gate-induced drain leakage current losses. Methods of forming memory devices are also described.