Patents by Inventor Jeng-Shyan Lin

Jeng-Shyan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9525003
    Abstract: The present disclosure provides a device having a doped active region disposed in a substrate. The doped active region having an elongate shape and extends in a first direction. The device also includes a plurality of first metal gates disposed over the active region such that the first metal gates each extend in a second direction different from the first direction. The plurality of first metal gates includes an outer-most first metal gate having a greater dimension measured in the second direction than the rest of the first metal gates. The device further includes a plurality of second metal gates disposed over the substrate but not over the doped active region. The second metal gates contain different materials than the first metal gates. The second metal gates each extend in the second direction and form a plurality of respective N/P boundaries with the first metal gates.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: December 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Chun-Chieh Chuang, Feng-Chi Hung, Shuang-Ji Tsai, Jeng-Shyan Lin, Shu-Ting Tsai, Wen-I Hsu
  • Publication number: 20160322407
    Abstract: Embodiments of the present disclosure include an image sensor device and methods of forming the same. An embodiment is an image sensor device including a first plurality of pickup regions in a photosensor array area of a substrate, each of first plurality of pickup regions having a first width and a first length, a second plurality of pickup regions in a periphery area of the substrate, the periphery area along at least one side of the photosensor array area, each of second plurality of pickup regions having a second width and a second length.
    Type: Application
    Filed: July 8, 2016
    Publication date: November 3, 2016
    Inventors: Dun-Nian Yaung, Ching-Chun Wang, Feng-Chi Hung, Jeng-Shyan Lin, Yan-Chih Lu
  • Patent number: 9455158
    Abstract: A stacked semiconductor device and a method of forming the stacked semiconductor device are provided. A plurality of integrated circuits are bonded to one another to form the stacked semiconductor device. After each bonding step to bond an additional integrated circuit to a stacked semiconductor device formed at the previous bonding step, a plurality of conductive plugs are formed to electrically interconnect the additional integrated circuit to the stacked semiconductor device formed at the previous bonding step.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: September 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Ting Tsai, Szu-Ying Chen, Jeng-Shyan Lin, Tzu-Hsuan Hsu, Feng-Chi Hung, Dun-Nian Yaung
  • Patent number: 9455288
    Abstract: A semiconductor device includes a substrate including a pixel region incorporating a photodiode, a grid disposed over the substrate and having walls defining a cavity vertically aligned with the pixel region, and a color filter material disposed in the cavity between the walls of the grid.
    Type: Grant
    Filed: May 21, 2012
    Date of Patent: September 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shuang-Ji Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Jeng-Shyan Lin, Wen-De Wang
  • Patent number: 9449914
    Abstract: An integrated circuit structure includes a first and a second semiconductor chip. The first semiconductor chip includes a first substrate and a first plurality of dielectric layers underlying the first substrate. The second semiconductor chip includes a second substrate and a second plurality of dielectric layers over the second substrate, wherein the first and the second plurality of dielectric layers are bonded to each other. A metal pad is in the second plurality of dielectric layers. A redistribution line is over the first substrate. A conductive plug is electrically coupled to the redistribution line. The conductive plug includes a first portion extending from a top surface of the first substrate to a bottom surface of the first substrate, and a second portion extending from the bottom surface of the first substrate to the metal pad. A bottom surface of the second portion contacts a top surface of the metal pad.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: September 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ying Ho, Jeng-Shyan Lin, Wen-I Hsu, Feng-Chi Hung, Dun-Nian Yaung, Ying-Ling Tsai
  • Publication number: 20160260764
    Abstract: An integrated circuit structure includes a semiconductor substrate, and a dielectric pad extending from a bottom surface of the semiconductor substrate up into the semiconductor substrate. A low-k dielectric layer is disposed underlying the semiconductor substrate. A first non-low-k dielectric layer is underlying the low-k dielectric layer. A metal pad is underlying the first non-low-k dielectric layer. A second non-low-k dielectric layer is underlying the metal pad. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate, the dielectric pad, and the low-k dielectric layer, wherein the opening lands on a top surface of the metal pad. A passivation layer includes a portion on a sidewall of the opening, wherein a portion of the passivation layer at a bottom of the opening is removed.
    Type: Application
    Filed: May 16, 2016
    Publication date: September 8, 2016
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Shuang-Ji Tsai, Yueh-Chiou Lin
  • Patent number: 9437578
    Abstract: A package includes a semiconductor chip. The semiconductor chip includes a substrate, a plurality of dielectric layers underlying the substrate, a dielectric region penetrating through the plurality of dielectric layers, and a metal pad overlapped by the dielectric region. A conductive plug penetrates through the substrate, the dielectric region, and the metal pad.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: September 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-I Hsu, Cheng-Ying Ho, Jeng-Shyan Lin, Feng-Chi Hung, Dun-Nian Yaung
  • Publication number: 20160225802
    Abstract: An image-sensor device is provided. The image-sensor device includes a semiconductor substrate having a front surface and a back surface, and an interconnection structure formed over the front surface. The image-sensor device also includes a radiation-sensing region in the semiconductor substrate. The image-sensor device further includes an isolation structure adjacent to the radiation-sensing region. The isolation structure includes a trench extends from the back surface, and a negatively charged film extends along an interior surface of the trench.
    Type: Application
    Filed: April 7, 2016
    Publication date: August 4, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jeng-Shyan LIN, Dun-Nian YAUNG, Jen-Cheng LIU, Feng-Chi HUNG
  • Patent number: 9391101
    Abstract: Embodiments of the present disclosure include an image sensor device and methods of forming the same. An embodiment is an image sensor device including a first plurality of pickup regions in a photosensor array area of a substrate, each of first plurality of pickup regions having a first width and a first length, a second plurality of pickup regions in a periphery area of the substrate, the periphery area along at least one side of the photosensor array area, each of second plurality of pickup regions having a second width and a second length.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: July 12, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dun-Nian Yaung, Ching-Chun Wang, Feng-Chi Hung, Jeng-Shyan Lin, Yan-Chih Lu
  • Patent number: 9391114
    Abstract: Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device includes a semiconductor chip comprising an array region, a periphery region, and a through-via disposed therein. A guard structure is disposed in the semiconductor chip between the array region and the through-via or between the through-via and a portion of the periphery region. A portion of the guard structure is disposed within a substrate of the semiconductor chip.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: July 12, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Feng-Chi Hung, Min-Feng Kao, Jeng-Shyan Lin, Chun-Ming Su, Ching-Chun Wang
  • Patent number: 9362329
    Abstract: An integrated circuit structure includes a semiconductor substrate, and a dielectric pad extending from a bottom surface of the semiconductor substrate up into the semiconductor substrate. A low-k dielectric layer is disposed underlying the semiconductor substrate. A first non-low-k dielectric layer is underlying the low-k dielectric layer. A metal pad is underlying the first non-low-k dielectric layer. A second non-low-k dielectric layer is underlying the metal pad. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate, the dielectric pad, and the low-k dielectric layer, wherein the opening lands on a top surface of the metal pad. A passivation layer includes a portion on a sidewall of the opening, wherein a portion of the passivation layer at a bottom of the opening is removed.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: June 7, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Shuang-Ji Tsai, Yueh-Chiou Lin
  • Publication number: 20160141325
    Abstract: A method and apparatus for a low resistance image sensor contact, the apparatus comprising a photosensor disposed in a substrate, a first ground well disposed in a first region of the substrate, the first ground well having a resistance lower than the substrate, and a ground line disposed in a region adjacent to the first ground well. The first ground well is configured to provide a low resistance path to the ground line from the substrate for excess free carriers in the first region of the substrate. The apparatus may optionally comprise a second ground well having a lower resistance than the first ground well and disposed between the first ground well and the ground line, and may further optionally comprise a third ground well having a lower resistance than the second ground well and disposed between the second ground well and the ground line.
    Type: Application
    Filed: January 25, 2016
    Publication date: May 19, 2016
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chun-Chieh Chuang, Shuang-Ji Tsai, Jeng-Shyan Lin
  • Publication number: 20160111464
    Abstract: A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment a first color filter is formed over a first photosensitive diode and a second color filter is formed over a second photosensitive diode, and a gap is formed between the first color filter and the second color filter. The gap will serve to reflect light that otherwise would have crossed from the first color filter to the second color filter, thereby reducing cross-talk between the first photosensitive diode and the second photosensitive diode. A reflective grid may also be formed between the first photosensitive diode and the second photosensitive diode in order to assist in the reflection and further reduce the amount of cross-talk.
    Type: Application
    Filed: December 28, 2015
    Publication date: April 21, 2016
    Inventors: Dun-Nian Yaung, Feng-Chi Hung, Jen-Cheng Liu, Jeng-Shyan Lin, Shuang-Ji Tsai
  • Patent number: 9318526
    Abstract: A method for fabricating an image-sensor device is provided. The method includes forming a radiation-sensing region and a doped isolation region in a semiconductor substrate. The doped isolation region is adjacent to the radiation-sensing region. The method also includes thinning the semiconductor substrate such that the radiation-sensing region and the doped isolation region are exposed. The method further includes partially removing the doped isolation region to form a recess. In addition, the method includes forming a negatively charged film over an interior surface of the recess and a surface of the radiation-sensing exposed after the thinning of the semiconductor substrate.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: April 19, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung
  • Patent number: 9287312
    Abstract: The present disclosure provides an embodiment of a method for fabricating a three dimensional (3D) image sensor structure. The method includes providing to an image sensor substrate having image sensors formed therein and a first interconnect structure formed thereon, and a logic substrate having a logic circuit formed therein and a second interconnect structure formed thereon; bonding the logic substrate to the image sensor substrate in a configuration that the first interconnect structure and second interconnect structure are sandwiched between the logic substrate and the image sensor substrate; and forming a conductive feature extending from the logic substrate to the first interconnect structure, thereby electrically coupling the logic circuit to the image sensors.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: March 15, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Chun-Chieh Chuang, Feng-Chi Hung, Shu-Ting Tsai, Jeng-Shyan Lin, Shuang-Ji Tsai, Wen-I Hsu
  • Publication number: 20160043121
    Abstract: An image sensor includes a substrate having a pixel region and a periphery region. The image sensor further includes a first isolation structure formed in the pixel region; the first isolation structure including a first trench having a first depth. The image sensor further includes a second isolation structure formed in the periphery region; the second isolation structure including a second trench having a second depth. The second depth is greater than the first depth.
    Type: Application
    Filed: October 19, 2015
    Publication date: February 11, 2016
    Inventors: Jeng-Shyan LIN, Dun-Nian YAUNG, Jen-Cheng LIU, Chun-Chieh CHUANG, Volume CHIEN
  • Patent number: 9245912
    Abstract: A method and apparatus for a low resistance image sensor contact, the apparatus comprising a photosensor disposed in a substrate, a first ground well disposed in a first region of the substrate, the first ground well having a resistance lower than the substrate, and a ground line disposed in a region adjacent to the first ground well. The first ground well is configured to provide a low resistance path to the ground line from the substrate for excess free carriers in the first region of the substrate. The apparatus may optionally comprise a second ground well having a lower resistance than the first ground well and disposed between the first ground well and the ground line, and may further optionally comprise a third ground well having a lower resistance than the second ground well and disposed between the second ground well and the ground line.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: January 26, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chun-Chieh Chuang, Shuang-Ji Tsai, Jeng-Shyan Lin
  • Publication number: 20160020170
    Abstract: An integrated circuit structure includes a first and a second semiconductor chip. The first semiconductor chip includes a first substrate and a first plurality of dielectric layers underlying the first substrate. The second semiconductor chip includes a second substrate and a second plurality of dielectric layers over the second substrate, wherein the first and the second plurality of dielectric layers are bonded to each other. A metal pad is in the second plurality of dielectric layers. A redistribution line is over the first substrate. A conductive plug is electrically coupled to the redistribution line. The conductive plug includes a first portion extending from a top surface of the first substrate to a bottom surface of the first substrate, and a second portion extending from the bottom surface of the first substrate to the metal pad. A bottom surface of the second portion contacts a top surface of the metal pad.
    Type: Application
    Filed: July 17, 2014
    Publication date: January 21, 2016
    Inventors: Cheng-Ying Ho, Jeng-Shyan Lin, Wen-I Hsu, Feng-Chi Hung, Dun-Nian Yaung, Ying-Ling Tsai
  • Publication number: 20160005780
    Abstract: An image sensor device includes a first substrate, an interconnect structure, a conductive layer, a conductive via and a second substrate. The first substrate includes a first region including a pixel array and a second region including a circuit. The interconnect structure is over the pixel array or the circuit. The interconnect structure electrically connecting the circuit to the pixel array. The conductive layer is on the interconnect structure. The conductive via passes through the second substrate and at least partially embedded in the conductive layer. The second substrate is over the conductive layer.
    Type: Application
    Filed: September 17, 2015
    Publication date: January 7, 2016
    Inventors: Wen-De WANG, Dun-Nian YAUNG, Jen-Cheng LIU, Chun-Chieh CHUANG, Jeng-Shyan LIN
  • Publication number: 20150380385
    Abstract: A package includes a semiconductor chip. The semiconductor chip includes a substrate, a plurality of dielectric layers underlying the substrate, a dielectric region penetrating through the plurality of dielectric layers, and a metal pad overlapped by the dielectric region. A conductive plug penetrates through the substrate, the dielectric region, and the metal pad.
    Type: Application
    Filed: June 26, 2014
    Publication date: December 31, 2015
    Inventors: Wen-I Hsu, Cheng-Ying Ho, Jeng-Shyan Lin, Feng-Chi Hung, Dun-Nian Yaung