Patents by Inventor Jeng-Shyan Lin

Jeng-Shyan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150123233
    Abstract: Embodiments of the present disclosure include an image sensor device and methods of forming the same. An embodiment is an image sensor device including a first plurality of pickup regions in a photosensor array area of a substrate, each of first plurality of pickup regions having a first width and a first length, a second plurality of pickup regions in a periphery area of the substrate, the periphery area along at least one side of the photosensor array area, each of second plurality of pickup regions having a second width and a second length.
    Type: Application
    Filed: January 16, 2014
    Publication date: May 7, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dun-Nian Yaung, Ching-Chun Wang, Feng-Chi Hung, Jeng-Shyan Lin, Yan-Chih Lu
  • Publication number: 20150115389
    Abstract: Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device includes a semiconductor chip comprising an array region, a periphery region, and a through-via disposed therein. A guard structure is disposed in the semiconductor chip between the array region and the through-via or between the through-via and a portion of the periphery region. A portion of the guard structure is disposed within a substrate of the semiconductor chip.
    Type: Application
    Filed: July 8, 2014
    Publication date: April 30, 2015
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Feng-Chi Hung, Min-Feng Kao, Jeng-Shyan Lin, Chun-Ming Su, Ching-Chun Wang
  • Patent number: 9013022
    Abstract: An integrated circuit structure includes a semiconductor substrate, and a dielectric pad extending from a bottom surface of the semiconductor substrate up into the semiconductor substrate. A low-k dielectric layer is disposed underlying the semiconductor substrate. A first non-low-k dielectric layer is underlying the low-k dielectric layer. A metal pad is underlying the first non-low-k dielectric layer. A second non-low-k dielectric layer is underlying the metal pad. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate, the dielectric pad, and the low-k dielectric layer, wherein the opening lands on a top surface of the metal pad. A passivation layer includes a portion on a sidewall of the opening, wherein a portion of the passivation layer at a bottom of the opening is removed.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: April 21, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Shuang-Ji Tsai, Yueh-Chiou Lin
  • Patent number: 8987855
    Abstract: An image sensor device includes a semiconductor substrate having a front side and a backside. A first dielectric layer is on the front side of the semiconductor substrate. A metal pad is in the first dielectric layer. A second dielectric layer is over the first dielectric layer and on the front side of the semiconductor substrate. An opening penetrates through the semiconductor substrate from the backside of the semiconductor substrate, wherein the opening includes a first portion extending to expose a portion of the metal pad and a second portion extending to expose a portion of the second dielectric layer. A metal layer is formed in the first portion and the second portion of the opening.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: March 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Shuang-Ji Tsai, Yueh-Chiou Lin
  • Publication number: 20150061062
    Abstract: Embodiments of mechanisms of for forming an image-sensor device are provided. The image-sensor device includes a substrate having a front surface and a back surface. The image-sensor device also includes a radiation-sensing region operable to detect incident radiation that enters the substrate through the back surface. The image-sensor device further includes a doped isolation region formed in the substrate and adjacent to the radiation-sensing region. In addition, the image-sensor device includes a deep-trench isolation structure formed in the doped isolation region. The deep-trench isolation structure includes a trench extending from the back surface and a negatively charged film covering the trench.
    Type: Application
    Filed: September 3, 2013
    Publication date: March 5, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Jeng-Shyan LIN, Dun-Nian YAUNG, Jen-Cheng LIU, Feng-Chi HUNG
  • Patent number: 8952497
    Abstract: A wafer includes a plurality of chips arranged as rows and columns. A first plurality of scribe lines is between the rows of the plurality of chips. Each of the first plurality of scribe lines includes a metal-feature containing scribe line comprising metal features therein, and a metal-feature free scribe line parallel to, and adjoining, the metal-feature containing scribe line. A second plurality of scribe lines is between the columns of the plurality of chips.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: February 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: U-Ting Chen, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Jeng-Shyan Lin, Shuang-Ji Tsai
  • Patent number: 8946849
    Abstract: A device includes a semiconductor substrate having a front side and a backside. A plurality of image sensors is disposed at the front side of the semiconductor substrate. A plurality of clear color-filters is disposed on the backside of the semiconductor substrate. A plurality of metal rings encircles the plurality of clear color-filters.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: February 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shuang-Ji Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Feng-Chi Hung
  • Patent number: 8941204
    Abstract: A method for reducing cross talk in image sensors comprises providing a backside illuminated image sensor wafer, forming an isolation region in the backside illuminated image sensor wafer, wherein the isolation region encloses a photo active region, forming an opening in the isolation region from a backside of the backside illuminated image sensor wafer and covering an upper terminal of the opening with a dielectric material to form an air gap embedded in the isolation region of the backside illuminated image sensor wafer.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: January 27, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Tzu-Hsuan Hsu, Shuang-Ji Tsai, Min-Feng Kao
  • Patent number: 8895349
    Abstract: An approach is provided for forming a backside illuminated image sensor that includes a semiconductor substrate having a front side and backside, a sensor element formed overlying the frontside of the semiconductor substrate, and a capacitor formed overlying the sensor element.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: November 25, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Wen-De Wang
  • Publication number: 20140308772
    Abstract: A method includes bonding a Backside Illumination (BSI) image sensor chip to a device chip, forming a first via in the BSI image sensor chip to connect to a first integrated circuit device in the BSI image sensor chip, forming a second via penetrating through the BSI image sensor chip to connect to a second integrated circuit device in the device chip, and forming a metal pad to connect the first via to the second via.
    Type: Application
    Filed: May 19, 2014
    Publication date: October 16, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Feng-Chi Hung, Dun-Nian Yaung, Jen-Cheng Liu, Szu-Ying Chen, Wen-De Wang, Tzu-Hsuan Hsu
  • Publication number: 20140264929
    Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.
    Type: Application
    Filed: July 8, 2013
    Publication date: September 18, 2014
    Inventors: Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chih-Hui Huang, Sheng-Chau Chen, Shih-Pei Chou, Chia-Chieh Lin
  • Publication number: 20140264683
    Abstract: The present disclosure provides an embodiment of a method for fabricating a three dimensional (3D) image sensor structure. The method includes providing to an image sensor substrate having image sensors formed therein and a first interconnect structure formed thereon, and a logic substrate having a logic circuit formed therein and a first interconnect structure formed thereon; bonding the logic substrate to the image sensor substrate in a configuration that the first and second interconnect structures are sandwiched between the logic substrate and the image sensor substrate; and forming a conductive feature extending from the logic substrate to the first interconnect structure, thereby electrically coupling the logic circuit to the image sensors.
    Type: Application
    Filed: December 30, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Chun-Chieh Chuang, Feng-Chi Hung, Shu-Ting Tsai, Jeng-Shyan Lin, Shuang-Ji Tsai, Wen-I Hsu
  • Publication number: 20140264508
    Abstract: The present disclosure provides an embodiment of an image sensor structure that includes a first semiconductor substrate having a plurality of imaging sensors; a first interconnect structure formed on the first semiconductor substrate; a second semiconductor substrate having a logic circuit; a second interconnect structure formed on the second semiconductor substrate, wherein the first and the second semiconductor substrates are bonded together in a configuration that the first and second interconnect structures are sandwiched between the first and second semiconductor substrates; and a backside deep contact (BDCT) feature extended from the first interconnect structure to the second interconnect structure, thereby electrically coupling the logic circuit to the image sensors.
    Type: Application
    Filed: December 30, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Chun-Chieh Chuang, Feng-Chi Hung, Shuang-Ji Tsai, Jeng-Shyan Lin, Shu-Ting Tsai, Wen-I Hsu
  • Publication number: 20140264883
    Abstract: A semiconductor device comprises a first chip bonded on a second chip. The first chip comprises a first substrate and first interconnection components formed in first IMD layers. The second chip comprises a second substrate and second interconnection components formed in second IMD layers. The device further comprises a first conductive plug formed within the first substrate and the first IMD layers, wherein the first conductive plug is coupled to a first interconnection component and a second conductive plug formed through the first substrate and the first IMD layers and formed partially through the second IMD layers, wherein the second conductive plug is coupled to a second interconnection component.
    Type: Application
    Filed: April 19, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Ting Tsai, Jeng-Shyan Lin, Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung
  • Publication number: 20140264504
    Abstract: A method and apparatus for a low resistance image sensor contact, the apparatus comprising a photosensor disposed in a substrate, a first ground well disposed in a first region of the substrate, the first ground well having a resistance lower than the substrate, and a ground line disposed in a region adjacent to the first ground well. The first ground well is configured to provide a low resistance path to the ground line from the substrate for excess free carriers in the first region of the substrate. The apparatus may optionally comprise a second ground well having a lower resistance than the first ground well and disposed between the first ground well and the ground line, and may further optionally comprise a third ground well having a lower resistance than the second ground well and disposed between the second ground well and the ground line.
    Type: Application
    Filed: May 9, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chun-Chieh Chuang, Shuang-Ji Tsai, Jeng-Shyan Lin
  • Publication number: 20140264947
    Abstract: A method comprises bonding a first chip on a second chip, depositing a first hard mask layer over a non-bonding side of the first chip, depositing a second hard mask layer over the first hard mask layer, etching a first substrate of the first semiconductor chip using the second hard mask layer as a first etching mask and etching the IMD layers of the first chip and the second chip using the first hard mask layer as a second etching mask.
    Type: Application
    Filed: May 9, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Shu-Ting Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Shih Pei Chou, Min-Feng Kao, Szu-Ying Chen
  • Publication number: 20140252521
    Abstract: Provided is a semiconductor image sensor device. The image sensor device includes a semiconductor substrate having a first side and a second side opposite the first side. The semiconductor substrate contains a radiation-sensing region configured to sense radiation projected toward the substrate from the second side. A first layer is disposed over the second side of the semiconductor substrate. The first layer has a first energy band gap. A second layer is disposed over the first layer. The second layer has a second energy band gap. A third layer is disposed over the second layer. The third layer has a third energy band gap. The second energy band gap is smaller than the first energy band gap and the third energy band gap.
    Type: Application
    Filed: September 18, 2013
    Publication date: September 11, 2014
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Shuang-Ji Tsai, Jeng-Shyan Lin, Chun-Chieh Chuang
  • Patent number: 8810700
    Abstract: A method of forming a backside illuminated image sensor includes forming a guard ring structure of a predetermined depth in a front-side surface of a semiconductor substrate, the guard ring structure outlining a two-dimensional array of pixels, each pixel of the array of pixels separated from an adjacent pixel by the guard ring structure. The method further includes forming at least one image sensing element on the front-side surface of the semiconductor substrate, the at least one image sensing element being formed in a pixel of the array of pixels and surrounded by the guard ring structure. The method further includes reducing a thickness of the semiconductor substrate until the guard ring structure is co-planar with a back-side surface of the semiconductor substrate.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: August 19, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-De Wang, Dun-Nian Yaung, Jen-Cheng Liu, Chun-Chieh Chuang, Jeng-Shyan Lin
  • Publication number: 20140199804
    Abstract: A method of fabricating a semiconductor device includes providing a device substrate having a front side and a back side corresponding to a front side and a back side of the semiconductor device, forming, on the front side of the device substrate, a metal feature, forming, on the back side of the device substrate, an insulating layer, forming, on the back side of the semiconductor device, a trench exposing the metal feature, forming a bonding pad in the trench in electrical communication with the metal feature, and forming, on the insulating layer, a metal shield, in which the metal shield and the bonding pad have different thicknesses relative to each other.
    Type: Application
    Filed: March 17, 2014
    Publication date: July 17, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shuang-Ji Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Jeng-Shyan Lin, Cheng-Ying Ho
  • Patent number: 8766387
    Abstract: A device includes a Backside Illumination (BSI) image sensor chip, which includes an image sensor disposed on a front side of a first semiconductor substrate, and a first interconnect structure including a plurality of metal layers on the front side of the first semiconductor substrate. A device chip is bonded to the image sensor chip. The device chip includes an active device on a front side of a second semiconductor substrate, and a second interconnect structure including a plurality of metal layers on the front side of the second semiconductor substrate. A first via penetrates through the BSI image sensor chip to connect to a first metal pad in the second interconnect structure. A second via penetrates through a dielectric layer in the first interconnect structure to connect to a second metal pad in the first interconnect structure, wherein the first via and the second via are electrically connected.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: July 1, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Feng-Chi Hung, Dun-Nian Yaung, Jen-Cheng Liu, Szu-Ying Chen, Wen-De Wang, Tzu-Hsuan Hsu