Patents by Inventor Ji-Soon Park

Ji-Soon Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9100677
    Abstract: A method for generating a transport stream of a server is provided. The method for generating a transport stream of a server which sends broadcasting content to a client device comprises: scrambling broadcasting content by using a specific key; adding at least one content-encryption message which includes the specific key and a device key for obtaining the specific key from the at least one content-encryption message to the broadcasting content so as to generate a transport stream; and sending the generated transport stream to the client device.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: August 4, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-jin Kang, Dave Ahn, Ji-soon Park
  • Patent number: 9064941
    Abstract: A semiconductor device includes a substrate including a first surface and a second surface opposite to each other, a through-via electrode extending through the substrate. The through-via electrode has an interconnection metal layer and a barrier metal layer surrounding a side surface of the interconnection metal layer. One end of the through-via electrode protrudes above the second surface. A spacer insulating layer may be provided on an outer sidewall of the through-via electrode. A through-via electrode pad is connected to the through-via electrode and extends on the spacer insulating layer substantially parallel to the second surface. A first silicon oxide layer and a silicon nitride layer are stacked on the second surface. A thickness of the first silicon oxide layer is greater than a thickness of the silicon nitride layer.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: June 23, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Deok-young Jung, Pil-kyu Kang, Byung-lyul Park, Ji-soon Park, Seong-min Son, Jin-ho An, Ji-hwang Kim
  • Publication number: 20150137387
    Abstract: An integrated circuit (IC) device includes a semiconductor substrate having a via hole extending through at least a part thereof, a conductive structure in the via hole, a conductive barrier layer adjacent the conductive structure; and a via insulating layer interposed between the semiconductor substrate and the conductive barrier layer. The conductive barrier layer may include an outer portion oxidized between the conductive barrier layer and the via insulating layer, and the oxidized outer portion of the conductive barrier layer may substantially surrounds the remaining portion of the conductive barrier layer.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 21, 2015
    Inventors: Ju-il CHOI, Kun-sang PARK, Son-kwan HWANG, Ji-soon PARK, Byung-lyul PARK
  • Publication number: 20150137325
    Abstract: Provided is a semiconductor device. The semiconductor device includes a passivation layer defining a metal pattern on a first surface of a substrate, an inter-layer insulating layer disposed on a second surface of the substrate, and a piezoelectric pattern formed between the metal pattern and the passivation layer on the first surface of the substrate. A through-silicon-via and/or a pad can be directly bonded to another through-silicon-via and/or another pad by applying pressure only, and without performing a heat process.
    Type: Application
    Filed: July 11, 2014
    Publication date: May 21, 2015
    Inventors: Yi-Koan HONG, Byung-Lyul PARK, Ji-Soon PARK, Si-Young CHOI
  • Publication number: 20150132950
    Abstract: A semiconductor device includes a substrate including a first surface and a second surface opposite to each other, a through-via electrode extending through the substrate. The through-via electrode has an interconnection metal layer and a barrier metal layer surrounding a side surface of the interconnection metal layer. One end of the through-via electrode protrudes above the second surface. A spacer insulating layer may be provided on an outer sidewall of the through-via electrode. A through-via electrode pad is connected to the through-via electrode and extends on the spacer insulating layer substantially parallel to the second surface. A first silicon oxide layer and a silicon nitride layer are stacked on the second surface. A thickness of the first silicon oxide layer is greater than a thickness of the silicon nitride layer.
    Type: Application
    Filed: January 20, 2015
    Publication date: May 14, 2015
    Inventors: Deok-young JUNG, Pil-kyu KANG, Byung-lyul PARK, Ji-soon PARK, Seong-min SON, Jin-ho AN, Ji-hwang KIM
  • Patent number: 9027145
    Abstract: A method and apparatus for detecting a leak of an information resource of a device. Source code is obtained from an application and is analyzed to determine whether at least one information resource from among information resources of a device is transmittable to outside the device by tracking a task performed on the at least one information resource, thereby detecting whether the application is externally leaking an information resource from the device.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: May 5, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-soon Park, Jin-yung Kim, Yong-ho Yoon, Jun-bum Shin, Kwang-keun Yi
  • Publication number: 20150121348
    Abstract: A method and device for analyzing an application are provided. The method includes obtaining the application, obtaining at least one of environment information, which is information about an environment where the application is executed, and execution information, which is information about operations of components of the application, obtaining code data to analyze from the application, based on at least one of the environment information and the execution information, obtaining function information, and analyzing the code data, based on the obtained function information.
    Type: Application
    Filed: October 27, 2014
    Publication date: April 30, 2015
    Applicants: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-soon PARK, Jin-yung KIM, Yong-ho YOON, Jun-bum SHIN, Kwang-keun YI
  • Patent number: 8963336
    Abstract: A semiconductor device includes a substrate including a first surface and a second surface opposite to each other, a through-via electrode extending through the substrate. The through-via electrode has an interconnection metal layer and a barrier metal layer surrounding a side surface of the interconnection metal layer. One end of the through-via electrode protrudes above the second surface. A spacer insulating layer may be provided on an outer sidewall of the through-via electrode. A through-via electrode pad is connected to the through-via electrode and extends on the spacer insulating layer substantially parallel to the second surface. A first silicon oxide layer and a silicon nitride layer are stacked on the second surface. A thickness of the first silicon oxide layer is greater than a thickness of the silicon nitride layer.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: February 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Deok-young Jung, Pil-kyu Kang, Byung-lyul Park, Ji-soon Park, Seong-min Son, Jin-ho An, Ji-hwang Kim
  • Patent number: 8932964
    Abstract: A method of forming a dielectric layer, the method including sequentially forming a first oxide layer, a nitride layer, and a second oxide layer on a substrate by performing a plasma-enhanced atomic layer deposition process, wherein a first nitrogen plasma treatment is performed after forming the first oxide layer.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: January 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Jin Lee, Ji-Soon Park, Jong-Myeong Lee, Hyun-Bae Lee
  • Publication number: 20140327150
    Abstract: A semiconductor device includes a substrate including a first surface and a second surface opposite to each other, a through-via electrode extending through the substrate. The through-via electrode has an interconnection metal layer and a barrier metal layer surrounding a side surface of the interconnection metal layer. One end of the through-via electrode protrudes above the second surface. A spacer insulating layer may be provided on an outer sidewall of the through-via electrode. A through-via electrode pad is connected to the through-via electrode and extends on the spacer insulating layer substantially parallel to the second surface. A first silicon oxide layer and a silicon nitride layer are stacked on the second surface. A thickness of the first silicon oxide layer is greater than a thickness of the silicon nitride layer.
    Type: Application
    Filed: July 16, 2014
    Publication date: November 6, 2014
    Inventors: Deok-young JUNG, Pil-kyu KANG, Byung-lyul PARK, Ji-soon PARK, Seong-min SON, Jin-ho AN, Ji-hwang KIM
  • Patent number: 8806212
    Abstract: Provided are methods of generating and verifying an electronic signature of software data, wherein software data is split into a plurality of blocks, electronic signatures corresponding to each of the blocks are generated, and some of the electronic signatures are randomly selected for verification. Accordingly, a time required for verifying an electronic signature can be reduced while maintaining the advantages of an electronic signature system.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: August 12, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Bum Shin, Choong-hoon Lee, Su-hyun Nam, Yang-lim Choi, Ji-soon Park
  • Publication number: 20140210055
    Abstract: According to example embodiments, a method of forming micropatterns includes forming dummy patterns having first widths on a dummy region of a substrate, and forming cell patterns having second widths on an active line region of the substrate. The active line region may be adjacent to the dummy region and the second widths may be less than the first widths. The method may further include forming damascene metallization by forming a seed layer on the active line region and the dummy region, forming a conductive material layer on a whole surface of the substrate, and planarizing the conductive material layer to form metal lines.
    Type: Application
    Filed: March 28, 2014
    Publication date: July 31, 2014
    Inventors: In-sun PARK, Gil-heyun CHOI, Ji-soon PARK, Jong-myeong LEE, Jong-won HONG, Hei-seung KIM
  • Publication number: 20140145327
    Abstract: Semiconductor devices and methods for fabricating the same are provided. For example, the semiconductor device includes a substrate, a first contact pad formed on the substrate, an insulation layer formed on the substrate and including a first opening which exposes the first contact pad, a first bump formed on the first contact pad and electrically connected to the first contact pad, and a reinforcement member formed on the insulation layer and adjacent to a side surface of the first lower bump. The first bump includes a first lower bump and a first upper bump, which are sequentially stacked on the first contact pad.
    Type: Application
    Filed: October 23, 2013
    Publication date: May 29, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung-Jun JEON, Jae-Hyun PHEE, Byung-Lyul PARK, Ji-Soon PARK, Jeong-Gi JIN
  • Patent number: 8709937
    Abstract: According to example embodiments, a method of forming micropatterns includes forming dummy patterns having first widths on a dummy region of a substrate, and forming cell patterns having second widths on an active line region of the substrate. The active line region may be adjacent to the dummy region and the second widths may be less than the first widths. The method may further include forming damascene metallization by forming a seed layer on the active line region and the dummy region, forming a conductive material layer on a whole surface of the substrate, and planarizing the conductive material layer to form metal lines.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: April 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-sun Park, Gil-heyun Choi, Ji-soon Park, Jong-myeong Lee, Jong-won Hong, Hei-seung Kim
  • Patent number: 8592979
    Abstract: A conductive pattern structure includes a first insulating interlayer on a substrate, metal wiring on the first insulating interlayer, a second insulating interlayer on the metal wiring, and first and second metal contacts extending through the second insulating interlayer. The first metal contacts contact the metal wiring in a cell region and the second metal contact contacts the metal wiring in a peripheral region. A third insulating interlayer is disposed on the second insulating interlayer. Conductive segments extend through the third insulating interlayer in the cell region and contact the first metal contacts. Another conductive segment extends through the third insulating interlayer in the peripheral region and contacts the second metal contact. The structure facilitates the forming of uniformly thick wiring in the cell region using an electroplating process.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: November 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hei-Seung Kim, Gil-Heyun Choi, Ji-Soon Park, Jong-Myeong Lee
  • Patent number: 8547747
    Abstract: A non-volatile memory device is provided, including a substrate formed of a single crystalline semiconductor, pillar-shaped semiconductor patterns extending perpendicular to the substrate, a plurality of gate electrodes and a plurality of interlayer dielectric layers alternately stacked perpendicular to the substrate, and a charge spread blocking layer formed between the plurality of gate electrodes and the plurality of interlayer dielectric layers.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: October 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-Kyoung Kim, Gil-Heyun Choi, Jong-Myeong Lee, In-Sun Park, Ji-Soon Park
  • Publication number: 20130239223
    Abstract: A method and apparatus for detecting a leak of an information resource of a device. Source code is obtained from an application and is analyzed to determine whether at least one information resource from among information resources of a device is transmittable to outside the device by tracking a task performed on the at least one information resource, thereby detecting whether the application is externally leaking an information resource from the device.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 12, 2013
    Applicants: Seoul National University R&DB Foundation, Samsung Electronics Co., Ltd.
    Inventors: Ji-soon PARK, Jin-yung Kim, Yong-ho Yoon, Jun-bum Shin, Kwang-keun Yi
  • Patent number: 8476763
    Abstract: Methods of forming conductive pattern structures form an insulating interlayer on a substrate that is partially etched to form a first trench extending to both end portions of a cell block. The insulating interlayer is also partially etched to form a second trench adjacent to the first trench, and a third trench extending to the both end portions of the cell block. The second trench has a disconnected shape at a middle portion of the cell block. A seed copper layer is formed on the insulating interlayer. Inner portions of the first, second and third trenches are electroplated with a copper layer. The copper layer is polished to expose the insulating interlayer to form first and second conductive patterns in the first and second trenches, respectively, and a first dummy conductive pattern in the third trench. Related conductive pattern structures are also described.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: July 2, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hei-Seung Kim, In-Sun Park, Gil-Heyun Choi, Ji-Soon Park, Jong-Myeong Lee, Jong-Won Hong
  • Publication number: 20130070923
    Abstract: A method for generating a transport stream of a server is provided. The method for generating a transport stream of a server which sends broadcasting content to a client device comprises: scrambling broadcasting content by using a specific key; adding at least one content-encryption message which includes the specific key and a device key for obtaining the specific key from the at least one content-encryption message to the broadcasting content so as to generate a transport stream; and sending the generated transport stream to the client device.
    Type: Application
    Filed: September 10, 2012
    Publication date: March 21, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-jin KANG, Dave AHN, Ji-soon PARK
  • Publication number: 20130012023
    Abstract: According to example embodiments, a method of forming micropatterns includes forming dummy patterns having first widths on a dummy region of a substrate, and forming cell patterns having second widths on an active line region of the substrate. The active line region may be adjacent to the dummy region and the second widths may be less than the first widths. The method may further include forming damascene metallization by forming a seed layer on the active line region and the dummy region, forming a conductive material layer on a whole surface of the substrate, and planarizing the conductive material layer to form metal lines.
    Type: Application
    Filed: June 26, 2012
    Publication date: January 10, 2013
    Inventors: In-sun Park, Gil-heyun Choi, Ji-soon Park, Jong-myeong Lee, Jong-won Hong, Hei-seung Kim