Abstract: A method for obtaining an emission probability includes obtaining a plurality of measurement reports (MRs) of a terminal in a target region and an engineering parameter of at least one base station in the target region, obtaining, based on parameter information in each of the plurality of MRs and the engineering parameter of the at least one base station, a feature vector corresponding to each of the plurality of MRs, processing, using a regression model, location information in each of the plurality of MRs and the feature vector corresponding to each of the plurality of MRs, to obtain a single-point positioning model, calculating, based on the single-point positioning model, the location information in each of the plurality of MRs, and the feature vector corresponding to each of the plurality of MRs, an emission probability of the feature vector corresponding to each of the plurality of MRs.

Abstract: The present disclosure relates to task solving methods. One example method includes obtaining importance of each first scheduling constraint in a plurality of first scheduling constraints in a first linear-programming task, where the importance indicates a degree of contribution of the first scheduling constraint to reducing a time for solving the first linear-programming task. The plurality of first scheduling constraints are sampled based on the importance to obtain a subset of the obtained plurality of first scheduling constraints, where the importance is used to determine sampling probability of the first scheduling constraints. A second linear-programming task is constructed based on the subset of the plurality of first scheduling constraints. The second linear-programming task is solved to obtain a first solving result. A first solving result is used as an initial value of the first linear-programming task, and an initialized first linear-programming task is solved.

Abstract: A multi-row standard cell and an integrated circuit (IC) structure using the standard cell are provided. The IC structure includes a plurality of cell rows extending in a first direction. At least two cell rows of the plurality of cell rows have different row heights. The IC structure includes a multi-row standard cell positioned in two or more cell rows having different row heights. At least one active region is shared by portions of the multi-row cell across the at least two cell rows. The IC structure may also include one or more asymmetric shared power rails disposed in an asymmetric manner across a row boundary between the at least two cell rows of different row heights. The multi-row standard cells and IC structures allow placement of multi-row cells for mixed track height arrangements in a manner not limited to multiples of row heights.

Abstract: A surgical robotic arm control system and a surgical robotic arm control method are provided. The surgical robotic arm control system includes a surgical robotic arm, a first image capturing unit, a second image capturing unit, and a processor. The first image capturing unit is used for obtaining a field image. The field image includes a first target image of a target object. The second image capturing unit is disposed at an end position of the surgical robotic arm and is used to obtain a second target image of the target object. The processor analyzes the field image to obtain robotic arm movement information, and controls the surgical robotic arm to move to approach the target object. The processor analyzes the target image to obtain robotic arm rotation information, and controls an angle and a posture of the surgical robotic arm.

Abstract: An exemplary embodiment of the invention provides a read voltage control method for a rewritable non-volatile memory module. The method includes: sending a first read command sequence which instructs a reading of a plurality of first memory cells by using a first voltage level to obtain first data; obtaining first adjustment information of a read voltage according to the first data and a channel parameter of the first memory cells, and the channel parameter reflects a channel status of the first memory cells; and adjusting a voltage level of the read voltage from the first voltage level to a second voltage level according to the first adjustment information.

Abstract: A surgical robotic arm control system and a control method thereof are provided. The surgical robotic arm control system includes a surgical robotic arm, an image capture unit, and a processor. The image capture unit obtains a first image. The processor obtains a plurality of identification object coordinates of a plurality of identification object images according to the first image, and executes a virtual environment model to calculate a plurality of virtual spinal process coordinates of a virtual spine model. The processor generates surgical robotic arm operation information according to movement trajectory of a virtual surgical robotic arm moving toward a plurality of virtual identification objects located at the plurality of virtual spinal process coordinates in the virtual environment model, and controls the surgical robotic arm according to the surgical robotic arm operation information and the plurality of identification object coordinates.

Abstract: An industrial programming method and apparatus, a device, a storage medium, and a program product are provided. In a programming scheme generation method, a programming device obtains a first group of constraints for a plurality of parameters in an industrial programming job. Further, the programming device constructs, based on the first group of constraints, a cut constraint associated with at least one integer parameter in the plurality of parameters, and constructs a second group of constraints based on the cut constraint and the first group of constraints, where a type of the at least one integer parameter in the second group of constraints is changed. The programming device determines values of the plurality of parameters based on the second group of constraints, to generate a programming scheme for the industrial programming job.

Abstract: A read voltage level correction method, a memory storage device, and a memory control circuit unit are provided. The method includes: using a first read voltage level as an initial read voltage level to perform a first data read operation on a first physical unit among multiple physical units to obtain a second read voltage level used to successfully read the first physical unit; recording association information between the first read voltage level and the second read voltage level in a transient look-up table; and performing a second data read operation according to a read level tracking table and the association information recorded in the transient look-up table.

Abstract: A service data processing method is provided, including: obtaining a target function and a constraint condition, where the constraint condition includes a constraint relationship between a plurality of variables, and the target function includes at least one variable of the plurality of variables; selecting an initial variable from the plurality of variables for a base variable group; sorting optimized values of variables in a non-base variable group to obtain a maximum heap structure, where each node in the maximum heap structure stores an identifier of a variable and an optimized value corresponding to the variable; updating the non-base variable group and the base variable group based on a first target variable; and obtaining a solving target of a service problem based on a variable in an updated base variable group and the constraint condition.

Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.

Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.

Abstract: A flexible display substrate and a manufacturing method therefor, and a display device are disclosed. The flexible display substrate includes: a flexible display screen; an elastic layer which is located on one side of the flexible display screen, is connected to the flexible display screen by means of a first adhesive layer, and is in a compressed force storage state; and a material layer which is located on the side of the elastic layer away from the flexible display screen, and has an elastic modulus smaller than that of the first adhesive layer.

Abstract: An integrated circuit (IC) structure includes a plurality of cell rows with each cell row including a plurality of (standard) cells. A power rail for at least one pair of adjacent cell rows is asymmetric relative to a cell boundary between adjacent cells of the at least one pair of adjacent cell rows. Embodiments of the disclosure can also include the standard cell including a plurality of transistors at a device layer, and at least a portion of an isolation area at an edge of the device layer defining a cell boundary. The standard cell also includes the power rail including a first portion within the cell boundary and a second portion outside the cell boundary. The first portion and the second portion have different heights such that the power rail is asymmetric across the cell boundary. The asymmetric power rail provides seamless integration of cell libraries having different heights.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a cross couple design for high density standard cells and methods of manufacture. The structure includes a first contact connected in a cross couple circuit to at least two gate structures, and a second contact connected to the first contact at a location which is devoid of any via connection.

Abstract: A read disturb checking method, a memory storage device, and a memory control circuit unit are provided. The method includes: updating first and second read counts of a first physical unit group according to a total read count of a read operation performed on physical programming units in the first physical unit group; scanning at least one first physical programming unit in a currently read physical erasing unit in response to determining the first read account is greater than a first read count threshold to obtain a first error bit amount; scanning all physical programming units in at least one first physical erasing unit in the first physical unit group in response to determining the second read account is greater than a second read count threshold to obtain a second error bit amount; performing a read disturb prevention operation according to the first or second error bit amount.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to local interconnect power rails merged with upper power rails and methods of manufacture. The structure includes: an active cell including contacts enclosed in active regions; at least one local interconnect power rail connecting to the contacts of the active regions; and at least one power rail above and connected to the at least one local interconnect power rail.

Abstract: A memory control method, a memory storage device and a memory control circuit unit are provided. The method includes: determining a retry threshold value according to decoding history information which includes information related to at least one first decoding operation previously performed; and determining whether to enter a second decoding mode according to the retry threshold value after at least one second decoding operation performed based on a first decoding mode is failed. A decoding ability of the second decoding mode is higher than a decoding ability of the first decoding mode.

Abstract: A read voltage level correction method, a memory storage device, and a memory control circuit unit are provided. The method includes: using a first read voltage level as an initial read voltage level to perform a first data read operation on a first physical unit among multiple physical units to obtain a second read voltage level used to successfully read the first physical unit; recording association information between the first read voltage level and the second read voltage level in a transient look-up table; and performing a second data read operation according to a read level tracking table and the association information recorded in the transient look-up table.

Abstract: A read disturb checking method, a memory storage device, and a memory control circuit unit are provided. The method includes: updating first and second read counts of a first physical unit group according to a total read count of a read operation performed on physical programming units in the first physical unit group; scanning at least one first physical programming unit in a currently read physical erasing unit in response to determining the first read account is greater than a first read count threshold to obtain a first error bit amount; scanning all physical programming units in at least one first physical erasing unit in the first physical unit group in response to determining the second read account is greater than a second read count threshold to obtain a second error bit amount; performing a read disturb prevention operation according to the first or second error bit amount.

Abstract: A surgical robotic arm control system and a control method thereof are provided. The surgical robotic arm control system includes a surgical robotic arm, an image capturing unit, and a processor. The surgical robotic arm has multiple joint axes. The image capturing unit obtains a first image. The processor executes a spatial environment recognition module to generate a first environment information image, a first direction information image, and a first depth information image according to the first image. The processor executes a spatial environment image processing module to calculate path information according to the first environment information image, the first direction information image, and the first depth information image. The processor executes a robotic arm motion feedback module to operate the surgical robotic arm to move according to the path information.