Abstract: A solid state storage includes a non-volatile memory and a controlling circuit. The non-volatile memory includes a first block. The controlling circuit is connected with the non-volatile memory. The controlling circuit includes a function storage circuit. The function storage circuit stores plural prediction functions. According to plural state parameters corresponding to the first block and a first prediction function of the plural prediction functions, the controlling circuit predicts a read voltage shift of the first block.

Abstract: A method and device for displaying incremental update progress. The method includes: drawing representation parts corresponding to a file package increment and a file package non-increment in one and the same geometric graph using a first color and a second color, respectively; and in a process of loading the file package increment, updating the first color of the representation part corresponding to the file package increment, until the first color of the representation part corresponding to the file package increment is completely changed into the second color.

Abstract: At least one method, apparatus and system disclosed herein for forming a finFET device having a pass-through structure. A first gate structure and a second gate structure are formed on a semiconductor wafer. A first active area is formed on one end of the first and second gate structures. A second active area is formed on the other end of the first and second gate structures. A trench silicide (TS) structure self-aligned to the first and second gate structures is formed. The TS structure is configured to operatively couple the first active area to the second active area.

Abstract: A solid state storage includes a non-volatile memory and a controlling circuit. The non-volatile memory includes a first block. The controlling circuit is connected with the non-volatile memory. The controlling circuit includes a function storage circuit. The function storage circuit stores plural prediction functions. According to plural state parameters corresponding to the first block and a first prediction function of the plural prediction functions, the controlling circuit predicts a read voltage shift of the first block.

Abstract: At least one method, apparatus and system disclosed herein for forming a finFET device having a pass-through structure. A first gate structure and a second gate structure are formed on a semiconductor wafer. A first active area is formed on one end of the first and second gate structures. A second active area is formed on the other end of the first and second gate structures. A trench silicide (TS) structure self-aligned to the first and second gate structures is formed. The TS structure is configured to operatively couple the first active area to the second active area.

Abstract: At least one method, apparatus and system disclosed involves circuit layout for comprising a unidirectional metal layout. A first trench silicide (TS) formation is formed in a first active area of a functional cell. A first CA formation if formed above the first TS formation. A first vertical metal formation is formed in a first metal layer from the first active area to a second active area of the functional cell. The first vertical metal formation is formed offset relative to, and in contact with, the CA formation. A second TS formation is formed in a second active area of the functional cell. A second CA formation is formed above the second TS formation. The CA formation is formed offset the first vertical metal formation, operatively coupling the first and second active areas.

Abstract: A power-off period estimating method for a solid state storage device is provided. A memory array of a non-volatile memory of the solid state storage device includes plural blocks. Firstly, a first quality parameter of a first block of the plural blocks is calculated before the solid state storage device is powered off. When the first block is corrected at a first time counting value, a first read voltage set of the first block is acquired and the first time counting value is recorded. Then, the first block is corrected after the solid state storage device is powered on, so that a second read voltage set of the first block is acquired. Then, a power-off period is calculated according to the first quality parameter, the first read voltage set, the second read voltage set and the first time counting value.

Abstract: The present invention discloses a rule matching method including: receiving a packet; detecting feature information in content of the packet, and determining whether the detected feature information in the packet conforms to a classification characteristic of one rule group among a plurality of preset rule groups; if yes, determining a state machine corresponding to the one rule group as a first state machine; and determining whether the first state machine is stored in an on-chip memory, and if yes, using the first state machine to match the packet to obtain a matching result; and if no, when an off-chip memory stores the first state machine, loading the first state machine from the off-chip memory into the on-chip memory, and using the first state machine to match the packet to obtain a matching result. Embodiments of the present invention enable a product to achieve better performance.

Abstract: A power-off period estimating method for a solid state storage device is provided. A memory array of a non-volatile memory of the solid state storage device includes plural blocks. Firstly, a first quality parameter of a first block of the plural blocks is calculated before the solid state storage device is powered off. When the first block is corrected at a first time counting value, a first read voltage set of the first block is acquired and the first time counting value is recorded. Then, the first block is corrected after the solid state storage device is powered on, so that a second read voltage set of the first block is acquired. Then, a power-off period is calculated according to the first quality parameter, the first read voltage set, the second read voltage set and the first time counting value.

Abstract: At least one method, apparatus and system disclosed herein for forming a finFET device having a pass-through structure. A first gate structure and a second gate structure are formed on a semiconductor wafer. A first active area is formed on one end of the first and second gate structures. A second active area is formed on the other end of the first and second gate structures. A trench silicide (TS) structure self-aligned to the first and second gate structures is formed. The TS structure is configured to operatively couple the first active area to the second active area.

Abstract: Embodiments of the present invention provide an improved semiconductor structure and methods of fabrication that provide transistor contacts that are self-aligned in two dimensions. Two different capping layers are used, each being comprised of a different material. The two capping layers are selectively etchable to each other. One capping layer is used for gate coverage while the other capping layer is used for source/drain coverage. Selective etch processes open the desired gates and source/drains, while block masks are used to cover elements that are not part of the connection scheme. A metallization line (layer) is deposited, making contact with the open elements to provide electrical connectivity between them.

Abstract: A system and a method for training a parameter set in a neural network includes a main-control-node set, used for controlling a training process and storing a data set and a parameter set that are used for training, where the main-control-node set includes M main control nodes, every two of the M main control nodes are in a communication connection, and at least one main control node of the M main control nodes is configured to back up the parameter set. The system also includes N training-node sets, where the training-node set includes multiple training nodes, and the training node is configured to perform training according to a data set and a parameter set that are delivered by the main-control-node set, and send a training result to a corresponding main control node.

Abstract: A method of forming a pattern for interconnect lines in an integrated circuit includes providing a structure having a first lithographic stack, a mandrel layer and a pattern layer disposed over a dielectric stack. Patterning the structure to form mandrels in the mandrel layer and disposing a spacer layer over the mandrels. Etching the spacer layer to form spacers disposed on sidewalls of the mandrels. The spacers and mandrels defining beta and gamma regions. A beta region includes a beta block mask portion and a gamma region includes a gamma block mask portion of the pattern layer. The method also includes etching a beta pillar over the beta block mask portion and etching a gamma pillar over the gamma block mask portion. The method also includes etching the structure to form a pattern in the pattern layer, the pattern including the gamma and beta block mask portions.

Abstract: Embodiments of the present invention provide an improved semiconductor structure and methods of fabrication that provide transistor contacts that are self-aligned in two dimensions. Two different capping layers are used, each being comprised of a different material. The two capping layers are selectively etchable to each other. One capping layer is used for gate coverage while the other capping layer is used for source/drain coverage. Selective etch processes open the desired gates and source/drains, while block masks are used to cover elements that are not part of the connection scheme. A metallization line (layer) is deposited, making contact with the open elements to provide electrical connectivity between them.

Abstract: A reading control method for a solid state storage device includes following steps. While the solid state storage device is in an idle mode, a background monitoring operation is performed on the first block and the second block. Consequently, a first optimal read voltage set corresponding to the first block and a second optimal read voltage set corresponding to the second block are acquired. In reading operation, a default read voltage set is provided to the non-volatile memory to read a data of the first block. If a data of the first block is not successfully decoded, a read retry process is performed on the first block and the first optimal read voltage set is provided to the non-volatile memory to read the data of the first block.

Abstract: A user unsubscription prediction method and apparatus includes obtaining service consumption feature data, position activity feature data, and social network feature data of a user within a first preset time period, where the position activity feature data refers to data related to communication between the user and each base station within the first preset time period, and the social network feature data refers to data related to communication between the user and another user in a social network within the first preset time period, and inputting the obtained service consumption feature data, position activity feature data, and social network feature data to a pretrained classifier for calculation and outputting a calculation result, where the calculation result is a user unsubscription prediction result.

Abstract: A method, a system, and an apparatus are provided for sharing application information. The method receives match request sent by a mobile terminal X upon receipt of a share instruction of a user. According to the match request, the method determines whether there is a mobile terminal that is matched with the mobile terminal X among other mobile terminals that send match request, and if a mobile terminal is found, sends a success message. When a server receives identifiers of applications to be shared sent from any one mobile terminal of the matched mobile terminals, the method determines whether the other mobile terminal of the matched mobile terminals is connected to the server, if the other mobile terminal is online, obtains relevant information of the application corresponding to each identifier respectively, and sends the obtained relevant information to the other mobile terminal.

Abstract: A topic mining method and apparatus are disclosed. When an iterative process is executed each time, an object message vector is determined from a message vector according to a residual of the message vector, so that a current document-topic matrix and a current term-topic matrix are updated according to only the object message vector, and then calculation is performed, according to the current document-topic matrix and the current term-topic matrix, on only an object element that is in the term-document matrix and that corresponds to the object message vector, thereby avoiding that in each iterative process, calculation needs to be performed on all non-zero elements in the term-document matrix, and avoiding that the current document-topic matrix and the current term-topic matrix are updated according to all message vectors, which greatly reduces an operation amount, increases a speed of topic mining, and increases efficiency of topic mining.

Abstract: An entity matching method and apparatus, where the method includes, calculating kernel matrices K and L after reading a first data source and a second data source with inconsistent entity quantities, respectively, solving a first optimization objective function to obtain a matrix M of a correspondence between an entity on the first data source and an entity on the second data source, and outputting the obtained matrix M. Hence, according to the entity matching method and apparatus provided in the present disclosure, entity matching when entity quantities of data sources are inconsistent may be performed such that accuracy of data mining may be effectively improved, and data value may be effectively presented.

Abstract: A reading control method for a solid state storage device includes following steps. If a hard decoding process fails, a first histogram parameter and a second histogram parameter are generated in the hard decoding process according to a first sensing voltage, a second sensing voltage and a third sensing voltage. Then, a voltage shift amount is obtained according to the first histogram parameter, the second histogram parameter and a voltage shift function. The first sensing voltage, the second sensing voltage and the third sensing voltage are updated according to the voltage shift amount. Then, a soft decoding process is performed. The updated first sensing voltage, the updated second sensing voltage and the updated third sensing voltage are provided to a non-volatile memory, so that the non-volatile memory generates a soft data.