Abstract: Disclosed is a PTZ video visibility detection method based on luminance characteristic, which includes acquiring a road condition video image by utilizing a PTZ video camera, extracting the region of interest ROI of the road surface to obtain high constancy of selected pixels; acquiring precise road surface region by utilizing region-growing algorism based on Nagao filtering to ensure the illuminance constancy of the selected pixels in world coordinates; in the road surface region, extracting the contrast curve which reflects the luminance variation of the road surface, and searching the feature points of the luminance curve to calculate the human eye distinguishable and maximum far pixels in the image with an extinction coefficient; calculating the maximum visibility distance in combination with camera calibration to determine the visibility value.

Abstract: Methods and apparatus for supplying unbound applications with data via in-band program channel signaling are described. Unbound applications are STB or other customer premise device applications which continue to run when a tuner in the device changes between program channels. Applications executed in a STB, in accordance with the present invention, e.g., eBIF applications, continue to run despite changes in program channels with data being supplied via in-band signaling, out of band signaling, or a combination of in-band and out of band signaling. The methods and apparatus are well suited for supporting delivery of program catalog information relevant to an individual program channel using in-band signaling reducing or eliminating the need to delivery a multi-channel program catalog via out of band signaling to support various VOD applications.

Abstract: An electrical connector (1000) includes a number of frames (10). The frame includes a dielectric holder (3) holding a number of signal contacts (23), and a ground shield (2) including a base plate (20) coupled to the dielectric holder. The ground shield includes a number of mating sections (221) extending forwardly from a front edge of the base plate and parallel to a mating portion (231) of the signal contact. A number of grounding tails (214) are separately mounted into the bottom side of the holder and aligned to the mounting portion of the signal contacts. The ground shield further includes a front tail (211) extending downwardly along the base plate, and a number of connecting legs (213) each extending sideward adjacent a bottom edge of the base plate into the holder for electrically connecting with the grounding tail.

Abstract: Metal semiconductor alloy contacts are provided on each of a source region and a drain region which are present in a semiconductor substrate. A transition metal is then deposited on each of the metal semiconductor alloy contacts, and during the deposition of the transition metal, the deposited transition metal reacts preferably, but not necessarily always, in-situ with a portion of each the metal semiconductor alloy contacts forming a transition metal-metal semiconductor alloy liner atop each metal semiconductor alloy contact. Each transition metal-metal semiconductor alloy liner that is provided has outer edges that are vertically coincident with outer edges of each metal semiconductor alloy contact. The transition metal-metal semiconductor alloy liner is more etch resistant as compared to the underlying metal semiconductor alloy. As such, the transition metal-metal semiconductor alloy liner can serve as an effective etch stop layer during any subsequently performed etch process.

Abstract: An apparatus and a method for implementing a common public radio interface (CPRI) negotiation state machine. The apparatus includes an application-specific integrated circuit (ASIC) chip and a system on chip (SOC), where the ASIC chip is configured to send an interrupt request to the SOC in condition that n transition paths of m transition paths of the CPRI negotiation state machine need to be processed by the SOC; the SOC is configured to execute the software code according to the interrupt request to generate interrupt configuration information, and send the interrupt configuration information to the ASIC chip, where the interrupt configuration information is used to indicate whether the CPRI negotiation state machine transits to a state pointed by the n transition paths; and the ASIC chip is further configured to control transition of the CPRI negotiation state machine according to the interrupt configuration information.

Abstract: An electrical fuse has an anode contact on a surface of a semiconductor substrate. The electrical fuse has a cathode contact on the surface of the semiconductor substrate spaced from the anode contact. The electrical fuse has a link within the substrate electrically interconnecting the anode contact and the cathode contact. The link comprises a semiconductor layer and a silicide layer. The silicide layer extends beyond the anode contact. An opposite end of the silicide layer extends beyond the cathode contact. A silicon germanium region is embedded in the semiconductor layer under the silicide layer, between the anode contact and the cathode contact.

Abstract: The present invention relates to pharmaceutical compositions and a method of inhibiting metastasis using anti-ROR1 antibodies or antigen binding fragments, ROR1 binding peptides and ROR1 vaccines.

Abstract: Metal semiconductor alloy contacts are provided on each of a source region and a drain region which are present in a semiconductor substrate. A transition metal is then deposited on each of the metal semiconductor alloy contacts, and during the deposition of the transition metal, the deposited transition metal reacts preferably, but not necessarily always, in-situ with a portion of each the metal semiconductor alloy contacts forming a transition metal-metal semiconductor alloy liner atop each metal semiconductor alloy contact. Each transition metal-metal semiconductor alloy liner that is provided has outer edges that are vertically coincident with outer edges of each metal semiconductor alloy contact. The transition metal-metal semiconductor alloy liner is more etch resistant as compared to the underlying metal semiconductor alloy. As such, the transition metal-metal semiconductor alloy liner can serve as an effective etch stop layer during any subsequently performed etch process.

Abstract: Metal semiconductor alloy contacts are provided on each of a source region and a drain region which are present in a semiconductor substrate. A transition metal is then deposited on each of the metal semiconductor alloy contacts, and during the deposition of the transition metal, the deposited transition metal reacts preferably, but not necessarily always, in-situ with a portion of each the metal semiconductor alloy contacts forming a transition metal-metal semiconductor alloy liner atop each metal semiconductor alloy contact. Each transition metal-metal semiconductor alloy liner that is provided has outer edges that are vertically coincident with outer edges of each metal semiconductor alloy contact. The transition metal-metal semiconductor alloy liner is more etch resistant as compared to the underlying metal semiconductor alloy. As such, the transition metal-metal semiconductor alloy liner can serve as an effective etch stop layer during any subsequently performed etch process.

Abstract: A phase locked loop and an associated alignment method are provided. A disclosed phase locked loop receives a reference signal to provide a feedback signal. The phase locked loop is first opened. When the phase locked loop is open, a frequency range of an oscillating signal from a voltage-controlled oscillator is substantially selected. The feedback signal is provided according to the oscillation signal. After the frequency range is selected, the phase locked loop is kept open and the phases of the reference signal and the feedback signal are substantially aligned. The phase locked loop is then closed after the reference signal and the feedback signal are aligned.

Abstract: An artificial knee joint is to be connected between a prosthetic thigh and a prosthetic lower leg. The artificial knee joint includes a knee joint body, a processor mounted in the knee joint body, a damping unit that is coupled to the processor and configurable to provide various damping levels, and an accelerometer coupled to the processor. The accelerometer is configured to measure acceleration subjected to the artificial knee joint, and to generate and transmit a measuring signal according to the measurement to the processor. The processor is configured to control the damping unit to provide one of the damping levels, based on the measuring signal.

Abstract: In various embodiments, the present invention relates generally to using bispecific antibodies in the prevention and treatment of HIV.

Abstract: In a replacement gate scheme, a continuous material layer is deposited on a bottom surface and a sidewall surface in a gate cavity. A vertical portion of the continuous material layer is removed to form a gate component of which a vertical portion does not extend to a top of the gate cavity. The gate component can be employed as a gate dielectric or a work function metal portion to form a gate structure that enhances performance of a replacement gate field effect transistor.

Abstract: An oscillation signal generator includes a quadrature voltage-controlled oscillator (QVCO), a phase corrector and a frequency adjusting circuit. The QVCO provides multiple oscillation signals having difference phases. The phase corrector selects one of the oscillation signals as a first oscillation signal and outputs the first oscillation signal from a first output terminal, and selects one of the oscillation signals as a second oscillation signal and outputs the second oscillation signal from a second output terminal. A phase difference between the first and second oscillation signals satisfies a predetermined relationship. The frequency adjusting circuit is coupled to the phase corrector, and generates a quadrature signal and an in-phase signal according to the oscillation signals. The frequency of the oscillation signals is a non-integral multiple of the frequencies of the quadrature and in-phase signals.

Abstract: A method of forming a semiconductor device is provided that includes forming a first metal semiconductor alloy on a semiconductor containing surface, forming a dielectric layer over the first metal semiconductor alloy, forming an opening in the dielectric layer to provide an exposed surface the first metal semiconductor alloy, and forming a second metal semiconductor alloy on the exposed surface of the first metal semiconductor alloy. In another embodiment, the method includes forming a gate structure on a channel region of a semiconductor substrate, forming a dielectric layer over at least a source region and a drain region, forming an opening in the dielectric layer to provide an exposed surface the semiconductor substrate, forming a first metal semiconductor alloy on the exposed surface of the semiconductor substrate, and forming a second metal semiconductor alloy on the first metal semiconductor alloy.

Abstract: A method of forming a semiconductor device is provided that includes forming a gate structure on a channel portion of a semiconductor substrate, forming an interlevel dielectric layer over the gate structure, and forming a opening through the interlevel dielectric layer to an exposed surface of the semiconductor substrate containing at least one of the source region and the drain region. A metal semiconductor alloy contact is formed on the exposed surface of the semiconductor substrate. At least one dielectric sidewall spacer is formed on sidewalls of the opening. An interconnect is formed within the opening in direct contact with the metal semiconductor alloy contact.

Abstract: Methods of forming an electrically programmable fuse (e-fuse) structure and the e-fuse structure are disclosed. Various embodiments of forming the e-fuse structure include: forming a dummy poly gate structure to contact a surface of a silicon structure, the dummy poly gate structure extending only a part of a length of the silicon structure; and converting an unobstructed portion of the surface of the silicon structure to silicide to form a thinned strip of the silicide between two end regions.

Abstract: An RF receiver/transmitter apparatus for carrier aggregation is disclosed, to provide a routing circuitry formed by a plurality of mixer modules for achieving both the function of carrier aggregation and the mixing frequency process of signals. This architecture allows sharing an RF front-end, improving degree of integration, and reducing hardware cost and circuitry power consumption. In addition, in the process of reception and transmission, the apparatus may perform different processing and configuration for each sub-channel to increase circuit design flexibility. The receiver apparatus includes at least one antenna, a first signal processing unit, a routing mixer device, a second signal processing unit and a digital signal processor (DSP); and the routing mixer device includes a plurality of mixer module and a plurality of current/voltage adders to achieve signal routing control through opening or closing of the mixer, switching the signal transmission path or switching the signal synthesizer.

Abstract: In a replacement gate scheme, a continuous material layer is deposited on a bottom surface and a sidewall surface in a gate cavity. A vertical portion of the continuous material layer is removed to form a gate component of which a vertical portion does not extend to a top of the gate cavity. The gate component can be employed as a gate dielectric or a work function metal portion to form a gate structure that enhances performance of a replacement gate field effect transistor.

Abstract: A semiconductor device is provided that includes a gate structure on a channel region of a substrate. A source region and a drain region are present on opposing sides of the channel region. A first metal semiconductor alloy is present on an upper surface of at least one of the source and drain regions. The first metal semiconductor alloy extends to a sidewall of the gate structure. A dielectric layer is present over the gate structure and the first metal semiconductor alloy. An opening is present through the dielectric layer to a portion of the first metal semiconductor alloy that is separated from the gate structure. A second metal semiconductor alloy is present in the opening, is in direct contact with the first metal semiconductor alloy, and has an upper surface that is vertically offset and is located above the upper surface of the first metal semiconductor alloy.