Abstract: Embodiments of the present invention provide a method, apparatus and system for enhancing needle visualization in ultrasound imaging. The method comprises setting a scanning depth corresponding to a depth of a part or tissue target in a patient's body; and automatically determining a needle frame steering angle and an ultrasound working frequency for needle frame collection based on the scanning depth.

Abstract: A data acquisition system includes a charge-sensitive amplifier (CSA) configured to receive a charge from an x-ray detector, the CSA includes a high-gain electronic voltage amplifier, an electrical energy storage device coupled with the amplifier, and an electrical resistor coupled with the amplifier. The data acquisition system includes a baseline sampling circuit configured to receive an output from the CSA and to sample a baseline signal from the CSA, at least one discriminator coupled to an output of the CSA and to an output of the baseline sampling circuit, the at least one discriminator configured to output a voltage if the output of the CSA exceeds a threshold, and a counter coupled to an output of the discriminator and configured to output a digital signal indicative of a photon count received at the x-ray detector and based on the output from the CSA and on the signal from the CSA.

Abstract: A method of enhancing needle visualization in ultrasound imaging is provided. The method includes reducing overall gain in needle frames, and applying a nonlinear mapping to the needle frames, wherein the nonlinear mapping is configured to make strong signals stronger and make weak signals weaker after mapping.

Abstract: An event time stamping system comprising a current source, an integrator comprising an input and an output, and configured to output a voltage proportional to the length of time the current source is coupled to the input, and one or more switches configured to couple the current source to the input of the integrator upon receipt of an event signal and configured to de-couple the current source from the input of the integrator upon receipt of a control trigger. The system further comprises a lock-out signal generator configured to generate a lock-out signal, and a controller coupled to the one or more switches, wherein the controller is configured to generate the control trigger based on the lock-out signal to ensure a minimum integration time.

Abstract: An application-specific integrated circuit (ASIC) comprising a plurality of channels, each channel having circuitry for time and energy discrimination, a plurality of programmable registers, each programmable register configured to output at least one configuration parameter for the circuitry, and a channel-select register configured to identify a channel of the plurality of channels to be configured. The ASIC further includes a configuration-select register configured to identify the programmable register to be used for channel configuration, and a communications interface configured to transmit instructions received from a controller to one of the channel-select register, the configuration-select register, and the plurality of programmable registers.

Abstract: According to embodiments of the present technique, a system and a method for obtaining low-noise measurements for a wide range of analog signal strengths is provided. According to aspects of the present technique, a low-gain measurement of an input pixel charge is performed, wherein the input pixel charge is distributed to two feedback capacitors, which together provide a relatively low integrator gain. After the low-gain measurement, a high-gain measurement is performed, wherein one of the capacitors is remove from the feedback loop and the charge is redistributed to the remaining capacitor.

Abstract: A technique is provided for acquiring data with reduced correlated low frequency noise interference via a data acquisition circuit. The data acquisition circuit includes a plurality of data channels comprising a plurality of amplifiers and a biasing circuit for providing bias voltages to the plurality of amplifiers. The biasing circuit is configured to generate the bias voltages and establish a relationship between the bias voltages so as to reduce correlated low frequency noise in the plurality of amplifiers.

Abstract: A data acquisition system includes a charge-sensitive amplifier (CSA) configured to receive a charge from an x-ray detector, the CSA includes a high-gain electronic voltage amplifier, an electrical energy storage device coupled with the amplifier, and an electrical resistor coupled with the amplifier. The data acquisition system includes a baseline sampling circuit configured to receive an output from the CSA and to sample a baseline signal from the CSA, at least one discriminator coupled to an output of the CSA and to an output of the baseline sampling circuit, the at least one discriminator configured to output a voltage if the output of the CSA exceeds a threshold, and a counter coupled to an output of the discriminator and configured to output a digital signal indicative of a photon count received at the x-ray detector and based on the output from the CSA and on the signal from the CSA.

Abstract: According to embodiments of the present technique, a system and a method for obtaining low-noise measurements for a wide range of analog signal strengths is provided. According to aspects of the present technique, a low-gain measurement of an input pixel charge is performed, wherein the input pixel charge is distributed to two feedback capacitors, which together provide a relatively low integrator gain. After the low-gain measurement, a high-gain measurement is performed, wherein one of the capacitors is remove from the feedback loop and the charge is redistributed to the remaining capacitor.

Abstract: A data acquisition system including a readout Application Specific Integrated Circuit (ASIC) having a plurality of channels, each channel having a time discriminating circuit and an energy discriminating circuit, wherein the ASIC is configured to receive a plurality of signals from a semiconductor radiation detector. The data acquisition system also includes a digital-to-analog converter (DAC) electrically coupled to the ASIC and configured to provide a reference signal to the ASIC used in the generation of digital outputs from the ASIC, and a controller electrically coupled to the ASIC and to the DAC, the controller configured to instruct the DAC to provide the reference signal to the ASIC.

Abstract: A technique is provided for acquiring data with reduced correlated low frequency noise interference via a data acquisition circuit. The data acquisition circuit includes a plurality of data channels comprising a plurality of amplifiers and a biasing circuit for providing bias voltages to the plurality of amplifiers. The biasing circuit is configured to generate the bias voltages and establish a relationship between the bias voltages so as to reduce correlated low frequency noise in the plurality of amplifiers.

Abstract: A system and a method for converting an analog signal to a digital signal are provided. The technique involves receiving a sampled analog signal, and selecting one of a plurality of segments of a segmented relation between DAC output values and desired ADC input values. Desired gain and offset values are applied to the DAC output values or to the sampled analog signal based upon the selected segment. The sampled analog signal is converted to a digital signal based upon the desired gain and offset values.

Abstract: A data acquisition system including a readout Application Specific Integrated Circuit (ASIC) having a plurality of channels, each channel having a time discriminating circuit and an energy discriminating circuit, wherein the ASIC is configured to receive a plurality of signals from a semiconductor radiation detector. The data acquisition system also includes a digital-to-analog converter (DAC) electrically coupled to the ASIC and configured to provide a reference signal to the ASIC used in the generation of digital outputs from the ASIC, and a controller electrically coupled to the ASIC and to the DAC, the controller configured to instruct the DAC to provide the reference signal to the ASIC.

Abstract: An application-specific integrated circuit (ASIC) comprising a plurality of channels, each channel having circuitry for time and energy discrimination, a plurality of programmable registers, each programmable register configured to output at least one configuration parameter for the circuitry, and a channel-select register configured to identify a channel of the plurality of channels to be configured. The ASIC further includes a configuration-select register configured to identify the programmable register to be used for channel configuration, and a communications interface configured to transmit instructions received from a controller to one of the channel-select register, the configuration-select register, and the plurality of programmable registers.

Abstract: An event time stamping system comprising a current source, an integrator comprising an input and an output, and configured to output a voltage proportional to the length of time the current source is coupled to the input, and one or more switches configured to couple the current source to the input of the integrator upon receipt of an event signal and configured to de-couple the current source from the input of the integrator upon receipt of a control trigger. The system further comprises a lock-out signal generator configured to generate a lock-out signal, and a controller coupled to the one or more switches, wherein the controller is configured to generate the control trigger based on the lock-out signal to ensure a minimum integration time.

Abstract: A multi-floor building comprising a floor garden unit, set on every floor of all floors or every floor of continuous multiple floors, wherein the floor garden unit has a height of two or more floors and is open to outside. A plane projection of two adjacent floor garden units is non-overlapping. A bottom space of an upper floor garden unit and a upper space of an adjacent lower floor garden unit are at a same floor and partially run through. At least two of the floor garden units are in a superposed state to form a set of superposing garden arrangement. The bottom plate of the upper floor garden unit is a roof plate of the adjacent lower floor garden unit. Every two of the floor garden units run through each other in turn to form a stereo-terraced garden.

Abstract: An amplifier circuit and method for reducing bias noise is disclosed. The amplifier circuit includes a passive biasing source for supplying a desired bias signal to the amplifier and an active biasing source for energizing the passive biasing source to supply the desired bias signal. The amplifier circuit also includes a decoupler for selectively decoupling the active biasing source from the passive biasing source when the amplifier is configured for amplifying an input signal so that the amplifier remains isolated from electronic noise produced by the active biasing source while still being supplied the desired bias signal by the passive source.

Abstract: An amplifier circuit and method for reducing bias noise is disclosed. The amplifier circuit includes a passive biasing source for supplying a desired bias signal to the amplifier and an active biasing source for energizing the passive biasing source to supply the desired bias signal. The amplifier circuit also includes a decoupler for selectively decoupling the active biasing source from the passive biasing source when the amplifier is configured for amplifying an input signal so that the amplifier remains isolated from electronic noise produced by the active biasing source while still being supplied the desired bias signal by the passive source.

Abstract: A system and a method for converting an analog signal to a digital signal are provided. The technique involves receiving a sampled analog signal, and selecting one of a plurality of segments of a segmented relation between DAC output values and desired ADC input values. Desired gain and offset values are applied to the DAC output values or to the sampled analog signal based upon the selected segment. The sampled analog signal is converted to a digital signal based upon the desired gain and offset values.

Abstract: A method for calibrating a segmented analog to digital signal conversion system is provided. The method includes segmenting a desired relationship between DAC output values and desired ADC input values into a plurality of segments. Each of the plurality of segments includes an offset value and a gain value. The method also includes computing the offset value and an offset coefficient for each of the plurality of segments, computing the gain value and an gain coefficient for each of the plurality of segments, and storing the offset value and the gain value for each of the plurality of segments in a memory unit for reference in converting an analog signal to a digital signal based upon the gain value and offset value.