Patents by Inventor Jianping Xu

Jianping Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080191557
    Abstract: A power supply system can include a primary power supply coupled to an output, and a secondary power supply coupled to the output. The primary power supply provides power to the output when a voltage level of the secondary power supply is less than a first predetermined level. The secondary power supply provides power to the output when the voltage level of the secondary power supply is greater than the first predetermined level. The secondary power supply not only provides power to the output, but also charges the primary power supply when the voltage level of the secondary power supply is greater than a second predetermined level that is greater than the first predetermined level.
    Type: Application
    Filed: October 1, 2007
    Publication date: August 14, 2008
    Applicant: O2Micro Inc.
    Inventors: Stefan Maireanu, Alex Hartular, Chun Lu, Jianping Xu, Xinhe Su, Xiaodong Wang
  • Publication number: 20080150488
    Abstract: A power system for managing charging, discharging and protection of rechargeable batteries is disclosed. The power system mainly includes a power system. The power system includes a switching circuit coupled to the rechargeable batteries to charge and discharge the rechargeable batteries. The power system includes a power management unit to control the switching circuit. The power system includes a temperature sensing circuit to monitor a temperature of the batteries, voltage detectors to monitor voltages of the batteries, and current detectors to monitor a current of the batteries. If an abnormal condition is sensed by the power management unit when the power system is in an operating mode, the power management unit will terminate the operating mode by switching off the switching circuit to protect the batteries and the power system.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 26, 2008
    Inventors: Chun Lu, Stefan Maireanu, Luyang Luo, Lin Tang, Mingzhi He, Jianping Xu
  • Patent number: 7386080
    Abstract: A system and method for sampling a data stream generates a number of clock signals having equally spaced phases and then samples a data stream using the clock signals. The clock phases are preferably based on a predetermined fraction of a data rate frequency of the data stream, and sampling is performed based on predetermined combinations of the clock signals. While the system and method is suitable for sampling data transmitted for a wide variety of data rates, the system and method is especially well-suited to sampling at data transmitted at high rates, for example, equal to or greater than 20 Gb/s.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: June 10, 2008
    Assignee: Intel Corportion
    Inventors: Fabrice Paillet, Tanay Karnik, Jianping Xu
  • Patent number: 7348821
    Abstract: A device includes a first circuit having rows and columns of delay cells to generate delayed signals based on an input signal. The delayed signals are selectable and have a different delay from one another with respect to the input signal. The device is programmable based on a delay code. Different values of the delay code allow the device to select different delayed signals. The device may select one of the delayed signals from the first circuit for use as a timing signal in a second circuit of the device. The device may also use the delayed signals from the first circuit to evaluate a clock and data recovery circuit. In an embodiment, the circuits may be located on a single die.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: March 25, 2008
    Assignee: Intel Corporation
    Inventors: Jianping Xu, KyeHyung Lee, Fabrice Paillet, David Rennie, Tanay Karnik
  • Patent number: 7324540
    Abstract: The disclosure describes techniques for coordinating operation of multiple network protocol off-load engines (e.g., Transport Control Protocol (TCP) off-load engines).
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: January 29, 2008
    Assignee: Intel Corporation
    Inventors: Sriram R. Vangal, Yatin Hoskote, Vasantha K. Erraguntla, Jianping Xu
  • Publication number: 20070242059
    Abstract: A digital signature collection and authentication system includes an ink pen having an ultrasonic transmitter that transmits ultrasonic energy to a plurality of ultrasonic receivers. A computer triangulates the location of the pen versus time to generate the signature shape, and to generate velocity and acceleration data. The pen also includes a pressure sensitive tip to record pressure applied to the pen tip. The pen also includes a higher frequency burst transmitter useful to generate a time reference, and to transmit the pressure information. The computer packetizes the shape, velocity, acceleration, and pressure data with a time stamp and an IP address or phone number, encrypts the packet and sends it to a host computer for authentication.
    Type: Application
    Filed: June 20, 2007
    Publication date: October 18, 2007
    Inventor: Jianping Xu
  • Publication number: 20070241732
    Abstract: A power management device for enabling multiply power sources to supply power to a load. The power management device includes a plurality of switches and a control logic. The plurality of switches are coupled to a plurality of power sources respectively and each switch coupled to each power source. The control logic is capable of selecting a set of switches among the plurality of switches to cooperate in a time-divided fashion to allow the power sources to provide power to the load. The set of switches is selected based on an electrical requirement of the load and an electrical condition of each switch.
    Type: Application
    Filed: April 12, 2006
    Publication date: October 18, 2007
    Inventors: Luyang Luo, Chun Lu, Jianping Xu, Lin Tang
  • Patent number: 7279646
    Abstract: A digital signature collection and authentication system includes an ink pen having an ultrasonic transmitter that transmits ultrasonic energy to a plurality of ultrasonic receivers. A computer triangulates the location of the pen versus time to generate the signature shape, and to generate velocity and acceleration data. The pen also includes a pressure sensitive tip to record pressure applied to the pen tip. The pen also includes a higher frequency burst transmitter useful to generate a time reference, and to transmit the pressure information. The computer packetizes the shape, velocity, acceleration, and pressure data with a time stamp and an IP address or phone number, encrypts the packet and sends it to a host computer for authentication.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: October 9, 2007
    Assignee: Intel Corporation
    Inventor: Jianping Xu
  • Patent number: 7248251
    Abstract: A wireless coordinate input system for a display system includes a stylus that transmits ultrasonic energy to a plurality of ultrasonic receiving stations in a projection plane. In an embodiment, the stylus may include one ultrasonic transmitter used for determination of three-dimensional coordinates of the stylus relative to the projection plane. The stylus may also include a second ultrasonic transmitter controlled by a pressure-activated switch. When the stylus is pressed against the projection plane, the second transmitter turns on and is used for determination of two-dimensional coordinates of the stylus in the projection plane. The stylus may also include a higher frequency burst transmitter used to generate a time reference. One or more of the ultrasonic receiving stations may also include an ultrasonic transmitter for calibration.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: July 24, 2007
    Assignee: Intel Corporation
    Inventors: Jianping Xu, Stephen H. Hunt
  • Patent number: 7215173
    Abstract: In general, in one aspect, the disclosure describes an apparatus for shifting a low swing signal. The apparatus includes a first pair of transistors to receive a first input signal and a second input signal and to generate a first output signal that is a shifted version of the first input signal. The apparatus further includes a second pair of transistors to receive the first input signal and the second input signal and to generate a second output signal that is a shifted version of the second input signal.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: May 8, 2007
    Assignee: Intel Corporation
    Inventors: Fabrice Paillet, David J. Rennie, Tanay Karnik, Jianping Xu
  • Patent number: 7181544
    Abstract: Packet processing techniques that can be used, for example, by a network protocol off-load engine. For example, the techniques may be used in an engine that performs transmission control protocol (TCP) operations for received packets for a host.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: February 20, 2007
    Assignee: Intel Corporation
    Inventors: Sriram R. Vangal, Yatin Hoskote, Nitin Y. Borkar, Jianping Xu, Vasantha K. Erraguntla, Shekhar Y. Borkar
  • Patent number: 7169631
    Abstract: A light-emitting device and optical communication system based on the light-emitting device is disclosed. The light-emitting device is formed in a float-zone substrate. The light-emitting device includes on the substrate lower surface a reflective layer and on the upper surface spaced apart doped regions. The portion of the upper surface between the doped regions is textured and optionally covered with an antireflection coating to enhance light emission. The light-emitting device can operate as a laser or as a light-emitting diode, depending on the reflectivities of the antireflection coating and the reflective layer.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: January 30, 2007
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Tanay Karnik, Jianping Xu, Shekhar Y. Borkar
  • Publication number: 20070013414
    Abstract: A voltage droop detector captures the very high-frequency noise on the power grid of a load, such as a microprocessor. The droop detector includes twin circuits, one of which receives the voltage from the power grid of the load, the other of which receives a filtered voltage. A 0th droop, as well as 1st droops, 2nd droops, and so on, are captured and stored for subsequent analysis. The circuits sample the voltages frequently enough to ensure that all droop events are captured. Other embodiments are described and claimed.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 18, 2007
    Inventors: Fabrice Paillet, Tanay Karnik, Jianping Xu, Vivek De
  • Patent number: 7161439
    Abstract: According to some embodiments, a circuit includes a ring oscillator delay stage. The delay stage may include a first transistor, a second transistor, and an active inductor. A gate of the first transistor may receive a first input signal, a gate of the second transistor may receive a second input signal, a source of the second transistor may be coupled to a source of the first transistor, and the active inductor may be coupled to a drain of the first transistor.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: January 9, 2007
    Assignee: Intel Corporation
    Inventors: Fabrice Paillet, Tanay Karnik, Jianping Xu
  • Patent number: 7088138
    Abstract: A CML XOR logic circuit is provided that includes a pair of pull-up transistors, a pair of current source transistors and a logic switch network coupled between the pull-up transistors and the current source transistors. The logic switch network including a plurality of transistors divided into a first branch, a second branch and a third branch. A tail current flows through the first branch, the second branch or the third branch based on at least two input signals to the plurality of transistors.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: August 8, 2006
    Assignee: Intel Corporation
    Inventors: Jianping Xu, Fabrice Paillet, Tanay Karnik
  • Patent number: 7088191
    Abstract: According to some embodiments, a circuit includes a delay stage of a ring oscillator. The delay stage may include a first differential pair, a second differential pair, and a third differential pair. The first differential pair may be coupled to a first current-steering circuit, receive a differential input signal, and output a first differential signal. The second differential pair may receive the differential input signal and output a second differential signal, and the third differential pair may be coupled to a second current-steering circuit, receive the second differential signal from the second differential pair, and output the first differential signal. An amount of delay between the differential input signal and the first differential signal is based on relative amounts of current steered by the first current-steering circuit and the second current-steering circuit.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: August 8, 2006
    Assignee: Intel Corporation
    Inventors: Fabrice Paillet, David Rennie, Tanay Karnik, Jianping Xu
  • Publication number: 20060170481
    Abstract: In general, in one aspect, the disclosure describes an apparatus for shifting a low swing signal. The apparatus includes a first pair of transistors to receive a first input signal and a second input signal and to generate a first output signal that is a shifted version of the first input signal. The apparatus further includes a second pair of transistors to receive the first input signal and the second input signal and to generate a second output signal that is a shifted version of the second input signal.
    Type: Application
    Filed: January 31, 2005
    Publication date: August 3, 2006
    Inventors: Fabrice Paillet, David Rennie, Tanay Karnik, Jianping Xu
  • Publication number: 20060103479
    Abstract: According to some embodiments, a circuit includes a ring oscillator delay stage. The delay stage may include a first transistor, a second transistor, and an active inductor. A gate of the first transistor may receive a first input signal, a gate of the second transistor may receive a second input signal, a source of the second transistor may be coupled to a source of the first transistor, and the active inductor may be coupled to a drain of the first transistor.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 18, 2006
    Inventors: Fabrice Paillet, Tanay Karnik, Jianping Xu
  • Publication number: 20060071722
    Abstract: According to some embodiments, a circuit includes a delay stage of a ring oscillator. The delay stage may include a first differential pair, a second differential pair, and a third differential pair. The first differential pair may be coupled to a first current-steering circuit, receive a differential input signal, and output a first differential signal. The second differential pair may receive the differential input signal and output a second differential signal, and the third differential pair may be coupled to a second current-steering circuit, receive the second differential signal from the second differential pair, and output the first differential signal. An amount of delay between the differential input signal and the first differential signal is based on relative amounts of current steered by the first current-steering circuit and the second current-steering circuit.
    Type: Application
    Filed: September 29, 2004
    Publication date: April 6, 2006
    Inventors: Fabrice Paillet, David Rennie, Tanay Karnik, Jianping Xu
  • Patent number: 7023023
    Abstract: An integrated circuit die includes optical interconnect ports on a first side and electrical interconnect ports on a second side.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: April 4, 2006
    Assignee: Intel Corporation
    Inventors: Tanay Karnik, Jianping Xu