Abstract: Multiple chip module (MCM) structures are described. In an embodiment, a module includes a first and second components on the top side of a module substrate, a stiffener structure mounted on the top side of the module substrate, and a lid mounted on the stiffener structure and covering the first component and the second component. The stiffener is joined to the lid within a trench formed in a roof of the lid.

Abstract: A module comprising: a module substrate; a system-on-chip die coupled to the module substrate; a thermal interface material layer coupled to the system-on-chip die; a stiffener structure positioned around the system-on-chip die and coupled to the module substrate; and a lid having a first portion coupled to the thermal interface material layer, a second portion coupled to the stiffener structure and a recessed region formed around the first portion and having a reduced thickness relative to the first portion and the second portion.

Abstract: Integrated circuit (IC) structure, IC die structures and methods of fabrication are described in which one or more edge recesses are formed in an IC die. Upon direct bonding to an electronic component, a molding compound can be applied to the bonded structure where the molding compound fills the one or more edge recesses and encroached underneath the IC die and between the IC die and the electronic component.

Abstract: Integrated circuit (IC) structures, electronic modules, and methods of fabrication are described in which direct bonded interfaces are removed at corners or edges to counteract the potential for non-bonding or delamination. This can be accomplished during singulation, in which a side recess is formed through an entire thickness of an electronic component and into a direct bonded die, followed by final singulation of the IC structure.

Abstract: Electronic packages and electronic systems are described in which a package redistribution layer of the electronic package includes structural features such a via line connections to reduce stress concentration, particularly when the package redistribution layer is formed of organic dielectric materials.

Abstract: Systems and methods are provided for facilitating account login, wherein the method is implemented by a first server that is associated with a first account. In some embodiments, the method comprises receiving, from a terminal device, a request to log into a second account associated with a second server, wherein the request includes a first identifier associated with the first account and a second identifier associated with the second server. The method further comprises generating account information to be transmitted to the second server based on the first identifier; and transmitting the account information to the second server based on the second identifier; wherein the transmission of the account information enables the second account to be automatically logged into at the second server.

Abstract: Modules and methods of assembly are described. A module includes a lid mounted on a module substrate and covering a component. A stiffener structure may optionally be mounted between the lid and module substrate. A recess can be formed in any of an outer wall bottom surface of the lid, and top or bottom surface of the stiffener structure such that an adhesive layer at least partially fills the recess.

Abstract: Microelectronic structures with selectively applied underfill material and/or edge bond material are described. In an embodiment, isolated underfill regions and/or edge bond regions are applied to adjacent to one or more edges of an electronic device and form a plurality of vent openings along the one or more edges.

Abstract: Multi-chip systems and structures for modular scaling are described. In some embodiments an interfacing bar is utilized to couple adjacent chips. For example, a communication bar may utilized to coupled logic chips, and memory bar may be utilized to couple multiple memory chips to a logic chip.

Abstract: Multi-chip systems and structures for modular scaling are described. In some embodiments an interfacing bar is utilized to couple adjacent chips. For example, a communication bar may utilized to coupled logic chips, and memory bar may be utilized to couple multiple memory chips to a logic chip.

Abstract: Microelectronic packages and methods of fabrication are described. In an embodiment, a redistribution layer spans across multiple components, and includes a region of patterned wiring traces that may mitigate stress in the RDL between the multiple components.

Abstract: Multiple chip module (MCM) structures are described. In an embodiment, a module includes a first and second components on the top side of a module substrate, a stiffener structure mounted on the top side of the module substrate, and a lid mounted on the stiffener structure and covering the first component and the second component. The stiffener is joined to the lid within a trench formed in a roof of the lid.