Abstract: The present inventive concept relates to area-selective deposition (ASD) area-selective atomic layer deposition (AS-ALD) processes, and applications thereof. Methods of selectively depositing metal oxides and metal oxynitrides, such as TiO2 and TiON, on nitride (SiN) as a growth area vs. oxide (SiO2) as a nongrowth area, and applications thereof in, for example, self-aligned block (SAB) patterning and self-aligned multiple patterning (SAMP) processes are described.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over a first portion of the fin structure, and an epitaxial region formed in a second portion of the fin structure. The epitaxial region can include a first semiconductor layer and an n-type second semiconductor layer formed over the first semiconductor layer. A lattice constant of the first semiconductor layer can be greater than that of the second semiconductor layer.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a gate structure over the substrate, a source/drain (S/D) contact structure adjacent to the gate structure, a layer of dielectric material over the S/D contact structure, a conductor layer over and in contact with the layer of dielectric material and above the S/D contact structure, and an interconnect structure over and in contact with the conductor layer.

Abstract: A first aspect relates to a computer-implemented method for performing model compression. The method includes compressing a machine learning (ML) network model comprising a multiple layer structure to produce a compressed ML network model. The compressed ML network model maintains the multiple layer structure of the ML network model. The method generates a model file for the compressed ML network model. The model file includes the compressed ML network model and decoding information for enabling the ML network model to be decompressed and executed layer-by-layer.

Abstract: The present disclosure discloses a preparation method of fatty acid-based VC liposomes, and belongs to the field of pharmaceutical preparations. In the disclosure, a complex of industrial conjugated linoleic acid and other fatty acids with sodium dodecyl sulfate is taken as a capsule material, which is self-assembled to embed vitamin C in an aqueous phase under an acidic condition (pH<7) to form the fatty acid-based vitamin C liposome. The preparation method of the disclosure does not use organic solvents and other substances harmful to the human body, and has the characteristics of safety and health. In addition to VC encapsulation under the acidic condition, the prepared fatty acid-based liposome can play a role in slowly releasing VC.

Abstract: The invention relates to a multi-component composition for the manufacture of polyurethane/urea cementitious hybrid system, comprising at least one isocyanate component selected from the group consisting of monoisocyanate, polyisocyanate and NCO terminated prepolymer, at least one polyol, water, catalyst, at least one acidic additive, and hydraulic binder, wherein the acidic additive is at least one selected from the group consisting of Lewis acids, acid precursors and acidic buffers and is in an amount of 0.01 to 3 wt %, based on the total weight of the composition, to the preparation thereof, and to the use of the composition for the preparation of a flooring, waterproofing, screed, grouting, primer, wall paint, roofing or coating in construction applications.

Abstract: The present disclosure describes a semiconductor device and methods for forming the same. The semiconductor device includes nanostructures on a substrate and a source/drain region in contact with the nanostructures. The semiconductor device also includes a gate structure that includes first and second portions. The first portion is formed between each nanostructure of nanostructures. The second portion is formed under the bottom-most nanostructure of the plurality of nanostructures and extends under a top surface of the substrate.

Abstract: A method of manufacturing a semiconductor device includes forming a plurality of work function metal layers and an oxygen absorbing layer over a channel region of the semiconductor device, including forming a first work function metal layer over the channel region, forming an oxygen absorbing layer over the first work function metal layer, forming a second work function metal layer over the oxygen absorbing layer. A gate electrode metal layer is formed over the plurality of work function metal layers. The work function metal layers, oxygen absorbing layer, and gate electrode metal layer are made of different materials.

Abstract: Provided is a new compound capable of effectively inhibiting ATX. The compound is represented by formula I, or the compound is a tautomer, a stereoisomer, a hydrate, a solvate, a salt, or a prodrug of the compound represented by formula I. In formula (I), R1 and R2 are independently selected from —H or —CH3, provided that: R1 and R2 are not —H at the same time or are not —CH3 at the same time.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a gate structure over the substrate, a source/drain (S/D) contact structure adjacent to the gate structure, a layer of dielectric material over the S/D contact structure, a conductor layer over and in contact with the layer of dielectric material and above the S/D contact structure, and an interconnect structure over and in contact with the conductor layer.

Abstract: Techniques are disclosed relating to a graphical user interface (GUI) that is operable to depict data lineage information in levels. In some embodiments, data lineage information may specify a directed graph that is indicative of a data lineage associated with a plurality of data elements. For example, in the data lineage information, the plurality of data elements may be represented as a corresponding plurality of nodes and, in the directed graph, the plurality of nodes may be connected by edges in a manner that is indicative of the data lineage relationships between the plurality of data elements. In various embodiments, the disclosed techniques may generate a data lineage GUI that, for a selected data element of the plurality of elements, is usable to navigate different levels of the data lineage in an upstream and downstream direction relative to a particular level of the selected data element.

Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.

Abstract: A method of manufacturing a semiconductor device includes forming a plurality of work function metal layers and an oxygen absorbing layer over a channel region of the semiconductor device, including forming a first work function metal layer over the channel region, forming an oxygen absorbing layer over the first work function metal layer, forming a second work function metal layer over the oxygen absorbing layer. A gate electrode metal layer is formed over the plurality of work function metal layers. The work function metal layers, oxygen absorbing layer, and gate electrode metal layer are made of different materials.

Abstract: A dishwasher is provided. The dishwasher has an inner container, a frame and a door body. The inner container has an accommodation cavity. The accommodation cavity has a forward-facing opening. The frame is connected to an outer surface of the inner container and extends along an edge of the opening of the accommodation cavity. A sealing groove is defined in the frame. Alternatively, the sealing groove is defined by enclosing the frame and the edge of the opening of the inner container. A sealing strip is disposed in the sealing groove. A door body is configured to open or close the opening of the accommodation cavity. The door body abuts against the sealing strip in response to the opening of the accommodation cavity being covered by the door body.

Abstract: The present disclosure describes semiconductor devices and methods for forming the same. A semiconductor device includes nanostructures over a substrate and a source/drain region in contact with the nanostructures. The source/drain region is doped with a first-type dopant. The semiconductor device also includes a counter-doped structure in contact with the substrate and the source/drain region. The counter-doped structure is doped with a second-type dopant opposite to the first-type dopant.

Abstract: The present disclosure describes a semiconductor device and methods for forming the same. The semiconductor device includes nanostructures on a substrate and a source/drain region in contact with the nanostructures. The semiconductor device also includes a gate structure that includes first and second portions. The first portion is formed between each nanostructure of nanostructures. The second portion is formed under the bottom-most nanostructure of the plurality of nanostructures and extends under a top surface of the substrate.

Abstract: GAAFET threshold voltages are tuned by introducing dopants into a channel region. In a GAAFET that has a stacked channel structure, dopants can be introduced into multiple channels by first doping nano-structured layers adjacent to the channels. Then, by an anneal operation, dopants can be driven, from surfaces of the doped layers into the channels, to achieve a graduated dopant concentration profile. Following the anneal operation and after the dopants are diffused into the channels, depleted doped layers can be replaced with a gate structure to provide radial control of current in the surface-doped channels.

Abstract: The present disclosure describes a semiconductor device with counter-doped nanostructures and a method for forming the semiconductor device. The method includes forming a fin structure on a substrate, the fin structure including one or more first-type nanostructures and one or more second-type nanostructures. The method further includes forming a polysilicon structure over the fin structure and forming a source/drain (S/D) region on a portion of the fin structure and adjacent the polysilicon structure, the S/D region including a first dopant. The method further includes doping the one or more second-type nanostructures with a second dopant via a space released by the polysilicon structure and the one or more first-type nanostructures, where the second dopant is opposite to the first dopant. The method further includes replacing portions of the one or more doped second-type nanostructures with additional second-type nanostructures.

Abstract: Prostamide-containing biodegradable intraocular implants, prostamide compounds, prostamide-containing pharmaceutical compositions, and methods for making and using such implants and compositions for the immediate and sustained reduction of intraocular pressure and treatment of glaucoma in an eye of a patient are described.

Abstract: A dishwasher is provided. The dishwasher has an inner container, a frame and a door body. The an inner container has an accommodation cavity. The accommodation cavity has an forward-facing opening. The frame is connected to an outer surface of the inner container and extends along an edge of the opening of the accommodation cavity. A sealing groove is defined in the frame. Alternatively, the sealing groove is defined by enclosing the frame and the edge of the opening of the inner container. A sealing strip is disposed in the sealing groove. A door body is configured to open or close the opening of the accommodation cavity. The door body abuts against the sealing strip in response to the opening of the accommodation cavity being covered by the door body.