Abstract: Devices and techniques are generally described for a speech processing routing architecture. In various examples, first data comprising a first feature definition is received. The first feature definition may include a first indication of first source data and first instructions for generating feature data using the first source data. In various examples, the feature data may be generated according to the first feature definition. In some examples, a speech processing system may receive a first request to process a first utterance. The feature data may be retrieved from a non-transitory computer-readable memory. The speech processing system may determine a first skill for processing the first utterance based at least in part on the feature data.

Abstract: The present disclosure relates to an adhesive film. Specifically, according to an embodiment of the present disclosure, there may be provided an adhesive film including: a guide film including a first area and a second area surrounding the first area; and an adhesive layer disposed on the first area, wherein the first area has a shape corresponding to a shape of the adhesive layer, wherein a cut-out portion disposed on a position adjacent to the adhesive layer is provided within a circumference of the second area.

Abstract: A display device is disclosed. The display device includes a display panel, a vapor chamber positioned behind the display panel, a board, which is positioned behind the vapor chamber and is coupled to the vapor chamber, and an adhesive member disposed between the display panel and the vapor chamber so as to be coupled thereto, wherein the vapor chamber includes a first plate, which defines a front surface thereof and faces the display panel, a second plate, which defines a rear surface thereof and is coupled to the first plate, and fluid flowing in a space defined between the first plate and the second plate, and wherein the first plate includes a coupler, which is depressed rearwards from the first plate and to which the adhesive member is coupled.

Abstract: A display device includes: a substrate; an organic insulating layer on the substrate and having an opening; a first electrode on the organic insulating layer; an auxiliary electrode on the organic insulating layer and including a first portion overlapping the opening; a bank layer having a first bank opening overlapping the first electrode and a second bank opening overlapping the first portion; an intermediate layer on the first electrode and the auxiliary electrode, the intermediate layer including a hole exposing a portion of the auxiliary electrode; and a second electrode on the intermediate layer, overlapping the first electrode and the auxiliary electrode, and in contact with the auxiliary electrode through the hole in the intermediate layer. The hole in the intermediate layer only partially overlaps the opening in the organic insulating layer and is located within the second bank opening in a plan view.

Abstract: Methods and apparatuses for edge computing services are provided, and a method of caching, by an edge data network, data from a service server includes obtaining information about a location of a terminal from a 3rd Generation Partnership Project (3GPP) network, generating movement information of the terminal in a region of interest based on information about correspondence between the information about the location of the terminal and a configured region of interest, and caching data from the service server, the data being determined based on the movement information of the terminal in the region of interest and a configured cache rule.

Abstract: A method by a first base station comprises receiving a message including information related to a sum of traffic loads of user equipment and information related to a location of a second base station from second base stations, identifying a sum of traffic loads transmitted from the second base stations, to the UEs, identifying whether the identified sum of the traffic loads is larger than a sum of data rates for the corresponding UEs of the corresponding second base stations located in the specific first area, when the identified sum of the traffic loads is larger than the sum of the data rates, identifying a specific UE to be operated as a second base station among the corresponding UEs located in the specific first area, and transmitting information indicating that the specific UE is to operate as the second base station to the specific UE.

Abstract: A semiconductor package includes a substrate, a first semiconductor chip disposed on the substrate, and a second semiconductor chip disposed on a top surface of the first semiconductor chip. The first semiconductor chip includes a conductive pattern disposed on the top surface of the first semiconductor chip and a first protective layer covering the top surface of the first semiconductor chip and at least partially surrounds the conductive pattern. The second semiconductor chip includes a first pad that contacts a first through electrode on a bottom surface of the second semiconductor chip. A second protective layer surrounds the first pad and covers the bottom surface of the second semiconductor chip. A third protection layer fills a first recess defined in the second protective layer to face the inside of the second protective layer. The first protective layer and the third protective layer contact each other.

Abstract: A semiconductor package including a base chip; a semiconductor chip having a lower surface on which connection pads are disposed, the semiconductor chip being mounted on an upper surface of the base chip; a plurality of bumps on the connection pads and electrically connecting the base chip to the semiconductor chip; an adhesive film between the base chip and the semiconductor chip and fixing the semiconductor chip to the base chip; and an encapsulant on the base chip and encapsulating the semiconductor chip, wherein the semiconductor chip includes a central portion spaced apart from the upper surface of the base chip by a first distance, and an edge portion spaced apart from the upper surface of the base chip by a second distance, the edge portion being outside of the central portion, and a ratio of the second distance to the first distance is about 0.8 to about 1.0.

Abstract: A phase locked loop includes a phase detector outputting a first signal corresponding to a phase difference of a reference frequency signal and a division frequency signal, a charge pump amplifying a first signal to output a second signal, a loop filter filtering the second signal to output a third signal, a voltage-to-current converter receiving the third signal and outputting a fourth signal, a digital-to-analog converter outputting a fifth signal based on the fourth signal and a digital compensation signal, an oscillator outputting an output frequency signal having a frequency corresponding to the fifth signal, a divider dividing the frequency of the output frequency signal to output the division frequency signal and a compensation frequency signal, and an automatic frequency calibrator compensating for the voltage-to-current converter based on a difference between a frequency of the compensation frequency signal and a frequency of a reference frequency signal.

Abstract: A semiconductor device may include: first to n-th through-electrodes; first to n-th through-electrode driving circuits suitable for charging the first to n-th through-electrodes to a first voltage level, or discharging the first to n-th through-electrodes to a second voltage level; and first to n-th error detection circuits, each suitable for storing the first voltage level or the second voltage level of a corresponding through-electrode of the first to n-th through-electrodes as a down-detection signal and an up-detection signal, and outputting a corresponding error detection signal of first to n-th error detection signals by sequentially masking the down-detection signal and the up-detection signal.

Abstract: A semiconductor package and a method of forming the same are provided. The semiconductor package includes one or a plurality of chips on a substrate, bumps disposed below each of the one or plurality of chips, an underfill material layer on the substrate, on a side surface of each of the bumps, and extending to side surfaces of the one or plurality of chips, and a mold layer on the substrate and contacting the underfill material layer. The underfill material layer includes a first side portion, a second side portion on the first side portion and having a slope, steeper than a slope of the first side portion, and a third side portion on the second side portion and having a slope that is less steep than a slope of the second side portion.

Abstract: A semiconductor device and a data storage system including the same are provided. The semiconductor device includes a lower structure including a semiconductor substrate, a circuit element on the semiconductor substrate, a circuit interconnection structure on the semiconductor substrate, the circuit interconnection structure including a plurality of connection patterns on different levels and electrically connected to the circuit element, and a lower insulating structure covering the circuit element and the circuit interconnection structure; and an upper structure including an upper substrate in contact with an upper surface of the lower insulating structure, a stack structure on the upper substrate, the stack structure including interlayer insulating layers and gate electrodes alternately stacked in a vertical direction, and a vertical memory structure penetrating through the stack structure in the vertical direction.

Abstract: A light emitting devices includes a first electrode, a hole transport region on the first electrode, a first emission layer on the hole transport region, the first emission layer to emit light of a first wavelength, a second emission layer on the hole transport region and to emit light of a second wavelength, an electron transport region on the first and second emission layers, and a second electrode on the electron transport region. The first emission layer includes a first sub-emission layer including a first hole transport host and a first sub-dopant to emit the light of the first wavelength, and a second sub-emission layer including a first electron transport and a second sub-dopant to emit the light of the first wavelength. The second emission layer includes a second hole transport host, a second electron transport host, and a second dopant to emit the light of the second wavelength.

Abstract: Provided are a heterocyclic compound, a light-emitting device including the heterocyclic compound, and an electronic apparatus including the light-emitting device. The heterocyclic compound is represented by Formula 1, which is explained in the specification. The light-emitting device is capable of maintaining efficiency and color expression at constant levels.

Abstract: Provided is a polycyclic compound and a light emitting element including the polycyclic compound. The light emitting element includes a first electrode, a second electrode facing the first electrode, light emitting structures disposed between the first electrode and the second electrode, and a charge generation layer disposed between adjacent ones of the light emitting structures and including a polycyclic compound represented by Formula 1, thereby exhibiting high luminous efficiency.

Abstract: A light emitting device includes: a first electrode; a hole transport region disposed on the first electrode; a first emission layer disposed on the hole transport region, and which emits light of a first wavelength; a second emission layer disposed on the hole transport region, and which emits light of a second wavelength different from the first wavelength; an electron transport region disposed on the first emission layer and the second emission layer; a second electrode disposed on the electron transport region; and a capping layer disposed on the second electrode. In exit light emitted to an upper surface of the capping layer, the exit light has a maximum intensity at an azimuth angle of about 25° to about 35°.

Abstract: A recirculating aquaculture system using a biofloc fermenter and aquaponics may include a breeding water tank that breeds farmed fish, a drum filter that filters breeding water drained from the recirculating aquaculture system; an automatic filtration system in which the breeding water of the drum filter is moved and purified; a biofloc fermentation system that supplies and mixes oxygen to backwash water of the automatic filtration system; and a plant cultivation system that cultivates plant with the breeding water mixed with stable and high-concentration oxygen moved from the biofloc fermentation system.

Abstract: A semiconductor package includes a base chip and at least one semiconductor chip disposed on the base chip. An adhesive film is disposed between the base chip and the at least one semiconductor chip and is configured to fix the at least one semiconductor chip on the base chip. The adhesive film includes an inner film portion that overlaps the at least one semiconductor chip in a thickness direction of the base chip, and an outer film portion that does not overlap the at least one semiconductor chip in the thickness direction of the base chip. A width of the outer film portion in a direction perpendicular to a lateral edge of the at least one semiconductor chip is substantially uniform within a deviation range of 20% of an average width of the outer film portion.

Abstract: A method and an apparatus for compressing the three-dimensional data of a point cloud are disclosed. The present invention comprises, identifying a plurality of points constituting a point cloud, and projecting the plurality of identified points onto a projection plane so as to generate a projection image, wherein the bit number of projection points corresponding to the plurality of points projected in the projection image is determined on the basis of the distance between a first point closest to the projection plane and a second point farthest therefrom, on a normal with respect to the projection plane, among the plurality of points and/or on the basis of the number of intermediate points located between the first point and the second point.

Abstract: A battery pack includes: a plurality of battery cells, each including a negative electrode and a positive electrode, the positive and negative electrodes being arranged on a same side of the battery cell; a substrate arranged on the plurality of battery cells and including a first surface and a second surface located on opposite sides of the substrate, and a through hole exposing the negative electrode and the positive electrode of each of the plurality of battery cells; a first conductive plate arranged on the first surface of the substrate and including a first hole; and a second conductive plate arranged on the second surface of the substrate and including a second hole.