Abstract: An apparatus for controlling an activation period of a word line of a volatile memory device is disclosed. The apparatus adjusts the activation period of the word line using a member for adjusting a pulse width of a pulse signal that activates the word line according to an operation mode of the volatile memory device.

Abstract: Provided is a frequency lock detector which includes one counter and a clock number difference detector for detecting a clock number difference while not increasing complexity according to the counting number N to compare the frequencies of two clock signals whose phases are not synchronous to each other and determine whether the difference between the frequencies of the two signals is within a desired frequency accuracy. The frequency lock detector includes: a counter for counting the number of clocks of a reference clock signal inputted from outside; a clock number difference detector for detecting a difference between the clock number of the reference clock signal and the clock number of a recovered clock signal whose phase is not synchronous to the phase of the reference clock signal; and a lock determiner for determining a frequency lock based on result values of the counter and the clock number difference detector.

Abstract: Disclosed is a power transmission apparatus for a wind generator having an electric generator connected to an apparatus rotor by a main shaft. The electric generator includes a generator rotor and a generator stator. The electric generator may be assembled to the main shaft via the generator rotor, but the generator stator is not assembled to the main shaft. Instead, the generator stator is connected to a stator housing fixed to bearing housings respectively provided on a pair of bearings disposed on an outer surface of a rotor bearing. The rotor bearing is disposed perpendicular to a vertical rotor frame, is formed integrally with the generator rotor, and is connected to an outer surface of the main shaft. The apparatus permits the generator stator to be assembled with a circumference of the generator rotor. The apparatus provides increased convenience and efficiency in assembly.

Abstract: A semiconductor memory device that generates a data strobe reset signal for preventing ring-back of a data strobe signal, and an operation method thereof. The semiconductor memory device includes a pulse signal generating unit for generating first and second pulse signals by synchronizing a write instruction with first and second internal clock signals, a reset signal generating unit for generating a reset signal having an activation width setup in response to the first and second pulse signals, and a data strobe reset signal generating unit for generating a data strobe reset signal by shifting the second pulse signal as much as a predetermined burst length and limiting an activation period of the data strobe reset signal in response to the reset signal.

Abstract: A semiconductor memory device using system clock with a high frequency can maintain a constant margin of operation even with a changed operating environment including voltage level, temperature, and process. The semiconductor memory device includes a data output control circuit configured to control data outputted in synchronization with a falling edge of a system clock using a first output source signal corresponding to a rising edge of the system clock, and to control data outputted in synchronization with the rising edge of the system clock using a second output source signal corresponding to a falling edge of the system clock, and a data output circuit configured to output data, the data output circuit being controlled by the data output control circuit.

Abstract: Provided are a flexible bit rate code vector generation method and a wideband vocoder employing the same. This invention implements a flexible bit rate by getting three code vectors which are composed of 24, 16, and 8 pulses, at a time in a search process, through improvement of an algebraic codebook search process in a wideband AMR-WB vocoder. The method includes the steps of: performing a preprocess, wherein the preprocess divides a sub-frame by tracks and decides a pulse position having a maximum value in each track; among a plurality of pulses to be searched, fixing a same number of pulses as the tracks to the position with the maximum value of each track sequentially, and searching optimal positions having a minimum error with a target signal by combining two pulses in two consecutive tracks for the remaining pulses; and creating a code vector with flexible bit rate.

Abstract: The invention provides a dual band transmitter available for a mobile communication terminal such as mobile phone, in which a first RF amplifier 111 amplifies the power of a high band signal BS1 at a first amplification factor that is determined according to a first bias voltage. A second RF amplifier 121 amplifies the power of a low band signal BS2 at a second amplification factor determined according to a second bias voltage. A first coupling capacitor C11 couples an output signal from the first RF amplifier 111. A second coupling capacitor C21 couples an output signal from the second RF amplifier 121. A filtering coupler 140 has a high pass filter FT1 for a first coupled signal from the first coupling capacitor C11 and a low pass filter FT2 for a second coupled signal from the second coupling capacitor C21.

Abstract: Provided are a mixer and a transceiver having the mixer. The mixer includes: an local oscillation (LO) differential signal generator converting an input LO signal into a differential signal; and a mixing unit receiving the LO differential signal as a first input and a first signal having a first frequency as a second input and performing differential amplification on the LO differential signal and the first signal to output a second signal having a second frequency.

Abstract: A transit structure of a standard waveguide and a dielectric waveguide is related to connecting the dielectric dielectric waveguide to the standard waveguide. The transit structure includes: a cavity to match the dielectric waveguide and the standard waveguide, wherein the dielectric waveguide and the standard waveguide are orthogonal to each other to connect. The transit structure drastically reduces a design time by simply implementing a transit structure by using only a dielectric waveguide, a cavity and a standard waveguide on a dielectric substrate and remarkably reduces a size thereof in comparison with a conventional transit structure since all designs are finished in the size of a metal waveguide.

Abstract: Provided is a mode transition circuit for transferring a RF signal and a transceiver module having the same. The mode transition circuit includes: a planar transmission line mounted at a RF substrate for receiving a RF signal from a RF signal generating unit; a via formed inside the RF substrate and connected to one side of the planar transmission line for receiving the RF signal from the planar transmission line; at least one of metal patches formed inside the RF substrate and connected to the one side of the via for receiving the RF signal from the via; and a hole formed inside a low frequency substrate and connected to one side of the metal patch for receiving the RF signal from the metal patch.

Abstract: Provided are a layout method of a power line for a semiconductor integrated circuit and a semiconductor integrated circuit manufactured by the layout method. The layout method includes the steps of: forming a decoupling capacitor on a substrate; laying out a first metal layer, connected to the decoupling capacitor through a contact, above a region where the decoupling capacitor is formed so as to cover the decoupling capacitor; and laying out a second metal layer above a region where the first metal layer is formed. Therefore, the metal layers and the decoupling capacitor are laid out in the same region so that a chip area can be prevented from being additionally consumed at the time of laying out the decoupling capacitor, and degradation which may occur due to connection line resistance from the power lines to the decoupling capacitors can be prevented.

Abstract: Disclosed is a wind turbine, in which the assembly of a rotor and a stator of a generator with a main shaft connecting a turbine rotor and the generator is completed only by assembling the rotor of the generator with the main shaft without assembling the stator of the generator with the main shaft. In the wind turbine, a rotor bearing being perpendicular to a vertical rotor frame is formed integrally with the rotor of the generator and is connected to the outer surface of the main shaft, a pair of electric bearings is disposed at the outer surface of the rotor bearing, and the stator of the generator is assembled with the rotor of the generator by fixing a stator housing to bearing housings of the electric bearings. Thereby, convenience and efficiency in assembly are increased.

Abstract: Provided is an Inductor-Capacitor (LC) quadrature Voltage Controlled Oscillator (VCO) having a startup circuit which can accurately select one of +90° and ?90° as a phase difference between two clocks generated by the LC quadrature VCO by embodying the startup circuit therein by using a phase detector and a controller.

Abstract: Provided is a replica bias circuit which is suitable for multi-layer stacked CMOS current mode logic (CML) and is stably used in application fields using a low power supply voltage. The replica bias circuit applies a reference voltage to gates of target transistors constituting an electronic circuit. The replica bias circuit includes a sub threshold voltage generator for maintaining a voltage difference lower than a threshold voltage of the transistor; and a replica path including devices designed by referring to dimensions of constituent devices forming a current flow path, the current flow path including the target transistors in the electronic circuit. With the replica bias circuit, multi-layer stacked CMOS current mode logic (CML) circuits can stably operate even at a low power supply voltage.

Abstract: A circuit for generating an output enable signal in a semiconductor memory apparatus which can include an interval setting unit capable of delaying a burst length signal in synchronized with a clock, thereby generating an interval setting signal, and a signal generating unit for generating an output enable signal in response to a read command signal and the interval setting signal.

Abstract: Provided are an apparatus for controlling power management of a DSP (Digital Signal Processor) and a power management system and method using the same. The power management system includes a command decoding device for decoding a program into which a PSM (Power Saving Mode) command and a general command are inserted and transmitting module information required for execution of a corresponding command to a power management control apparatus at the time of decoding the corresponding command; a pipeline control device for blocking and restarting the transmission of data through a pipeline upon receipt of a pipeline control signal (pipeline stall) from the power management control device; and the power management control apparatus for controlling power in respective modules by setting/resetting corresponding bits of a PSM status register and a PSM flag register in accordance with the PSM command and the general command decoded in the command decoding device.

Abstract: Provided is a quadrature voltage controlled oscillator having only one resonant mode characteristic. The quadrature voltage controlled oscillator has a structure in which two clocks generated from respective LC resonant circuits are 90 degrees out of phase with each other using a phase detector and a loop filter, instead of a general structure in which two LC tank resonant circuits are mutually coupled to constitute an LC quadrature voltage controlled oscillator. The quadrature voltage controlled oscillator includes two resonant circuits having the same oscillation frequency; and a phase controller receiving oscillation clocks of the two resonant circuits to control at least one of oscillation phases of the two resonant circuits according to a phase difference between the two oscillation clocks.

Abstract: Provided is an Inductor-Capacitor (LC) quadrature Voltage Controlled Oscillator (VCO) having a startup circuit which can accurately select one of +90° and ?90° as a phase difference between two clocks generated by the LC quadrature VCO by embodying the startup circuit therein by using a phase detector and a controller.

Abstract: A waveform interpolation speech coding apparatus and method for reducing complexity thereof are disclosed. The waveform interpolation speech coding apparatus includes: a waveform interpolation encoding unit for receiving a speech signal, calculating parameters for a waveform interpolation from the received speech signal, and quantizing the calculating parameters; and a realignment parameter calculating unit for restoring a characteristic waveform (CW) using the quantized parameter, calculating a realignment parameter that maximizes a cross-correlation among consecutive CWs for the restored CW.

Abstract: A bit line sense amplifier control circuit includes a driving signal generating unit adapted and configured to generate first through third driving signals in response to a bit line sense amplifier enable signal and an overdrive enable signal for setting an overdrive period, and to disable a first driving signal which is enabled for an overdrive period in response to a refresh signal which is enabled at a refresh mode, and a bit line sense amplifier control signal generating unit adapted and configured to generate first and second bit line sense amplifier control signals in response to the first through third driving signals. As a result, an overdrive pulse is not generated at a refresh mode to remove an overdriving period, thereby reducing current consumption at a refresh mode.