Patents by Inventor Jin BYUN

Jin BYUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8120433
    Abstract: Provided are a multi-output oscillator using a single oscillator, and a method of generating multiple outputs. The multi-output oscillator includes: an oscillator outputting the single frequency; a multiplier multiplying the single frequency to output a first frequency; a first frequency divider dividing the single frequency by a first division factor; a first mixer outputting a second frequency by mixing an output of the first frequency divider and an output of the multiplier; a second frequency divider dividing the single frequency by a second division factor; a second mixer mixing the output of the second frequency divider and the output of the first mixer to output a third frequency; and a third mixer mixing the output of the second frequency divider and the output of the multiplier to output a fourth frequency.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: February 21, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seon Kim, Woo-Jin Byun, Min-Soo Kang, Bong-Su Kim, Tae-Jin Chung, Myung-Sun Song
  • Publication number: 20120020172
    Abstract: A data strobe signal generating device includes a preamble controller configured to generate a preamble signal enabled in synchronization with a first dock signal and disabled in synchronization with a second clock signal after an output enable signal is enabled, and a data strobe signal output unit configured to generate a data strobe signal in response to the preamble signal.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 26, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Hee Jin BYUN
  • Publication number: 20120002493
    Abstract: An output enable signal generation circuit of a semiconductor memory includes: a latency signal generation unit configured to generate a latency signal for designating activation timing of a data output enable signal in response to a read signal and a CAS latency signal; and a data output enable signal generation unit configured to control the activation timing and deactivation timing of the data output enable signal in response to the latency signal and a signal generated by shifting the latency signal based on a burst length (BL).
    Type: Application
    Filed: December 28, 2010
    Publication date: January 5, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventor: Hee Jin BYUN
  • Publication number: 20110292740
    Abstract: A semiconductor device includes a data alignment unit configured to align serial input data in response to a data strobe signal, a data latching unit configured to latch an output signal of the data alignment unit in response to first and second synchronization pulse signals which are activated according to BL information during a write operation, and a data output unit configured to output an output signal of the data latching unit to a plurality of global data lines in response to a data input strobe signal corresponding to the BL information.
    Type: Application
    Filed: November 18, 2010
    Publication date: December 1, 2011
    Inventors: Hee-Jin Byun, Jong-Chern Lee
  • Publication number: 20110249769
    Abstract: Provided is a method and apparatus improving a deterioration of a gain flatness and a phase characteristic that may be incurred while a baseband signal is transformed into a immediate frequency (IF) signal and a radio frequency (RF) signal in a broadband wireless communication system. A sub-band extractor may divide the broadband signal into multiple sub-band signals, may pre-compensate for a gain and a phase delay of each sub-band signals in the baseband, and may combine the pre-compensated sub-band signals into the single broadband signal and thus, the deterioration of the gain flatness and a phase delay flatness that may be incurred while the broadband signal is transformed into the IF signal and the RF to signal, may be improved.
    Type: Application
    Filed: December 21, 2010
    Publication date: October 13, 2011
    Applicants: Soongsil University Research Consortium Techno-park, ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Min Soo Kang, Chong-Hoon Kim, Woo Jin Byun, Kwang Seon Kim, Bong-Su Kim, Myung Sun Song
  • Publication number: 20110241956
    Abstract: Provided is a high gain Cassegrain antenna. The antenna includes a feed unit that radiates radio waves, a subreflector that faces a radiation surface of the feed unit and reflects the radiated radio waves, and a main reflector that has a plurality of hole scatterers of different depths facing the subreflector and reflecting again the radio waves reflected from the subreflector. Accordingly, it is possible to manufacture a high-gain broadband antenna at low costs.
    Type: Application
    Filed: May 12, 2009
    Publication date: October 6, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Woo-Jin Byun, Young-Heul Cho, Myung-Sun Song, Bong-Su Kim, Kwang-Seon Kim, Min-Soo Kang
  • Patent number: 8031553
    Abstract: A data strobe signal generating device includes a preamble controller configured to generate a preamble signal enabled in synchronization with a first clock signal and disabled in synchronization with a second clock signal after an output enable signal is enabled, and a data strobe signal output unit configured to generate a data strobe signal in response to the preamble signal.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: October 4, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hee-Jin Byun
  • Patent number: 8010814
    Abstract: Provided are an apparatus for controlling power management of a DSP (Digital Signal Processor) and a power management system and method using the same. The power management system includes a command decoding device for decoding a program into which a PSM (Power Saving Mode) command and a general command are inserted and transmitting module information required for execution of a corresponding command to a power management control apparatus at the time of decoding the corresponding command; a pipeline control device for blocking and restarting the transmission of data through a pipeline upon receipt of a pipeline control signal (pipeline stall) from the power management control device; and the power management control apparatus for controlling power in respective modules by setting/resetting corresponding bits of a PSM status register and a PSM flag register in accordance with the PSM command and the general command decoded in the command decoding device.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: August 30, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyung-Jin Byun, Bon-Tae Koo, Nak-Woong Eum
  • Publication number: 20110200951
    Abstract: Disclosed is a method of removing a photoresist pattern, which includes radiating light onto a substrate having a photoresist pattern formed thereon and implanted with a predetermined dopant so that the temperature of the substrate is increased to be equal to or higher than a temperature able to remove the photoresist pattern, and by which the photoresist pattern formed on the substrate can be almost completely removed using a simple process for radiating light onto the substrate so that the temperature of the substrate is increased to be equal to or higher than a temperature able to the photoresist pattern.
    Type: Application
    Filed: February 10, 2011
    Publication date: August 18, 2011
    Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Dong-Jin Byun, Sam-Seok Jang, Bum-Joon Kim, Jung-Geun Jhin, Sang-Il Kim, Do-Han Lee
  • Patent number: 7994879
    Abstract: Provided is an apparatus for transitioning a millimeter wave between dielectric waveguide and transmission line using a millimeter wave transition structure formed by the dielectric waveguide, the transmission line, and a slot to transition a signal with lower losses. The apparatus includes: transmission lines disposed respectively at input and output terminals on an uppermost dielectric substrate in a signal transition direction and adapted to transition a signal; a dielectric waveguide formed by a via array disposed between top and bottom ground surfaces of a lowermost dielectric substrate in the signal transition direction as a signal transition path; and slots disposed at a signal transition path of an upper ground surface of each dielectric substrate to connect the transmission lines to the dielectric waveguide so as to transition a signal from the transmission line of the input terminal to the transmission line of the output terminal through the dielectric waveguide.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: August 9, 2011
    Assignee: Electronics and Telecommunication Research Institute
    Inventors: Bong-Su Kim, Woo-Jin Byun, Kwang-Seon Kim, Myung-Sun Song
  • Patent number: 7994851
    Abstract: A PSK demodulator using a time-to-digital converter includes: a filter unit that performs band pass filtering on a PSK signal; an amplitude limiting unit that limits the amplitude of an output signal of the filter unit; a clock signal generating unit that generates a clock signal; and a time-to-digital converter that samples the phase of an output signal of the amplitude limiting unit according to the clock signal and outputs a digital signal having a value corresponding to the phase of the PSK signal. Power consumption can be reduced and a circuit implementation can be simplified.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: August 9, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Jin Byun, Jae Hoon Shim, Hyun Kyu Yu
  • Patent number: 7977223
    Abstract: A method of forming a nitride semiconductor through ion implantation and an electronic device including the same are disclosed. In the method, an ion implantation region composed of a line/space pattern is formed on a substrate at an ion implantation dose of more than 1E17 ions/cm2 to 5E18 ions/cm2 or less and an ion implantation energy of 30˜50 keV, and a metal nitride thin film is grown on the substrate by epitaxial lateral overgrowth, thereby decreasing lattice defects in the metal nitride thin film. Thus, the electronic device has improved efficiency.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: July 12, 2011
    Assignee: Korea University Industrial & Academic Collaboration Foundation
    Inventors: Dong-Jin Byun, Bum-Joon Kim, Jung-Geun Jhin, Jong-Hyeob Baek
  • Publication number: 20110158025
    Abstract: A semiconductor device includes a sensing unit configured to sense whether a value of a programming sensing node is within a predefined range, a fuse connected to the programming sensing node, a programming voltage supplying unit configured to supply a programming voltage to the programming sensing node, and a transferring unit configured to transfer the value of the programming sensing node in response to the sensing result of the sensing unit.
    Type: Application
    Filed: December 29, 2009
    Publication date: June 30, 2011
    Inventors: Jin-Youp CHA, Sang-Jin BYUN
  • Publication number: 20110150131
    Abstract: An apparatus for processing a digital transmission signal for a transmitter includes a transmission Finite Impulse Response (FIR) filter to perform shaping on initial setting data to convert the initial setting data into a signal having a predetermined passband, a comparator to compare the signal with data including degradation information provided as feedback by a receiver corresponding to the transmitter, to generate a control signal, and a band flatness correction filter to adjust a coefficient of the band flatness correction filter in response to the control signal, and to correct an in-band flatness.
    Type: Application
    Filed: September 15, 2010
    Publication date: June 23, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Min Soo KANG, Woo Jin BYUN, Kwang Seon KIM, Bong-Su KIM, Myung Sun SONG
  • Publication number: 20110153995
    Abstract: Disclosed are an arithmetic apparatus including MAC calculation, and a DSP structure and a filtering method using the same. The arithmetic apparatus includes: first and second registers storing one or more pieces of n-bit data (n is a natural number); a third register storing one or more pieces of 2n bit data; a multiplier having a first input terminal connected to the first register, a second input terminal connected to the second and third registers, and multiplying an input value of the first input terminal and that of the second input terminal; and an arithmetic-logic unit (ALU) having a first input terminal connected to an output terminal of the multiplier and a second input terminal feedback-connected to an output terminal, adding an input value of the first terminal and that of the second terminal, and having the output terminal connected to the third register.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 23, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kyung Jin BYUN, Seong Mo Park, Nak Woong Eum
  • Publication number: 20110128096
    Abstract: A system for modifying a hairpin filter is provided which includes a structure transformer to divide a hairpin filter into a plurality of filters and to arrange the plurality of filters in a bilaterally symmetrical pattern, and a coupling generator to generate a plurality of coupling lines, each of the plurality of coupling lines being between each of the filters.
    Type: Application
    Filed: June 30, 2010
    Publication date: June 2, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Bong-Su KIM, Kwang Seon Kim, Min Soo Kang, Woo Jin Byun, Myung Sun Song
  • Publication number: 20110128802
    Abstract: A semiconductor memory device includes: a first strobe signal generation unit configured to generate a first rising strobe signal in response to a rising DLL clock signal; a second strobe signal generation unit configured to generate a second rising strobe signal in response to a falling DLL clock signal, the second rising strobe signal having an opposite phase to the first rising strobe signal and being activated at the same timing as the first rising strobe signal; a third strobe signal generation unit configured to generate a first falling strobe signal in response to the falling DLL clock signal; and a fourth strobe signal generation unit configured to generate a second falling strobe signal in response to the rising DLL clock signal, the second falling strobe signal having an opposite phase to the first falling strobe signal and being activated at the same timing as the first falling strobe signal.
    Type: Application
    Filed: December 28, 2009
    Publication date: June 2, 2011
    Inventor: Hee-Jin BYUN
  • Publication number: 20110103164
    Abstract: A semiconductor memory device includes a plurality of data transmission lines, a plurality of parallel-to-serial conversion sections configured to receive, serially align, and output data from at least two of the plurality of data transmission lines, a plurality of data compression circuits configured to receive, compress, and output outputs of at least two of the plurality of parallel-to-serial conversion sections, and a plurality of data output circuits configured to output respective compression results of the plurality of data compression circuits to an outside of a chip.
    Type: Application
    Filed: December 24, 2009
    Publication date: May 5, 2011
    Inventors: Jae-Woong YUN, Jong-Chern Lee, Hee-Jin Byun
  • Publication number: 20110073183
    Abstract: Disclosed are a reflect-array lens (or a planar lens) and a solar cell module having the same. The reflect-array lens for a solar cell includes: a planar dielectric substrate having a first permittivity, wherein a plurality of recesses are formed on one surface of the planar dielectric substrate and filled with a dielectric having a second permittivity different from the first permittivity. The reflect-array lens can be easily fabricated and has an excellent concentration degree, and the solar cell module having the reflect-array lens has improved photoelectric conversion efficiency.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 31, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATION RESEARCH INSTITUTE
    Inventors: Woo Jin BYUN, Min Soo Kang, Kwang Seon Kim, Bong Su Kim
  • Patent number: 7911292
    Abstract: Provided is a mode transition circuit for transferring a RF signal and a transceiver module having the same. The mode transition circuit includes: a planar transmission line mounted at a RF substrate for receiving a RF signal from a RF signal generating unit; a via formed inside the RF substrate and connected to one side of the planar transmission line for receiving the RF signal from the planar transmission line; at least one of metal patches formed inside the RF substrate and connected to the one side of the via for receiving the RF signal from the via; and a hole formed inside a low frequency substrate and connected to one side of the metal patch for receiving the RF signal from the metal patch.
    Type: Grant
    Filed: November 24, 2006
    Date of Patent: March 22, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Woo-Jin Byun, Kwang-Seon Kim, Bong-Su Kim, Ki-Chan Eun, Myung-Sun Song