Patents by Inventor Jin Chae

Jin Chae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180253004
    Abstract: Disclosed herein are a photosensitive resin composition and an organic insulating film prepared therefrom. By optimizing the weight average molecular weight of a copolymer, and using a specific solvent in the photosensitive resin composition, a coated film obtained therefrom may have high planarity property and patterns with high resolution. Accordingly, the photosensitive resin composition may be used as a material for an organic insulating film simultaneously functioning as white pixels.
    Type: Application
    Filed: August 31, 2016
    Publication date: September 6, 2018
    Inventors: Jung-Hwa Lee, Ju-Young Jung, Seung-Ho Kwon, Seung-Keun Kim, Yu-Jin Chae
  • Publication number: 20180246595
    Abstract: A digitizer in which a touch sensing electrode of a self-capacitive type touch sensor and a first electrode of the digitizer are formed on the same layer is provided. The digitizer according to the present invention has a high level of pressure sensing and a simplified manufacturing process.
    Type: Application
    Filed: February 22, 2018
    Publication date: August 30, 2018
    Applicant: DONGWOO FINE-CHEM CO., LTD.
    Inventors: Seung Jin CHAE, Yoonho HUH, Byung Jin CHOI
  • Publication number: 20180246608
    Abstract: A digitizer in which a second electrode of the digitizer is formed in a non-patterned portion of a touch sensing electrode of a mutual-capacitive type touch sensor is provided. The digitizer according to the present invention has a high level of pressure sensing, a simplified manufacturing process, and excellent visibility.
    Type: Application
    Filed: February 22, 2018
    Publication date: August 30, 2018
    Applicant: DONGWOO FINE-CHEM CO., LTD.
    Inventors: Yoonho HUH, Seung Jin CHAE, Byung Jin CHOI
  • Publication number: 20180239478
    Abstract: A flexible digitizer comprising a flexible substrate and a first and a second electrodes having thicknesses of 2000 ? to 1 ?m is provided. The digitizer according to the present invention has sufficient flex resistance for application to a flexible display device with superior electrical characteristics and visibility.
    Type: Application
    Filed: February 14, 2018
    Publication date: August 23, 2018
    Applicant: DONGWOO FINE-CHEM CO., LTD.
    Inventors: Seung Jin CHAE, Yoonho HUH, Byung Jin CHOI
  • Patent number: 9935194
    Abstract: A 3D semiconductor integrated circuit device and a method of manufacturing the same are provided. An active pillar is formed on a semiconductor substrate, and an interlayer insulating layer is formed so that the active pillar is buried in the interlayer insulating layer. The interlayer insulating layer is etched to form a hole so that the active pillar and a peripheral region of the active pillar are exposed. An etching process is performed on the peripheral region of the active pillar exposed through the hole by a certain depth, and a space having the depth is provided between the active pillar and the interlayer insulating layer. A silicon material layer is formed to be buried in the space having the depth, and an ohmic contact layer is formed on the silicon material layer and the active pillar.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: April 3, 2018
    Assignee: SK Hynix Inc.
    Inventors: Jin Ha Kim, Jun Kwan Kim, Kang Sik Choi, Su Jin Chae, Young Ho Lee
  • Patent number: 9877922
    Abstract: Disclosed is a process of preparing sustained release microspheres, containing a biodegradable polymer as a carrier and a drug, using spray drying. The process comprises preparing a solution, suspension or emulsion containing a biodegradable polymer, a drug and a solvent; spray drying the solution, suspension or emulsion; and suspending spray-dried microspheres in an aqueous solution containing polyvinyl alcohol to remove the residual solvent and increase the hydrophilicity of the microsphere surface. The process enables the preparation of microspheres having high drug encapsulation efficiency, almost not having a toxicity problem due to the residual solvent, and having good syringeability. The microspheres prepared according to the present invention release an effective concentration of a drug in a sustained manner for a predetermined period when administered to the body, and are thus useful in the treatment of diseases.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: January 30, 2018
    Assignees: Peptron Co., Ltd., Daewoong Pharmaceutical Co., Ltd.
    Inventors: Hee-Yong Lee, Jung-Soo Kim, Eun-Ho Shin, Seong-Kyu Kim, Eun-Young Seol, Mi-Jin Baek, Mi-Young Baek, Yeon-Jin Chae, Ho-Il Choi, Juhan Lee
  • Publication number: 20170152704
    Abstract: A rainwater guide device is coupled to an outer side of the rail portion to be adjacent to the rainwater drainage hole, wherein the rainwater guide device includes a rainwater receiving portion defined at one closed side end thereof to receive the rainwater from the drainage hole and having an open top, and a rainwater outlet defined at the other open side end thereof, wherein the bottom plate includes a tilted plate tilted downwards from the rainwater receiving portion to the rainwater outlet in a longitudinal direction thereof, and two rainwater guide plates, each guide plate having a first side coupled to the tilted plate and a second side coupled to a corresponding longitudinal side plate, wherein each of the rainwater guide plates is tilted downwardly from the second side to the first side.
    Type: Application
    Filed: June 28, 2016
    Publication date: June 1, 2017
    Inventor: Hyun Jin CHAE
  • Publication number: 20170104154
    Abstract: A variable resistive memory device may include a phase change region, a phase change layer, a gap-filling layer and an upper electrode. The phase change region may have a sidewall and a bottom surface. The phase change layer may have a linear shape extended along the bottom surface and the sidewall of the phase change region. The gap-filling layer may be formed in a portion of the phase change region surrounded by the phase change layer. The upper electrode may be formed on the phase change layer and the gap-filling layer.
    Type: Application
    Filed: January 6, 2016
    Publication date: April 13, 2017
    Inventors: Hyung Keun KIM, Byoung Ki LEE, Su Jin CHAE
  • Publication number: 20170084740
    Abstract: A 3D semiconductor integrated circuit device and a method of manufacturing the same are provided. An active pillar is formed on a semiconductor substrate, and an interlayer insulating layer is formed so that the active pillar is buried in the interlayer insulating layer. The interlayer insulating layer is etched to form a hole so that the active pillar and a peripheral region of the active pillar are exposed. An etching process is performed on the peripheral region of the active pillar exposed through the hole by a certain depth, and a space having the depth is provided between the active pillar and the interlayer insulating layer. A silicon material layer is formed to be buried in the space having the depth, and an ohmic contact layer is formed on the silicon material layer and the active pillar.
    Type: Application
    Filed: December 6, 2016
    Publication date: March 23, 2017
    Inventors: Jin Ha KIM, Jun Kwan KIM, Kang Sik CHOI, Su Jin CHAE, Young Ho LEE
  • Patent number: 9543401
    Abstract: A 3D semiconductor integrated circuit device and a method of manufacturing the same are provided. An active pillar is formed on a semiconductor substrate, and an interlayer insulating layer is formed so that the active pillar is buried in the interlayer insulating layer. The interlayer insulating layer is etched to form a hole so that the active pillar and a peripheral region of the active pillar are exposed. An etching process is performed on the peripheral region of the active pillar exposed through the hole by a certain depth, and a space having the depth is provided between the active pillar and the interlayer insulating layer. A silicon material layer is formed to be buried in the space having the depth, and an ohmic contact layer is formed on the silicon material layer and the active pillar.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: January 10, 2017
    Assignee: SK Hynix Inc.
    Inventors: Jin Ha Kim, Jun Kwan Kim, Kang Sik Choi, Su Jin Chae, Young Ho Lee
  • Patent number: 9508828
    Abstract: A method of fabricating an array substrate includes forming a first metal layer, a gate insulating material layer and an oxide semiconductor material layer on a substrate; heat-treating the substrate having the oxide semiconductor material layer at a temperature of about 300 degrees Celsius to about 500 degrees Celsius; patterning the oxide semiconductor material layer, the gate insulating material layer and the first metal layer, thereby forming a gate electrode, a gate insulating layer and an oxide semiconductor layer; forming a gate line connected to the gate electrode and made of low resistance metal material; forming source and drain electrodes, a data line and a pixel electrode, the source and drain electrodes and the data line having a double-layered structure of a transparent conductive material layer and a low resistance metal material layer, the pixel electrode made of the transparent conductive material layer.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: November 29, 2016
    Assignee: LG Display Co., Ltd.
    Inventors: Ki-Sul Cho, Jin-Chae Jeon
  • Publication number: 20160224922
    Abstract: Disclosed herein are a system and method for evaluating the performance of infrastructure, in which a condition rating according to a result of a survey targeting experts is expressed as a sequentially distributed probability distribution function using a fuzzy membership function and a comprehensive performance measure score is more accurately expressed as a probability distribution function, thereby accurately evaluating a comprehensive performance measure rating. Also, a utility value is derived using a utility function and usable and functional evaluation measures for each facility of the infrastructure are collected, thereby comprehensively determining subjective performance evaluation measures of the infrastructure.
    Type: Application
    Filed: January 28, 2016
    Publication date: August 4, 2016
    Applicant: KOREA INSTITUTE OF CIVIL ENGINEERING AND BUILDING TECHNOLOGY
    Inventors: Myung Jin CHAE, Tae Il PARK
  • Patent number: 9404090
    Abstract: The invention relates to a cell line in which an expression construct is introduced into genomic DNA, the expression construct including: (a) a promoter operable in animal cells and heterologous to adenoviruses; and (b) a modified adenovirus El coding gene sequence of SEQ ID NO: 32 operatively linked to the promoter. The cell line of the invention is less likely to produce a replication competent adenovirus (RCA). The adenovirus producing cell line of the invention has a low possibility of producing RCA due to homologous recombination, when compared with conventional cell lines. Therefore, this makes it possible to regulate the required amount of virus during gene therapy using the adenovirus and prevent tissue damage and toxic effects caused by overproduction of the adenovirus. Also, the cell line of the invention shows superior adenovirus producing ability, as compared with an HEK 293 cell which is one of conventional adenovirus producing cell lines.
    Type: Grant
    Filed: November 22, 2012
    Date of Patent: August 2, 2016
    Assignee: VIROMED CO., LTD.
    Inventors: Seung Shin Yu, Chang-Wan Joo, Jin-A Chae, Yeon Suk Cha
  • Patent number: 9306166
    Abstract: A fabrication method of a resistance variable memory apparatus includes forming an amorphous phase-change material layer on a semiconductor substrate in which a bottom structure is formed, and performing crystallization on the amorphous phase-change material layer through a low-temperature plasma treatment process.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: April 5, 2016
    Assignee: SK Hynix Inc.
    Inventors: Jun Kwan Kim, Young Ho Lee, Su Jin Chae
  • Publication number: 20160072059
    Abstract: A phase-change memory device including a phase-change region divided into multi layers and an operation method thereof are provided. The device includes a first phase-change layer to which a current is provided from a heating electrode, and a second phase-change layer formed with continuity to the first phase-change layer and having a different width from the first phase-change layer, and to which a current is provided from the heating electrode. The first and second phase-change layers include materials selected from a first group consisting of GeTe, GST415, GST315, GST225, GST124, GST147, and GST172 or a second group consisting of InSbSe, SnGeSe, GST, SnSbSe, and SiSbSe. The second phase-change layer includes a material different from the first phase-change layer, which is selected from the same group as the first phase-change layer and has smaller resistivity than the first phase-change layer.
    Type: Application
    Filed: November 13, 2015
    Publication date: March 10, 2016
    Inventors: Jin Hyock KIM, Su Jin CHAE, Young Seok KWON, Hae Chan PARK
  • Publication number: 20160042960
    Abstract: A 3D semiconductor integrated circuit device and a method of manufacturing the same are provided. An active pillar is formed on a semiconductor substrate, and an interlayer insulating layer is formed so that the active pillar is buried in the interlayer insulating layer. The interlayer insulating layer is etched to form a hole so that the active pillar and a peripheral region of the active pillar are exposed. An etching process is performed on the peripheral region of the active pillar exposed through the hole by a certain depth, and a space having the depth is provided between the active pillar and the interlayer insulating layer. A silicon material layer is formed to be buried in the space having the depth, and an ohmic contact layer is formed on the silicon material layer and the active pillar.
    Type: Application
    Filed: November 13, 2014
    Publication date: February 11, 2016
    Inventors: Jin Ha KIM, Jun Kwan KIM, Kang Sik CHOI, Su Jin CHAE, Young Ho LEE
  • Patent number: 9155702
    Abstract: A controlled-release composition and controlled-release microspheres containing an exendin as an active ingredient, and a method of preparing the same are provided. More specifically, a controlled-release composition containing an exendin as an active ingredient, a biodegradable polymer with a specific viscosity, and coating materials, having high bioavailability and showing sustained release of the active ingredient in an effective concentration for a certain period without an excessive initial burst of the active ingredient; controlled-release microspheres containing a core including an exendin as an active ingredient and a biodegradable polymer, and a coating layer coating the core; and a method of preparing controlled-release microspheres including the steps of mixing an exendin, a biodegradable polymer, and a solvent, removing the solvent from the mixture to prepare hardened microspheres, and coating the hardened microspheres to form a coating layer on the surface of each microsphere, are provided.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: October 13, 2015
    Assignee: PEPTRON CO., LTD
    Inventors: Hee-Yong Lee, Eun-Young Seol, Joon-Sik Kim, Mi-Jin Baek, Jung-Soo Kim, Ju-Han Lee, Yeon-Jin Chae, Chae-Jin Lim, Mi-Young Baek, Ho-Il Choi
  • Publication number: 20150263282
    Abstract: A method for fabricating a semiconductor apparatus includes setting a semiconductor substrate in a process chamber, increasing an internal temperature of the process chamber to a predetermined temperature for pyrolyzing a source gas, supplying the source gas to the inside of the process chamber and pyrolyzing ions of the source gas to remain on the semiconductor substrate, and forming the ohmic contact layer by supplying a reaction gas to the inside of the process chamber, wherein the reaction gas is reacted with non-metal ions pyrolyzed from source gas.
    Type: Application
    Filed: June 4, 2014
    Publication date: September 17, 2015
    Inventors: Yong Hun SUNG, Kwon HONG, Su Jin CHAE, Hyun Seok KANG, Ji Won MOON
  • Patent number: 9006073
    Abstract: A semiconductor memory device and a fabrication method thereof capable of improving electric contact characteristic between an access device and a lower electrode are provided. The semiconductor memory device includes an access device formed in a pillar shape on a semiconductor substrate, a first conductive layer formed over the access device, a protection layer formed on an edge of the first conductive layer to a predetermined thickness, and a lower electrode connected to the first conductive layer.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: April 14, 2015
    Assignee: SK Hynix Inc.
    Inventors: Su Jin Chae, Jin Hyock Kim, Young Seok Kwon
  • Patent number: 8948300
    Abstract: Provided is a method and a device for precoding in a wireless communication system. The method for precoding comprises the following steps: generating a first precoding matrix, W1, for deciding the transmission power of one transmission antenna from a plurality of transmission antennas as the maximum power per antenna; generating a zero forcing (ZF) precoding matrix, Ti, which does not influence the transmission antenna having the power which is decided as the maximum power per antenna, based on the (i?1)th precoding matrix Wi?1 (i=2, 3, . . . ); determining ?i, a constant which has the transmission power of one transmission antenna from the rest of the transmission antennas, which do not have the transmission power as the maximum power per antenna, based on the Ti; and generating the ith precoding matrix Wi based on the Ti and the ?i.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: February 3, 2015
    Assignees: LG Electronics Inc., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Ki Jun Kim, Sung Yoon Cho, Dong Ku Kim, Jin Young Jang, Byoung Hoon Kim, Hyuk Jin Chae