Patents by Inventor Jin-Gyun Kim

Jin-Gyun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060097299
    Abstract: A semiconductor device includes a capacitor having a bottom electrode, a dielectric layer formed on the bottom electrode, a top electrode formed on the dielectric layer, and a contact plug having a metal that is connected with the top electrode, wherein the top electrode includes a doped poly-Si1-xGex layer and a doped polysilicon layer epitaxially deposited on the doped poly-Si1-xGex layer and the contact plug makes a contact with the doped polysilicon layer.
    Type: Application
    Filed: October 24, 2005
    Publication date: May 11, 2006
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Young Ahn, Jin-Tae Noh, Hee-Seok Kim, Jin-Gyun Kim, Ju-Wan Lim, Sang-Ryol Yang, Hong-Suk Kim, Sung-Hae Lee
  • Patent number: 6962876
    Abstract: A method for forming a low-k dielectric layer for a semiconductor device using an ALD process including (a) forming predetermined interconnection patterns on a semiconductor substrate, (b) supplying a first and a second reactive material to a chamber having the substrate therein, thereby adsorbing the first and second reactive materials on a surface of the substrate, (c) supplying a first gas to the chamber to purge the first and second reactive materials that remain unreacted, (d) supplying a third reactive material to the chamber, thereby causing a reaction between the first and second materials and the third reactive material to form a monolayer, (e) supplying a second gas to the chamber to purge the third reactive material that remains unreacted in the chamber and a byproduct; and (f) repeating (b) through (e) a predetermined number of times to form a SiBN ternary layer having a predetermined thickness on the substrate.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: November 8, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Young Ahn, Jin-Gyun Kim, Hee-Seok Kim, Jin-Tae No, Sang-Ryol Yang, Sung-Hae Lee, Hong-Suk Kim, Ju-Wan Lim, Young-Seok Kim, Yong-Woo Hyung, Man-Sug Kang
  • Publication number: 20050224983
    Abstract: A semiconductor structure includes a material layer on a substrate and to be patterned, an amorphous carbon layer on the material layer to be patterned, an N-free anti-reflective layer on the amorphous carbon layer, and a photoresist layer on the N-free anti-reflective layer. The N-free anti-reflective layer contains SiCXOYHZ as a main element. Related methods of patterning semiconductor structures also are provided.
    Type: Application
    Filed: October 26, 2004
    Publication date: October 13, 2005
    Inventors: Won-jin Kim, Hyun Park, Chang-seob Kim, Mun-jun Kim, Hye-min Kim, Jin-gyun Kim
  • Publication number: 20050159017
    Abstract: The present invention provides nitrogenous compositions for forming a silicon nitride layer, wherein the nitrogenous composition comprises a hydrazine compound, an amine compound or a mixture thereof. The present invention further provides source compositions for forming a silicon nitride layer, wherein the source composition comprises a nitrogenous composition comprising a hydrazine compound, an amine compound or a mixture thereof, and a silicon source comprising hexachlorodisilane. Methods for forming silicon nitride layers are further provided. The silicon nitride layers provided herein may be formed on a substrate at a low temperature and may further exhibit improved breakdown voltage and an enhanced etch resistance.
    Type: Application
    Filed: January 7, 2005
    Publication date: July 21, 2005
    Inventors: Jin-Gyun Kim, Jae-Young Ahn, Hee-Seok Kim, Ju-Wan Lim
  • Publication number: 20050148201
    Abstract: A method for forming a low-k dielectric layer for a semiconductor device using an ALD process including (a) forming predetermined interconnection patterns on a semiconductor substrate, (b) supplying a first and a second reactive material to a chamber having the substrate therein, thereby adsorbing the first and second reactive materials on a surface of the substrate, (c) supplying a first gas to the chamber to purge the first and second reactive materials that remain unreacted, (d) supplying a third reactive material to the chamber, thereby causing a reaction between the first and second materials and the third reactive material to form a monolayer, (e) supplying a second gas to the chamber to purge the third reactive material that remains unreacted in the chamber and a byproduct; and (f) repeating (b) through (e) a predetermined number of times to form a SiBN ternary layer having a predetermined thickness on the substrate.
    Type: Application
    Filed: November 5, 2004
    Publication date: July 7, 2005
    Inventors: Jae-Young Ahn, Jin-Gyun Kim, Hee-Seok Kim, Jin-Tae No, Sang-Ryol Yang, Sung-Hae Lee, Hong-Suk Kim, Ju-Wan Lim, Young-Seok Kim, Yong-Woo Hyung, Man-Sug Kang
  • Publication number: 20050095857
    Abstract: Forming a semiconductor device can include forming an insulating layer on a semiconductor substrate including a conductive region thereof, wherein the insulating layer has a contact hole therein exposing a portion of the conductive region. A polysilicon contact plug can be formed in the contact hole wherein at least a portion of the polysilicon contact plug is doped with an element having a diffusion coeffient that is less than a diffusion coefficient of phosphorus (P). Related structures are also discussed.
    Type: Application
    Filed: November 4, 2004
    Publication date: May 5, 2005
    Inventors: Eun-Ae Chung, Myoung-Bum Lee, Young-Pil Kim, Jin-Gyun Kim, Bean-Jun Jin
  • Patent number: 6858529
    Abstract: Forming a semiconductor device can include forming an insulating layer on a semiconductor substrate including a conductive region thereof, wherein the insulating layer has a contact hole therein exposing a portion of the conductive region. A polysilicon contact plug can be formed in the contact hole wherein at least a portion of the polysilicon contact plug is doped with an element having a diffusion coeffient that is less than a diffusion coefficient of phosphorus (P). Related structures are also discussed.
    Type: Grant
    Filed: May 19, 2003
    Date of Patent: February 22, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Ae Chung, Myoung-Bum Lee, Young-Pil Kim, Jin-Gyun Kim, Bean-Jun Jin
  • Publication number: 20040149211
    Abstract: A deposition apparatus is disclosed for depositing a layer on a substrate such as a semiconductor wafer. The deposition apparatus may include a process chamber, and a susceptor in the process chamber with the susceptor being configured to receive a substrate for depositing a thin layer thereon. The deposition apparatus may also include a showerhead on a side of the process chamber with the showerhead being configured to receive reaction gases and to introduce the reaction gases into the process chamber. The showerhead may include a heating element therein for heating reaction gases prior to introducing the reaction gases into the reaction chamber. Related methods are also discussed.
    Type: Application
    Filed: July 17, 2003
    Publication date: August 5, 2004
    Inventors: Jae-Young Ahn, Myoung-Bum Lee, Jin-Gyun Kim
  • Publication number: 20040000693
    Abstract: Forming a semiconductor device can include forming an insulating layer on a semiconductor substrate including a conductive region thereof, wherein the insulating layer has a contact hole therein exposing a portion of the conductive region. A polysilicon contact plug can be formed in the contact hole wherein at least a portion of the polysilicon contact plug is doped with an element having a diffusion coeffient that is less than a diffusion coefficient of phosphorus (P). Related structures are also discussed.
    Type: Application
    Filed: May 19, 2003
    Publication date: January 1, 2004
    Inventors: Eun-Ae Chung, Myoung-Bum Lee, Young-Pil Kim, Jin-Gyun Kim, Bean-Jun Jin