Patents by Inventor Jin Yim

Jin Yim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230331057
    Abstract: The present disclosure discloses a preview vehicle height control system and a method of controlling the same. The system includes a monitoring device configured to detect the road surface condition of a driving path of a vehicle, an active suspension configured to adjust a vehicle height, a memory configured to store a plurality of data maps distinguished based on a type of bump, each data map having a vehicle dynamic characteristic as an input and a tuning factor as an output, and a controller configured to derive the tuning factor based on a data map, among the plurality of data maps of the memory, corresponding to the bump detected by the monitoring device, derive a target vehicle height in a form of a Gaussian distribution by substituting the tuning factor, and control the active suspension to follow the derived target vehicle height.
    Type: Application
    Filed: August 19, 2022
    Publication date: October 19, 2023
    Applicants: Hyundai Motor Company, Kia Corporation, Foundation for Research and Business, Seoul National University of Science and Technology
    Inventors: Youngil SOHN, Min Jun KIM, Sang Woo HWANG, Sehyun CHANG, Jun Ho SEONG, Yong Hwan JEONG, Seong Jin YIM
  • Publication number: 20230303767
    Abstract: A resin includes a unit represented by Chemical Formula 1, a method for preparing the same, a resin composition including the same, and a molded article including the resin composition in Chemical Formula 1, Ar1, Ar2, R1, r1, X1 to X4, Z1, Z2, a and b are described herein.
    Type: Application
    Filed: May 16, 2022
    Publication date: September 28, 2023
    Applicant: LG Chem, Ltd.
    Inventors: Min Suk Jung, Kyeongmun Kim, Jaesoon Bae, Hyeonah Shin, Hye Jin Yim, Il Hwan Choi, Kyeongmin Kim, Bora Shin
  • Publication number: 20230091428
    Abstract: An interposer apparatus for co-packaging an electronic integrated circuit and a photonic integrated circuit may include a dielectric substrate; an optical waveguide disposed on the dielectric substrate to optically couple the photonic integrated circuit disposed on one side of the dielectric substrate with at least one of another photonic integrated circuit disposed on the dielectric substrate or an optical device disposed on the dielectric substrate; and a metal interconnect disposed through the dielectric substrate to electrically couple the photonic integrated circuit disposed on the one side of the dielectric substrate with an electronic integrated circuit disposed on the other side of the dielectric substrate.
    Type: Application
    Filed: November 22, 2022
    Publication date: March 23, 2023
    Inventors: Sang Yup Kim, Myung Jin Yim, Woosung Kim
  • Patent number: 11531174
    Abstract: An interposer apparatus for co-packaging an electronic integrated circuit and a photonic integrated circuit may include a dielectric substrate; an optical waveguide disposed on the dielectric substrate to optically couple the photonic integrated circuit disposed on one side of the dielectric substrate with at least one of another photonic integrated circuit disposed on the dielectric substrate or an optical device disposed on the dielectric substrate; and a metal interconnect disposed through the dielectric substrate to electrically couple the photonic integrated circuit disposed on the one side of the dielectric substrate with an electronic integrated circuit disposed on the other side of the dielectric substrate.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: December 20, 2022
    Assignee: Intel Corporation
    Inventors: Sang Yup Kim, Myung Jin Yim, Woosung Kim
  • Publication number: 20220002666
    Abstract: The present invention provides a Streptomyces sp. SNC087 strain (KCCM12505P) that is isolated from seawater and produces staurosporine, a method for producing staurosporine using the same, a method for culturing the same, and a pure culture medium of the same.
    Type: Application
    Filed: June 18, 2020
    Publication date: January 6, 2022
    Inventors: Grace CHOI, Jeong Min LEE, Mi Jin YIM, Sang Jip NAM
  • Publication number: 20210405306
    Abstract: Semiconductor package with one or more optical die(s) embedded therein is disclosed. The optical die(s) may have one or more overlying interconnect layers. Electrical contact to the optical die may be via the one or more overlying interconnect layers. An optical waveguide may be disposed next to the optical die and embedded within the semiconductor package. An optical fiber may be optically coupled to the optical waveguide.
    Type: Application
    Filed: September 14, 2021
    Publication date: December 30, 2021
    Applicant: Intel Corporation
    Inventors: Vivek RAGHUNATHAN, Myung Jin YIM
  • Patent number: 11156788
    Abstract: Semiconductor package with one or more optical die(s) embedded therein is disclosed. The optical die(s) may have one or more overlying interconnect layers. Electrical contact to the optical die may be via the one or more overlying interconnect layers. An optical waveguide may be disposed next to the optical die and embedded within the semiconductor package. An optical fiber may be optically coupled to the optical waveguide.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: October 26, 2021
    Assignee: Intel Corporation
    Inventors: Vivek Raghunathan, Myung Jin Yim
  • Patent number: 10953593
    Abstract: Various embodiments disclose a molding compound comprising a resin, a filler, and a carbon nano-tube dispersion and methods of forming a package using the molding compound are disclosed. The carbon non-tube dispersion has a number of carbon nano-tubes with surfaces that are chemically modified by a functional group to chemically bridge the surfaces of the carbon nano-tubes and the resin, improving adhesion between the carbon nano-tubes and the resin and reducing agglomeration between various ones of the carbon nano-tubes. The carbon nano-tube dispersion achieves a low average agglomeration size in the molding compound thereby providing desirable electro-mechanical properties and laser marking compatibility. A shallow laser mark may be formed in a mold cap with a maximum depth of less than about 10 microns. Other apparatuses and methods are disclosed.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: March 23, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Myung Jin Yim, Jason M. Brand
  • Patent number: 10923341
    Abstract: A method of forming an oxide layer, the method including forming a first material layer on a semiconductor substrate, the first material layer including a polysiloxane material, wherein, from among Si—H1, Si—H2, and Si—H3 bonds included in the polysiloxane material, a percentage of Si—H2 bonds ranges from about 40% to about 90%, performing a first annealing process on the first material layer in an inert atmosphere, and performing a second annealing process on the first material layer in an oxidative atmosphere.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: February 16, 2021
    Assignees: Samsung Electronics Co., Ltd., Adeka Corporation
    Inventors: Jin-wook Park, Tae-jin Yim, Youn-joung Cho, Hiroshi Morita, Yasuhisa Furihata
  • Patent number: 10748632
    Abstract: A nonvolatile memory device includes multiple memory cells including first memory cells and second memory cells. A method of programming the nonvolatile memory device includes: performing first programming to apply a programming forcing voltage to a bit line of each of the first memory cells; and dividing the second memory cells into a first cell group, a second cell group, and a third cell group, based on a threshold voltage of the second memory cells after performing the first programming. The method also includes performing second programming to apply a programming inhibition voltage to the bit line of each of the first memory cells and a bit line of each of memory cells of the first cell group. A level of the programming forcing voltage is lower than that of the programming inhibition voltage.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: August 18, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Won Yun, Hye-Jin Yim
  • Patent number: 10727368
    Abstract: Optoelectronic device modules having a silicon photonics transmitter die connected to a silicon interposer are described. In an example, the optoelectronic device module includes a silicon photonics transmitter die connected to a silicon interposer, and the silicon interposer is disposed between the silicon photonics transmitter die and a substrate. The silicon interposer provides an electrical interconnect between the silicon photonics transmitter die and the substrate, and reduces a likelihood that a hybrid silicon laser on the silicon photonics transmitter die will be damaged during module operation.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: July 28, 2020
    Assignee: Intel Corporation
    Inventors: Myung Jin Yim, Seungjae Lee, Sandeep Razdan
  • Patent number: 10714194
    Abstract: A method is provided for operating a memory device. The method includes counting, from among memory cells, a number of first off-cells with respect to a first reading voltage and a number of second off-cells with respect to a second reading voltage, comparing the number of first off-cells and the number of second off-cells, and determining, based on a result of the comparing, whether a programming error exists in a storage region in which the memory cells are included.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: July 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hye-Jin Yim, Sang-Yong Yoon
  • Patent number: D889767
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: July 14, 2020
    Assignee: CJ CheilJedang Corporation
    Inventors: Eun Sun Park, Seung Eun Park, Na Ri Shin, Hye Jin Yim, Ki Hwang Park
  • Patent number: D890469
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: July 21, 2020
    Assignee: CJ CheilJedang Corporation
    Inventors: Eun Sun Park, Seung Eun Park, Na Ri Shin, Hye Jin Yim, Ki Hwang Park
  • Patent number: D890470
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: July 21, 2020
    Assignee: CJ CheilJedang Corporation
    Inventors: Eun Sun Park, Seung Eun Park, Na Ri Shin, Hye Jin Yim, Ki Hwang Park
  • Patent number: D891028
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: July 28, 2020
    Assignee: CJ CheilJedang Corporation
    Inventors: Eun Sun Park, Seung Eun Park, Na Ri Shin, Hye Jin Yim, Ki Hwang Park
  • Patent number: D891029
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: July 28, 2020
    Assignee: CJ CheilJedang Corporation
    Inventors: Eun Sun Park, Seung Eun Park, Na Ri Shin, Hye Jin Yim, Ki Hwang Park
  • Patent number: D891030
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: July 28, 2020
    Assignee: CJ CheilJedang Corporation
    Inventors: Eun Sun Park, Seung Eun Park, Na Ri Shin, Hye Jin Yim, Ki Hwang Park
  • Patent number: D891727
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: August 4, 2020
    Assignee: CJ CheilJedang Corporation
    Inventors: Eun Sun Park, Seung Eun Park, Na Ri Shin, Hye Jin Yim, Ki Hwang Park
  • Patent number: D975937
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: January 17, 2023
    Inventors: Kyung-Heui Jin, Eun-Jin Yim