Patents by Inventor Jin Yim

Jin Yim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180127540
    Abstract: Provided are a water-dispersible polyester resin having improved water resistance and chemical resistance, a water-dispersion emulsion containing the resin, and a method for preparing the resin. It is possible to minimize the use of organic solvents to be added to a water-dispersible polyester resin to thereby reduce hazard to a human body, does not create odor by excluding a use of amines, and can prepare a water-dispersion emulsion having excellent coating, adhesive property, and water-dispersion stability without using emulsifiers such as surfactants.
    Type: Application
    Filed: March 23, 2016
    Publication date: May 10, 2018
    Applicant: SK CHEMICALS CO., LTD.
    Inventors: You-jin YIM, Soon-Ki KIM
  • Patent number: 9966132
    Abstract: A method for programming a non-volatile memory device includes programming a lower bit in a memory cell included in the non-volatile memory device, reading the lower bit programmed in the memory cell before programming an upper bit in the memory cell, determining a threshold voltage of the memory cell according to a result of reading the lower bit, determining a type of the memory cell using the threshold voltage, and supplying one of a plurality of pulses to a bit line connected to the memory cell according to the determined type of the memory cell.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: May 8, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hye Jin Yim, Il Han Park, Hyun Kook Park, Sung Won Yun
  • Patent number: 9950464
    Abstract: Various embodiments disclose a molding compound comprising a resin, a filler, and a carbon nano-tube dispersion and methods of forming a package using the molding compound is disclosed. The carbon non-tube dispersion has a number of carbon nano-tubes with surfaces that are chemically modified by a functional group to chemically bridge the surfaces of the carbon nano-tubes and the resin, improving adhesion between the carbon nano-tubes and the resin and reducing agglomeration between various ones of the carbon nano-tubes. The carbon nano-tube dispersion achieves a low average agglomeration size in the molding compound thereby providing desirable electro-mechanical properties and laser marking compatibility. A shallow laser mark may be formed in a mold cap with a maximum depth of less than about 10 microns. Other apparatuses and methods are disclosed.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: April 24, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Myung Jin Yim, Jason M. Brand
  • Publication number: 20180106887
    Abstract: Disclosed is an apparatus for calibrating and validating an MRR, the apparatus including a correlation calculation unit configured to determine a correlation between a precipitation strength value and a precipitation measurement value, a regression equation calculation unit configured to calculate a regression equation for the precipitation strength value and to calculate a result value of the regression equation, an optimum accumulation time determination unit configured to determine an optimum accumulation time based on the correlation and the result value, a rain cloud vertical sampling unit configured to sample a rain cloud example, a vertical reflectance comparison unit configured to compare a calibrated MRR at a shortest range distance with a vertical reflectance according to a wind system, and a radar constant correction unit configured to correct a constant of an MRR based on the optimum value or the sampling and a result value of the comparison.
    Type: Application
    Filed: November 22, 2016
    Publication date: April 19, 2018
    Applicant: Korea Meteorological Administration
    Inventors: Jeong Hwan Choi, Ki-Ho Chang, Jin-Yim Jeong, Ha Young YANG, Miyoung Kang, Baek-Jo Kim
  • Publication number: 20180102167
    Abstract: A method for programming a non-volatile memory device includes programming a lower bit in a memory cell included in the non-volatile memory device, reading the lower bit programmed in the memory cell before programming an upper bit in the memory cell, determining a threshold voltage of the memory cell according to a result of reading the lower bit, determining a type of the memory cell using the threshold voltage, and supplying one of a plurality of pulses to a bit line connected to the memory cell according to the determined type of the memory cell.
    Type: Application
    Filed: April 4, 2017
    Publication date: April 12, 2018
    Inventors: HYE JIN YIM, IL HAN PARK, HYUN KOOK PARK, SUNG WON YUN
  • Publication number: 20180102280
    Abstract: Methods for fabricating semiconductor devices may provide enhanced performance and reliability by recovering quality of a low-k insulating film damaged by a plasma process. A method may include forming a first interlayer insulating film having a trench therein on a substrate, filling at least a portion of the trench with a metal wiring region, exposing a surface of the metal wiring region and a surface of the first interlayer insulating film to a plasma in a first surface treatment process, then exposing the surface of the first interlayer insulating film to a recovery gas containing a methyl group (—CH3) in a second surface treatment process, and then forming an etch stop layer on the metal wiring region and the first interlayer insulating film.
    Type: Application
    Filed: June 29, 2017
    Publication date: April 12, 2018
    Inventors: Viet Ha NGUYEN, Nae In LEE, Thomas OSZINDA, Byung Hee KIM, Jong Min BAEK, Tae Jin YIM
  • Patent number: 9929098
    Abstract: A semiconductor device includes an insulating interlayer on a first region of a substrate. The insulating interlayer has a recess therein and includes a low-k material having porosity. A damage curing layer is formed on an inner surface of the recess. A barrier pattern is formed on the damage curing layer. A copper structure fills the recess and is disposed on the barrier pattern. The copper structure includes a copper pattern and a copper-manganese capping pattern covering a surface of the copper pattern. A diffusion of metal in a wiring structure of the semiconductor device may be prevented, and thus a resistance of the wiring structure may decrease.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: March 27, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae-Jin Yim, Sang-Hoon Ahn, Thomas Oszinda, Jong-Min Baek, Byung Hee Kim, Nae-In Lee, Kee-Young Jun
  • Publication number: 20180082001
    Abstract: Disclosed is a method including a first step for executing, by a numerical simulation execution unit, numerical simulations on an artificial precipitation experiment according to a dispersed seeding material, a second step for calculating, by a spread field information calculation unit, spread field information about the seeding material from the results of the numerical simulations, a third step for calculating, by a point dispersion time range calculation unit, a spread time range of the seeding material for one or more observation points based on the calculated spread field information about the seeding material, and a fourth step for displaying, by a time-series display unit, the spread time range of the seeding material in observation data time series at each of the observation points.
    Type: Application
    Filed: November 22, 2016
    Publication date: March 22, 2018
    Applicant: Korea Meteorological Administration
    Inventors: Ha Young YANG, Ki-Ho Chang, Sanghee Chae, Areum Ko, Seongkyu Seo, Jiwon Choi, Jin-Yim Jeong, Baek-Jo Kim
  • Publication number: 20180076140
    Abstract: Semiconductor devices including an interconnection structure are provided. The devices may include an etch stop layer on a lower structure including a contact structure, a buffer layer on the etch stop layer, an intermetal insulating layer including a low-k dielectric material on the buffer layer. The intermetal insulating layer may include a first region having a first dielectric constant and a second region having a second dielectric constant different from the first dielectric constant. The device may also include interconnection structure including a plug portion electrically connected to the contact structure and an interconnection portion on the plug portion. The plug portion may include a first portion extending through the etch stop layer and a second portion that is in the intermetal insulating layer and has a width greater than a width of the first portion. The interconnection portion may include opposing lateral surfaces surrounded by the intermetal insulating layer.
    Type: Application
    Filed: April 5, 2017
    Publication date: March 15, 2018
    Inventors: Byung Hee KIM, Thomas Oszinda, Deok Young Jung, Jong Min Baek, Tae Jin Yim
  • Patent number: 9900102
    Abstract: Embodiments of the present disclosure provide an apparatus comprising an integrated circuit with a chip-on-chip and chip-on-substrate configuration. In one instance, the apparatus may include an optical transceiver with an opto-electronic component disposed in a first portion of a die, and a trace coupled with the opto-electronic component and disposed to extend to a surface in a second portion of the die adjacent to the first portion, to provide electrical connection for the integrated circuit and another integrated circuit to be coupled with the second portion of the die in a chip-on-chip configuration. The apparatus may include a second trace disposed in the second portion of the die to extend to the surface in the second portion, to provide electrical connection for the other integrated circuit and a substrate to be coupled with the second portion of the die in a chip-on-substrate configuration. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: February 20, 2018
    Assignee: Intel Corporation
    Inventors: Olufemi I. Dosunmu, Myung Jin Yim, Ansheng Liu
  • Publication number: 20180047713
    Abstract: Some forms include an electronic package that includes a photo-detecting receiver IC and a receiver IC. The electronic package includes a mold that encloses the photo-detecting receiver IC and the receiver IC. The photo-detecting receiver IC and the receiver IC are adjacent to one another without touching one another. Other forms include an optical module that includes a substrate and an electronic package mounted on the substrate. The electronic package includes a photo-detecting receiver IC and a receiver IC that are enclosed within a mold. The photo-detecting receiver IC and the receiver IC are adjacent to one another without touching. Other forms include a method that includes forming a mold that includes a photo-detecting receiver IC and a receiver IC that are adjacent to one another without touching. The photo-detecting receiver IC includes optical components that are exposed on a surface of the mold.
    Type: Application
    Filed: March 24, 2015
    Publication date: February 15, 2018
    Inventors: Myung Jin Yim, Jay S. Lee, Jong-Min Hong
  • Patent number: 9893816
    Abstract: Apparatuses including integrated circuit (IC) optical assemblies and processes for operation of IC optical assemblies are disclosed herein. In some embodiments, the IC optical assemblies include a transmitter component to provide light output having a particular beam direction, and a transmitter driver component. The transmitter component includes a light source optically coupled to a plurality of waveguides, a plurality of gratings, and a plurality of phase tuners. The transmitter driver component causes a light provided by the light source to be centered at a particular wavelength and a particular phase to be induced by each phase tuner of the plurality of phase tuners on a respective waveguide of the plurality of waveguides, in accordance with a feedback signal, to generate the light output having the particular beam direction.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: February 13, 2018
    Assignee: Intel Corporation
    Inventors: Woosung Kim, Myung Jin Yim
  • Publication number: 20180041003
    Abstract: Embodiments herein may relate to a chip-on-chip (CoC) package that includes a first integrated circuit (IC) die with an active side coupled with an active side of a second IC die. The CoC package may further include a substrate with a conductive metal post extending from a side of the substrate. An interposer may be positioned between, and coupled with the conductive metal post and the active side of the first IC die such that an area between an inactive side of the second IC die and the substrate is free of the interposer. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: August 8, 2016
    Publication date: February 8, 2018
    Inventors: Juan E. Dominguez, Myung Jin Yim
  • Publication number: 20180032885
    Abstract: Disclosed are a system and method for determining whether to perform airborne glaciogenic seeding experiments through numerical simulations including analyzing weather factors of a target area for airborne glaciogenic seeding experiments, determining whether airborne experiments are possible based on the direction of the wind, the velocity of the wind, temperature and humidity in the target area, determining seeding information by taking into consideration the direction of the wind and the velocity of the wind, performing numerical simulations using the seeding information, displaying and calculating a seeding material spread and distribution field using the results of the numerical simulations, displaying a precipitation increment and a region, and calculating an area, and determining whether a seeding effect is present or not using the displayed and calculated results.
    Type: Application
    Filed: November 22, 2016
    Publication date: February 1, 2018
    Applicant: Korea Meteorological Administration
    Inventors: Sanghee Chae, Ki-Ho Chang, Seongkyu Seo, Jin-Yim Jeong, Baek-Jo Kim
  • Publication number: 20180026163
    Abstract: A light emitting device package, according to an embodiment, includes: a substrate; a light emitting structure that is disposed below the substrate and includes a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a first bonding pad connected with the first conductive type semiconductor layer while being embedded in a through-hole exposed the first conductive type semiconductor layer by passing through the active layer and the second conductive type semiconductor layer; a second bonding pad that is disposed below the second conductive type semiconductor layer while being spaced apart from the first bonding pad and is connected with the second conductive type semiconductor layer; a first insulation layer disposed on the lateral portion of the light emitting structure in the through-hole and on the lower inner edge of the light emitting structure; and a second insulation layer disposed between the first insulation layer and the first bonding pad in the
    Type: Application
    Filed: March 16, 2016
    Publication date: January 25, 2018
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Jae Won SEO, Hoe Jun KIM, Bum Jin YIM, Jun Hee HONG
  • Publication number: 20170308438
    Abstract: A memory device includes a memory cell array including a plurality of memory cells; a counting circuit configured to obtain a counting result by performing a counting operation on data read from the plurality of memory cells; and a control logic configured to perform a data restoring operation based on the counting result without involvement of a memory controller.
    Type: Application
    Filed: December 20, 2016
    Publication date: October 26, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hye-jin YIM, Seung-jae LEE, Il-han PARK, Kang-bin LEE
  • Publication number: 20170301404
    Abstract: A method is provided for operating a memory device. The method includes counting, from among memory cells, a number of first off-cells with respect to a first reading voltage and a number of second off-cells with respect to a second reading voltage, comparing the number of first off-cells and the number of second off-cells, and determining, based on a result of the comparing, whether a programming error exists in a storage region in which the memory cells are included.
    Type: Application
    Filed: June 30, 2017
    Publication date: October 19, 2017
    Inventors: HYE-JIN YIM, SANG-YONG YOON
  • Publication number: 20170288780
    Abstract: Apparatuses including integrated circuit (IC) optical assemblies and processes for fabrication of IC optical assemblies are disclosed herein. In some embodiments, the IC optical assemblies include an optical transmitter component electrically coupled to a first portion of a packaging substrate. The IC optical assemblies further include an optical transmitter driver component between the optical transmitter component and a second portion of the packaging substrate, wherein a first side of the optical transmitter driver component is electrically coupled to the optical transmitter component. The IC optical assemblies further include a plurality of bumps between a second side of the optical transmitter driver component and proximate the second portion of the packaging substrate, wherein the plurality of bumps are not directly coupled to the optical transmitter driver component.
    Type: Application
    Filed: March 31, 2016
    Publication date: October 5, 2017
    Inventors: Myung Jin Yim, Quan A. Tran, SeungJae Lee, Sandeep Razdan, Yigit O. Yilmaz, Pradeep Srinivasan, Jincheng Wang, Ansheng Liu
  • Publication number: 20170277125
    Abstract: Various example embodiments of the present disclosure provide an electronic device including: a housing including a substantially circular opening and a first surface facing in a first direction; a wearing structure configured to enable the electronic device to be removably worn on a part of a human body and connected to the housing; a display disposed in the opening; an annulus installed on the first surface and configured to be rotatable along a periphery of the opining, the annulus including a second surface facing a second direction opposite the first direction; at least one spacer interposed between a part of the first surface and the second surface of the annulus; and a circuit configured to detect a rotation of the annular member and to change the display at least in part based on the rotation.
    Type: Application
    Filed: December 8, 2016
    Publication date: September 28, 2017
    Inventors: Wook-Dam JUNG, Yongcheon KANG, Dong-Jin YIM, Hyun-Seok CHANG, Sanghyuck JUNG, Jeongeun KIM, Byoung-Uk YOON
  • Publication number: 20170279537
    Abstract: Apparatuses including integrated circuit (IC) optical assemblies and processes for operation of IC optical assemblies are disclosed herein. In some embodiments, the IC optical assemblies include a transmitter component to provide light output having a particular beam direction, and a transmitter driver component. The transmitter component includes a light source optically coupled to a plurality of waveguides, a plurality of gratings, and a plurality of phase tuners. The transmitter driver component causes a light provided by the light source to be centered at a particular wavelength and a particular phase to be induced by each phase tuner of the plurality of phase tuners on a respective waveguide of the plurality of waveguides, in accordance with a feedback signal, to generate the light output having the particular beam direction.
    Type: Application
    Filed: March 25, 2016
    Publication date: September 28, 2017
    Inventors: Woosung Kim, Myung Jin Yim