Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed on the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over the fin structure, an epitaxial region formed in the fin structure and adjacent to the gate structure. The epitaxial region can embed a plurality of clusters of dopants.

Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed on the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over the fin structure, an epitaxial region formed in the fin structure and adjacent to the gate structure. The epitaxial region can embed a plurality of clusters of dopants.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over the fin structure, an epitaxial region formed in the fin structure and adjacent to the gate structure. The epitaxial region can embed a plurality of clusters of dopants.

Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.

Abstract: A thin-film device may include a carrier, a release layer, a stacking structure, and a flexible substrate. The release layer may be overlaid on the carrier, and the stacking structure is overlaid on the release layer. The stacking structure may include a first protective layer and a second protective layer, wherein the refractive index of the first protective layer exceeds that of the second protective layer. The flexible substrate may be overlaid on the release layer.

Abstract: A semiconductor device includes a gate, a first electrode, a first insulating layer, an active layer, an etching stop layer, a second insulating layer, a source, a drain and a second electrode. The first insulating layer covers the gate and the first electrode. The active layer and the etching stop layer are disposed on the first insulating layer above the gate and the first electrode respectively. The second insulating layer covers the active layer and the etching stop layer and has a first opening and a second opening exposing the active layer and a third opening exposing the etching stop layer. The source and the drain are disposed on the second insulating layer and contact with the active layer through the first opening and the second opening respectively. The second electrode is located on the second insulating layer and contacts with the etching stop layer through the third opening.

Abstract: An environmental sensitive electronic device package including a first substrate, a second substrate, an environmental sensitive electronic device, a side wall barrier structure, a first adhesive, and a second adhesive is provided. The environmental sensitive electronic device is located on the first substrate. The first adhesive is located on the first substrate. The side wall barrier structure is located on the first adhesive, and the side wall barrier structure is adhered to the first substrate through the first adhesive. The second adhesive is located on the side wall barrier structure. The side wall barrier structure is adhered to the second substrate through the second adhesive, and the side wall barrier structure, the first adhesive, and the second adhesive are located between the first substrate and the second substrate. A manufacturing method of an environmental sensitive electronic device package is also provided.

Abstract: An electronic device including at least one electronic component and a method of manufacturing the same are provided. The electronic device may include a substrate, a semiconductor layer disposed on the substrate, an insulating layer disposed on the semiconductor layer, and a first metal layer disposed on the insulating layer. The insulating layer may have a pattern corresponding to a pattern of the semiconductor layer or the first metal layer. The flexible layer has a Young's modulus less than 40 GPa and is disposed on the substrate to encapsulate the semiconductor layer. At least one first opening penetrates the flexible layer. At least one second metal layer is disposed on the flexible layer and in the first opening and electrically connected to the semiconductor layer.

Abstract: An electronic component and a method for fabricating the electronic component are provided. The electronic component includes a carrier, a first metal layer, a dielectric layer, a semiconductor layer, a flexible layer, at least one first opening, and at least one second metal layer. The first metal layer is disposed on the carrier. The dielectric layer is disposed on the first metal layer, and has a pattern consistent with a pattern of the dielectric layer. The semiconductor layer is disposed on the dielectric layer. The flexible layer is disposed on the carrier and encapsulates the first metal layer, the dielectric layer and the semiconductor layer. The flexible layer has a Young's modulus less than 40 GPa. The first opening penetrates the flexible layer. The second metal layer is disposed on the flexible layer and in the first opening and is electrically connected with the semiconductor layer.

Abstract: An electronic device including at least one electronic component and a method of manufacturing the same are provided. The electronic device may include a substrate, a semiconductor layer disposed on the substrate, an insulating layer disposed on the semiconductor layer, and a first metal layer disposed on the insulating layer. The insulating layer may have a pattern corresponding to a pattern of the semiconductor layer or the first metal layer. The flexible layer has a Young's modulus less than 40 GPa and is disposed on the substrate to encapsulate the semiconductor layer. At least one first opening penetrates the flexible layer. At least one second metal layer is disposed on the flexible layer and in the first opening and electrically connected to the semiconductor layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure may include a substrate, a semiconductor layer, a first conductive layer, a second conductive layer, a first dielectric layer and a second dielectric layer. The first dielectric layer is disposed on the substrate. The second dielectric layer is disposed on the first dielectric layer. The semiconductor layer is adjacent to the first dielectric layer or the second dielectric layer. The semiconductor layer is disposed on the first dielectric layer or the second dielectric layer. The first conductive layer is adjacent to the first dielectric layer or the second dielectric layer. The second conductive layer is disposed on the first dielectric layer or the second dielectric layer. The effective Young's modulus of the second dielectric layer may be smaller than the Young's modulus of the first dielectric layer.

Abstract: A semiconductor device includes a gate, a first electrode, a first insulating layer, an active layer, an etching stop layer, a second insulating layer, a source, a drain and a second electrode. The first insulating layer covers the gate and the first electrode. The active layer and the etching stop layer are disposed on the first insulating layer above the gate and the first electrode respectively. The second insulating layer covers the active layer and the etching stop layer and has a first opening and a second opening exposing the active layer and a third opening exposing the etching stop layer. The source and the drain are disposed on the second insulating layer and contact with the active layer through the first opening and the second opening respectively. The second electrode is located on the second insulating layer and contacts with the etching stop layer through the third opening.

Abstract: An electronic component and a method for fabricating the electronic component are provided. The electronic component includes a carrier, a first metal layer, a dielectric layer, a semiconductor layer, a flexible layer, at least one first opening, and at least one second metal layer. The first metal layer is disposed on the carrier. The dielectric layer is disposed on the first metal layer, and has a pattern consistent with a pattern of the dielectric layer. The semiconductor layer is disposed on the dielectric layer. The flexible layer is disposed on the carrier and encapsulates the first metal layer, the dielectric layer and the semiconductor layer. The flexible layer has a Young's modulus less than 40 GPa. The first opening penetrates the flexible layer. The second metal layer is disposed on the flexible layer and in the first opening and is electrically connected with the semiconductor layer.

Abstract: A semiconductor device includes a gate, a first electrode, a first insulating layer, an active layer, an etching stop layer, a second insulating layer, a source, a drain and a second electrode. The first insulating layer covers the gate and the first electrode. The active layer and the etching stop layer are disposed on the first insulating layer above the gate and the first electrode respectively. The second insulating layer covers the active layer and the etching stop layer and has a first opening and a second opening exposing the active layer and a third opening exposing the etching stop layer. The source and the drain are disposed on the second insulating layer and contact with the active layer through the first opening and the second opening respectively. The second electrode is located on the second insulating layer and contacts with the etching stop layer through the third opening.

Abstract: A display system is disclosed. The display system comprises a display device; and a computing device. The computing device executes instructions to receive a first plurality of sub-pixel values of a first plurality of sub-pixels of an image. The first plurality of sub-pixels have a plurality of colors. The computing device further executes instructions to select a first sub-pixel of the first plurality of sub-pixels. The first sub-pixel has a first color and is spatially close to a second sub-pixel of the first plurality of sub-pixels. The second sub-pixel has the first color. The computing device further executes instructions to generate a second plurality of sub-pixel values of a second plurality of sub-pixels based on at least first and second sub-pixel values corresponding to the first and second sub-pixels of the first plurality of sub-pixels.

Abstract: A double-side light emitting display panel includes a substrate, a plurality of top emission pixel structures and a plurality of bottom emission pixel structures. The top emission pixel structures are disposed on the substrate, and the bottom emission pixel structures are disposed on the substrate. The top emission pixel structures and the bottom emission pixel structures are arranged alternatively on the substrate.

Abstract: A transistor including a gate, an active stacked structure, a dielectric layer, a source and a drain. The gate is located over a first surface of the dielectric layer. The active stacked structure, including a first active layer and a second active layer, is located over a second surface of the dielectric layer. The source and the drain are located over the second surface of the dielectric layer and at two sides of the active stacked structure and extend between the first active layer and the second active layer of the active stacked structure.

Abstract: A thin-film device may include a carrier, a release layer, a stacking structure, and a flexible substrate. The release layer may be overlaid on the carrier, and the stacking structure is overlaid on the release layer. The stacking structure may include a first protective layer and a second protective layer, wherein the refractive index of the first protective layer exceeds that of the second protective layer. The flexible substrate may be overlaid on the release layer.