Patents by Inventor Jiun-Rong Pai

Jiun-Rong Pai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10559453
    Abstract: Some embodiments relate to a system. The system includes a radio frequency (RF) generator configured to output a RF signal. A transmission line is coupled to the RF generator. A plasma chamber is coupled to RF generator via the transmission line, wherein the plasma chamber is configured to generate a plasma based on the RF signal. A micro-arc detecting element is configured to determine whether a micro-arc has occurred in the plasma chamber based on the RF signal.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: February 11, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Kuang Wu, Chih-Kuo Chang, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Sing-Tsung Li
  • Publication number: 20200043758
    Abstract: In an embodiment, a system includes: a warehousing apparatus configured to interface with a semiconductor die processing tool configured to process a semiconductor die singulated from a wafer, wherein the semiconductor die processing tool comprise an in-port and an out-port, wherein the warehousing apparatus is configured to: move a first die vessel that contains the semiconductor die to the in-port from a first die vessel container, wherein the first die vessel container is configured to house the first die vessel; move the first die vessel from the in-port to a buffer region; and move a second die vessel from the buffer region to the out-port.
    Type: Application
    Filed: July 22, 2019
    Publication date: February 6, 2020
    Inventors: Tsung-Sheng KUO, Chih-Hung Huang, Hsueh-Lei Wang, Yang-Ann Chu, Hsuan Lee, Jiun-Rong Pai
  • Publication number: 20200043812
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Application
    Filed: October 14, 2019
    Publication date: February 6, 2020
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Patent number: 10510573
    Abstract: A loading apparatus for processing a wafer cassette containing a plurality of wafers and an operating method thereof are provided. The operating method includes the following steps. The wafer cassette is loaded on a stage of the loading apparatus. The stage is configured to carry the wafer cassette and movably coupled to a main body of the loading apparatus to move within and out of a space of the main body. The stage is vertically moved among a standby position, a lifting position and an intermediate position; horizontally moved from the intermediate position to a door engaging position inside the space; positioned at the door engaging position, and a cassette door of the wafer cassette is opened. The stage is horizontally moved from the door engaging position to the intermediate position, and horizontally moved between the lifting position and an unloading position outside the space after opening the cassette door.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Hsuan Lee, Hsu-Shui Liu, Jiun-Rong Pai, Chih-Hung Huang, Yang-Ann Chu
  • Publication number: 20190363002
    Abstract: A system and method for cleaning and inspecting ring frames is disclosed here. In one embodiment, a ring frame processing system includes: a cleaning station configured to remove a first tape on a first surface of a ring frame using a first blade, clean first adhesive residues from the first tape on the first surface of the ring frame using a first wheel brush, and remove second adhesive residues from a second tape on a second surface of the ring frame using a second blade; and an inspection station, wherein the inspection station comprises an automated optical inspection system configured to determine the cleanness of the first and second surfaces of the ring frame after cleaning.
    Type: Application
    Filed: May 23, 2018
    Publication date: November 28, 2019
    Inventors: Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Jian-Hung Cheng, M.C. Lin, C.C. Chien, Hsuan Lee, Boris Huang
  • Patent number: 10490463
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: November 26, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Publication number: 20190244343
    Abstract: A method for scanning and analyzing a surface, the method comprising: receiving a piece of equipment with a target surface for inspection; receiving an input from a user; determining at least one scan parameter based on the user input; scanning the target surface using an optical detector in accordance with the at least one scan parameter; generating an image of the target surface; correcting the image of the target surface to remove at least one undesired feature to generate a corrected image based on the at least one scan parameter; and analyzing the corrected image to determine at least one geometric parameter of the target surface.
    Type: Application
    Filed: November 29, 2018
    Publication date: August 8, 2019
    Inventors: Sheng-Hsiang CHUANG, Becky LIAO, Cheng-Kang HU, Shou-Wen KUO, Jiun-Rong PAI, Hsu-Shui LIU
  • Publication number: 20190164793
    Abstract: In an embodiment, a system includes a profiler configured to detect variations along a surface of a semiconductor stage; and a jig configured to move the profiler along an axis over the semiconductor stage.
    Type: Application
    Filed: November 27, 2018
    Publication date: May 30, 2019
    Inventors: Cheng-Kang HU, Hsu-Shui LIU, Jiun-Rong PAI, Shou-Wen KUO, Sheng-Hsiang CHUANG, Cheng-Hung CHEN
  • Publication number: 20190164265
    Abstract: A method includes: receiving a defect map from a defect scanner, wherein the defect map comprises at least one defect location of a semiconductor workpiece; annotating the defect map with a reference fiducial location of the semiconductor workpiece; determining a detected fiducial location within image data of the semiconductor workpiece; determining an offset correction based on comparing the detected fiducial location with the reference fiducial location; producing a corrected defect map by applying the offset correction to the defect map, wherein the applying the offset correction translocates the at least one defect location; and transferring the corrected defect map to a defect reviewer configured to perform root cause analysis based on the corrected defect map.
    Type: Application
    Filed: August 21, 2018
    Publication date: May 30, 2019
    Inventors: Chien-Ko Liao, Ya-Hsun Hsueh, Sheng-Hsiang Chuang, Hsu-Shul Liu, Jiun-Rong Pai, Shou-Wen Kuo
  • Publication number: 20190163149
    Abstract: A semiconductor equipment management method applicable to an electronic device for managing multiple pieces of semiconductor equipment is provided. The pieces of semiconductor equipment are respectively controlled through multiple control hosts, and the control hosts and the electronic device are connected to a switch device. The method includes: receiving real-time image information of each control host through the switch device; determining whether the real-time image information of each control host includes a triggering event by performing an image recognition on the real-time image information; executing a macro corresponding to the triggering event, where the macro includes at least one self-defined operation; generating at least one input command according to the self-defined operation of the executed macro; and controlling the control hosts to execute the self-defined operation of the executed macro by transmitting the input command to the control hosts through the switch device.
    Type: Application
    Filed: July 6, 2018
    Publication date: May 30, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sing-Tsung Li, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Shou-Wen Kuo, Chien-Ko Liao
  • Publication number: 20190148200
    Abstract: A loading apparatus for processing a wafer cassette containing a plurality of wafers and an operating method thereof are provided. The operating method includes the following steps. The wafer cassette is loaded on a stage of the loading apparatus. The stage is configured to carry the wafer cassette and movably coupled to a main body of the loading apparatus to move within and out of a space of the main body. The stage is vertically moved among a standby position, a lifting position and an intermediate position; horizontally moved from the intermediate position to a door engaging position inside the space; positioned at the door engaging position, and a cassette door of the wafer cassette is opened. The stage is horizontally moved from the door engaging position to the intermediate position, and horizontally moved between the lifting position and an unloading position outside the space after opening the cassette door.
    Type: Application
    Filed: January 26, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Hsuan Lee, Hsu-Shui Liu, Jiun-Rong Pai, Chih-Hung Huang, Yang-Ann Chu
  • Publication number: 20190148187
    Abstract: A detaping machine is adapted for removing a tape from a frame, the tape includes a wafer mounting area and a periphery area surrounding the wafer mounting area. The detaping machine includes a carrier and a detaping module. The carrier is for supporting the tape and the frame. The detaping module includes an elastic pressing device and a detaping head, wherein the periphery area of the tape is adapted to be pressed by the elastic pressing device, and the wafer mounting area of the tape is adapted to be pressed by the detaping head. A detaping method is further provided.
    Type: Application
    Filed: January 22, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Wen-Chin Kan, Yang-Ann Chu
  • Patent number: 10283388
    Abstract: A detaping machine is adapted for removing a tape from a frame, the tape includes a wafer mounting area and a periphery area surrounding the wafer mounting area. The detaping machine includes a carrier and a detaping module. The carrier is for supporting the tape and the frame. The detaping module includes an elastic pressing device and a detaping head, wherein the periphery area of the tape is adapted to be pressed by the elastic pressing device, and the wafer mounting area of the tape is adapted to be pressed by the detaping head. A detaping method is further provided.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: May 7, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Wen-Chin Kan, Yang-Ann Chu
  • Publication number: 20190131116
    Abstract: Some embodiments relate to a system. The system includes a radio frequency (RF) generator configured to output a RF signal. A transmission line is coupled to the RF generator. A plasma chamber is coupled to RF generator via the transmission line, wherein the plasma chamber is configured to generate a plasma based on the RF signal. A micro-arc detecting element is configured to determine whether a micro-arc has occurred in the plasma chamber based on the RF signal.
    Type: Application
    Filed: December 26, 2018
    Publication date: May 2, 2019
    Inventors: Feng-Kuang Wu, Chih-Kuo Chang, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Sing-Tsung Li
  • Publication number: 20190103314
    Abstract: Some embodiments relate to a processing tool for processing a singulated semiconductor die. The tool includes an evaluation unit, a drying unit, and a die wipe station. The evaluation unit is configured to subject the singulated semiconductor die to a liquid to detect flaws in the singulated semiconductor die. The drying unit is configured to dry the liquid from a frontside of the singulated semiconductor die. The die wipe station includes an absorptive drying structure configured to absorb the liquid from a backside of the singulated semiconductor die after the drying unit has dried the liquid from the frontside of the singulated semiconductor die.
    Type: Application
    Filed: February 23, 2018
    Publication date: April 4, 2019
    Inventors: Tsung-Sheng Kuo, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Yang-Ann Chu
  • Publication number: 20190067040
    Abstract: An apparatus for handling wafer carriers in a semiconductor fabrication facility (FAB) is disclosed. In one example, the apparatus includes: a table configured to receive a wafer carrier having a first door and operable to hold a plurality of wafers; an opening mechanism configured to open the first door of the wafer carrier; and a door storage space configured to store the first door. The apparatus may be either located on a floor of the FAB or physically coupled to a ceiling of the FAB.
    Type: Application
    Filed: January 30, 2018
    Publication date: February 28, 2019
    Inventors: Tsung-Sheng Kuo, Yang-Ann Chu, Alan Yang, Vic Huang, Hsu-Shui Liu, Jiun-Rong Pai
  • Publication number: 20190067057
    Abstract: An apparatus for inspecting wafer carriers is disclosed. In one example, the apparatus includes: a housing having an opening on a wall of the housing; a load port outside the housing; a robot arm inside the housing; and a processor. The load port is coupled to the wall and configured to load a wafer carrier for inspection. The robot arm is configured to move a first camera connected to the robot arm. The first camera is configured to capture a plurality of images of the wafer carrier. The processor is configured to process the plurality of images to inspect the wafer carrier.
    Type: Application
    Filed: April 27, 2018
    Publication date: February 28, 2019
    Inventors: Cheng-Kang Hu, Shau-Wen Kuo, Sheng-Hsiang Chuang, Jiun-Rong Pai, Hsu-Shui Liu
  • Publication number: 20190051546
    Abstract: The present disclosure relates to a method of automatically re-programming an EFEM to account for positional changes of the EFEM robot. In some embodiments, the method is performed by determining an initial position of an EFEM robot within an EFEM chamber. The EFEM robot at the initial position moves along a first plurality of steps defined relative to the initial position and that extend along a path between a first position and a second position. Positional parameters are determined, which describe a change between an initial position and a new position of the EFEM robot that is different than the initial position. A second plurality of steps are determined based upon the positional parameters. The EFEM robot at the new position moves along the second plurality of steps defined relative to the new position and that extend along the path between the first position and the second position.
    Type: Application
    Filed: November 27, 2017
    Publication date: February 14, 2019
    Inventors: Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo
  • Publication number: 20190035696
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Application
    Filed: February 26, 2018
    Publication date: January 31, 2019
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Patent number: 10170287
    Abstract: Some embodiments relate to a system. The system includes a radio frequency (RF) generator configured to output a RF signal. A transmission line is coupled to the RF generator. A plasma chamber is coupled to RF generator via the transmission line, wherein the plasma chamber is configured to generate a plasma based on the RF signal. A micro-arc detecting element is configured to determine whether a micro-arc has occurred in the plasma chamber based on the RF signal.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: January 1, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Kuang Wu, Chih-Kuo Chang, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Sing-Tsung Li