Patents by Inventor Jochen Kraft

Jochen Kraft has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11808654
    Abstract: An integrated optical transducer for detecting dynamic pressure changes comprises a micro-electro-mechanical system, MEMS, die having a MEMS diaphragm with a first side exposed to the dynamic pressure changes and a second side, and an application-specific integrated circuit, ASIC, die having an optical interferometer assembly. The interferometer assembly comprises a beam splitting element for receiving a source beam from a light source and for splitting the source beam into a probe beam in a first beam path and a reference beam in a second beam path, a beam combining element for combining the probe beam with the reference beam to a superposition beam, and a detector configured to generate an electronic interference signal depending on the superposition beam. The MEMS die is arranged with respect to the ASIC die such that a gap is formed between the second side of the diaphragm and the ASIC die, with the gap defining a cavity and having a gap height.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: November 7, 2023
    Assignee: AMS INTERNATIONAL AG
    Inventors: Goran Stojanovic, Colin Steele, Jens Hofrichter, Catalin Lazar, Jochen Kraft
  • Patent number: 11764109
    Abstract: A substrate is provided with a dielectric, a metal layer embedded in the dielectric, and a metallic layer arranged on the metal layer between the substrate and the metal layer. A via hole is formed in the substrate and in a region of the dielectric that is between the substrate and the metal layer. An insulation layer is applied in the via hole and removed from above a contact area of the metal layer, and the metallic layer is completely removed from the contact area. A metallization is applied in the via hole on the contact area.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: September 19, 2023
    Assignee: AMS AG
    Inventors: Jochen Kraft, Georg Parteder, Stefan Jessenig, Franz Schrank, Jörg Siegert
  • Patent number: 11668636
    Abstract: The particle sensor device comprises a substrate, a photodetector, a dielectric on or above the substrate, a source of electromagnetic radiation, and a through-substrate via in the substrate. The through-substrate via is exposed to the environment, in particular to ambient air. A waveguide is arranged in or above the dielectric so that the electromagnetic radiation emitted by the source of electromagnetic radiation is coupled into a portion of the waveguide. A further portion of the waveguide is opposite the photodetector, so that said portions of the waveguide are on different sides of the through-substrate via, and the waveguide traverses the through-substrate via.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: June 6, 2023
    Assignees: AMS AG, TECHNISCHE UNIVERSITÄT GRAZ
    Inventors: Jochen Kraft, Georg Röhrer, Fernando Jesus Castano Sanchez, Anderson Pires Singulani, Paul Maierhofer
  • Patent number: 11474039
    Abstract: The chemical sensing device comprises a substrate of semiconductor material, integrated circuit components and a photodetector formed in the substrate, a dielectric on the substrate, a wiring in the dielectric, and a source of electromagnetic radiation, a waveguide and a fluorescent sensor layer arranged in or above the dielectric. A portion of the waveguide is arranged to allow the electromagnetic radiation emitted by the source of electromagnetic radiation to be coupled into the waveguide. A further portion of the waveguide is arranged between the photodetector and the fluorescent sensor layer.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: October 18, 2022
    Assignee: ams AG
    Inventors: Martin Sagmeister, Victor Sidorov, Jochen Kraft
  • Publication number: 20220328380
    Abstract: An open through-substrate via, TSV, comprises an insulation layer disposed adjacent to at least a portion of side walls of a trench and to a surface of a substrate body. The TSV further comprises a metallization layer disposed adjacent to at least a portion of the insulation layer and to at least a portion of a bottom wall of said trench, a redistribution layer disposed adjacent to at least a portion of the metallization layer and a portion of the insulation layer disposed adjacent to the surface, and a capping layer disposed adjacent to at least a portion of the metallization layer and to at least a portion of the redistribution layer. The insulation layer and/or the capping layer comprise sublayers that are distinct from each other in terms of material properties. A first of the sublayers is disposed adjacent to at least a portion of the side walls and to at least a portion of the surface and a second of the sublayers is disposed adjacent to at least a portion of the surface.
    Type: Application
    Filed: August 27, 2020
    Publication date: October 13, 2022
    Inventors: Georg PARTEDER, Jochen KRAFT, Stefan JESSENIG
  • Publication number: 20220317391
    Abstract: A bonded structure comprises a substrate component having a plurality of first pads arranged on or within a surface of the substrate component, and an integrated circuit component having a plurality of second pads arranged on or within a surface of the integrated circuit component. The bonded structure further comprises a plurality of connection elements physically connecting the first pads to the second pads. The surface of the integrated circuit component is tilted obliquely to the surface of the substrate component at a tilt angle that results from nominal variations of surface sizes of the first and second pads.
    Type: Application
    Filed: August 25, 2020
    Publication date: October 6, 2022
    Inventors: Jochen Kraft, Bernhard Stering, Colin Steele, Jean Francois Seurin
  • Publication number: 20220244168
    Abstract: An apparatus includes an integrated waveguide structure, and a first light source operable to produce a probe beam having a first wavelength, wherein the probe beam is coupled into a first end of the waveguide structure. A second light source is operable to produce an excitation beam with having a second wavelength to excite gas molecules in close proximity to a path of the probe beam. A light detector is coupled to a second end of the integrated waveguide structure and is operable to detect the probe beam after it passes through the waveguide structure. The apparatus is operable such that excitation of the gas molecules results in a temperature increase of the gas molecules that induces a change in the probe beam that is measurable by the light detector.
    Type: Application
    Filed: July 9, 2020
    Publication date: August 4, 2022
    Inventors: Jochen Kraft, Rainer Minixhofer, Victor Sidorov, Anderson Singulani, Martin Sagmeister, Fernando Castano
  • Patent number: 11367672
    Abstract: A semiconductor device includes a semiconductor body, an electrically conductive via which extends through at least a part of the semiconductor body, and where the via has a top side and a bottom side that faces away from the top side, an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to a lateral direction, where the lateral direction is perpendicular to a vertical direction given by the main axis of extension of the via, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the lateral direction. The etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction, the lateral extent in the lateral direction of the etch-stop layer amounts to at least 2.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: June 21, 2022
    Assignee: AMS AG
    Inventors: Jochen Kraft, Georg Parteder, Anderson Pires Singulani, Raffaele Coppeta, Franz Schrank
  • Patent number: 11355386
    Abstract: A method for manufacturing a semiconductor device is provided. The method comprises the steps of providing a semiconductor body, forming a trench in the semiconductor body in a vertical direction which is perpendicular to the main plane of extension of the semiconductor body, and coating inner walls of the trench with an isolation layer. The method further comprises the steps of coating the isolation layer at the inner walls with a metallization layer, coating a top side of the semiconductor body, at which the trench is formed, at least partially with an electrically conductive contact layer, where the contact layer is electrically connected with the metallization layer, coating the top side of the semiconductor body at least partially and the trench with a capping layer, and forming a contact pad at the top side of the semiconductor body by removing the contact layer and the capping layer at least partially. Furthermore, a semiconductor device is provided.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: June 7, 2022
    Assignee: AMS AG
    Inventors: Georg Parteder, Jochen Kraft, Raffaele Coppeta
  • Publication number: 20210404897
    Abstract: An integrated optical transducer for detecting dynamic pressure changes comprises a micro-electro-mechanical system, MEMS, die having a MEMS diaphragm with a first side exposed to the dynamic pressure changes and a second side, and an application-specific integrated circuit, ASIC, die having an optical interferometer assembly. The interferometer assembly comprises a beam splitting element for receiving a source beam from a light source and for splitting the source beam into a probe beam in a first beam path and a reference beam in a second beam path, a beam combining element for combining the probe beam with the reference beam to a superposition beam, and a detector configured to generate an electronic interference signal depending on the superposition beam. The MEMS die is arranged with respect to the ASIC die such that a gap is formed between the second side of the diaphragm and the ASIC die, with the gap defining a cavity and having a gap height.
    Type: Application
    Filed: September 17, 2019
    Publication date: December 30, 2021
    Inventors: Goran Stojanovic, Colin Steele, Jens Hofrichter, Catalin Lazar, Jochen Kraft
  • Publication number: 20210366764
    Abstract: A method for manufacturing a semiconductor device is provided. The method comprises the steps of providing a semiconductor body, forming a trench in the semiconductor body in a vertical direction which is perpendicular to the main plane of extension of the semiconductor body, and coating inner walls of the trench with an isolation layer. The method further comprises the steps of coating the isolation layer at the inner walls with a metallization layer, coating a top side of the semiconductor body, at which the trench is formed, at least partially with an electrically conductive contact layer, where the contact layer is electrically connected with the metallization layer, coating the top side of the semiconductor body at least partially and the trench with a capping layer, and forming a contact pad at the top side of the semiconductor body by removing the contact layer and the capping layer at least partially. Furthermore, a semiconductor device is provided.
    Type: Application
    Filed: August 23, 2018
    Publication date: November 25, 2021
    Inventors: Georg Parteder, Jochen Kraft, Raffaele Coppeta
  • Patent number: 11127656
    Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: September 21, 2021
    Assignee: AMS AG
    Inventors: Jochen Kraft, Georg Parteder, Anderson Singulani, Raffaele Coppeta, Franz Schrank
  • Publication number: 20210175153
    Abstract: A semiconductor device includes a semiconductor body, an electrically conductive via which extends through at least a part of the semiconductor body, and where the via has a top side and a bottom side that faces away from the top side, an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to a lateral direction, where the lateral direction is perpendicular to a vertical direction given by the main axis of extension of the via, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the lateral direction. The etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction, the lateral extent in the lateral direction of the etch-stop layer amounts to at least 2.
    Type: Application
    Filed: March 20, 2019
    Publication date: June 10, 2021
    Inventors: Jochen KRAFT, Georg PARTEDER, Anderson PIRES SINGULANI, Raffaele COPPETA, Franz SCHRANK
  • Publication number: 20210072134
    Abstract: The particle sensor device comprises a substrate, a photodetector, a dielectric on or above the substrate, a source of electromagnetic radiation, and a through-substrate via in the substrate. The through-substrate via is exposed to the environment, in particular to ambient air. A waveguide is arranged in or above the dielectric so that the electromagnetic radiation emitted by the source of electromagnetic radiation is coupled into a portion of the waveguide. A further portion of the waveguide is opposite the photodetector, so that said portions of the waveguide are on different sides of the through-substrate via, and the waveguide traverses the through-substrate via.
    Type: Application
    Filed: December 13, 2018
    Publication date: March 11, 2021
    Inventors: Jochen Kraft, Georg Röhrer, Fernando Jesus CASTANO SANCHEZ, Anderson PIRES SINGULANI, Paul MAIERHOFER
  • Publication number: 20210020511
    Abstract: A substrate is provided with a dielectric, a metal layer embedded in the dielectric, and a metallic layer arranged on the metal layer between the substrate and the metal layer. A via hole is formed in the substrate and in a region of the dielectric that is between the substrate and the metal layer. An insulation layer is applied in the via hole and removed from above a contact area of the metal layer, and the metallic layer is completely removed from the contact area. A metallization is applied in the via hole on the contact area.
    Type: Application
    Filed: April 3, 2019
    Publication date: January 21, 2021
    Inventors: Jochen Kraft, Georg Parteder, Stefan Jessenig, Franz Schrank, Jörg Siegert
  • Publication number: 20200284727
    Abstract: The chemical sensing device comprises a substrate of semiconductor material, integrated circuit components and a photodetector formed in the substrate, a dielectric on the substrate, a wiring in the dielectric, and a source of electromagnetic radiation, a waveguide and a fluorescent sensor layer arranged in or above the dielectric. A portion of the waveguide is arranged to allow the electromagnetic radiation emitted by the source of electromagnetic radiation to be coupled into the waveguide. A further portion of the waveguide is arranged between the photodetector and the fluorescent sensor layer.
    Type: Application
    Filed: November 28, 2018
    Publication date: September 10, 2020
    Inventors: Martin Sagmeister, Victor Sidorov, Jochen Kraft
  • Patent number: 10684412
    Abstract: A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: June 16, 2020
    Assignee: ams AG
    Inventors: Jochen Kraft, Joerg Siegert
  • Publication number: 20200020611
    Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via.
    Type: Application
    Filed: February 14, 2018
    Publication date: January 16, 2020
    Inventors: Jochen Kraft, Georg Parteder, Anderson Singulani, Raffaele Coppeta, FRANZ SCHRANK
  • Patent number: 10468541
    Abstract: A dielectric layer (2) is arranged on the main surface (10) of a semiconductor substrate (1), and a passivation layer (6) is arranged on the dielectric layer. A metal layer (3) is embedded in the dielectric layer above an opening (12) in the substrate, and a metallization (14) is arranged in the opening. The metallization contacts the metal layer and forms a through-substrate via to a rear surface (11) of the substrate. A layer or layer sequence (7, 8, 9) comprising at least one further layer is arranged on the passivation layer above the opening. In this way the bottom of the through-substrate via is stabilized. A plug (17) may additionally be arranged in the opening without filling the opening.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: November 5, 2019
    Assignee: ams AG
    Inventors: Franz Schrank, Sara Carniello, Hubert Enichlmair, Jochen Kraft, Bernhard Loeffler, Rainer Holzhaider
  • Patent number: 10340254
    Abstract: The method of producing an interposer-chip-arrangement, comprises providing an interposer (1) with an integrated circuit (25), arranging a dielectric layer (2) with metal layers embedded in the dielectric layer above a main surface (10) of the interposer, connecting the integrated circuit with at least one of the metal layers, forming an interconnection (7) through the interposer, the interconnection contacting one of the metal layers, arranging a further dielectric layer (3) above a further main surface (11) of the interposer opposite the main surface and arranging a further metal layer in or on the further dielectric layer, the further metal layer being connected with the interconnection, arranging a chip provided with at least one contact pad at the main surface or at the further main surface, and electrically conductively connecting the contact pad with the interconnection.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: July 2, 2019
    Assignee: ams AG
    Inventors: Jochen Kraft, Martin Schrems, Franz Schrank