Abstract: Techniques for colorimetric based test strip analysis and reader system are provided. In one aspect, a method of test strip analysis includes: illuminating a test strip wetted with a sample with select spectrums of light, wherein the test strip includes test pads that are configured to change color in the presence of an analyte in the sample; obtaining at least one digital image of the test strip; and analyzing color intensity from the at least one digital image against calibration curves to determine an analyte concentration in the sample with correction for one or more interference substances in the sample that affect the color intensity. A calibration method and a reader device are also provided.

Abstract: Die stacks and methods of making die stacks with very thin dies are disclosed. The die surfaces remain flat within a 5 micron tolerance despite the thinness of the die and the process steps of making the die stack. A residual flux height is kept below 50% of the spacing distance between adjacent surfaces or structures, e.g. in the inter-die spacing.

Abstract: Techniques for colorimetric based test strip analysis and reader system are provided. In one aspect, a method of test strip analysis includes: illuminating a test strip wetted with a sample with select spectrums of light, wherein the test strip includes test pads that are configured to change color in the presence of an analyte in the sample; obtaining at least one digital image of the test strip; and analyzing color intensity from the at least one digital image against calibration curves to determine an analyte concentration in the sample with correction for one or more interference substances in the sample that affect the color intensity. A calibration method and a reader device are also provided.

Abstract: Techniques regarding a thin film battery, which can comprise one or more sealing layers, and a method of manufacturing thereof are provided. For example, one or more embodiments described herein can regard an apparatus that can comprise a thin film battery cell encapsulated in a multi-layer stack comprising an adhesive layer located between a first substrate layer and a second substrate layer. The apparatus can also comprise a metal sealing layer at least partially surrounding the multi-layer stack.

Abstract: Techniques for high speed handling of ultra-small chips (e.g., micro-chips) by selective laser bonding and/or debonding are provided. In one aspect, a method includes: providing a first wafer including chips bonded to a surface thereof; contacting the first wafer with a second wafer, the second wafer including a substrate bonded to a surface thereof, wherein the contacting aligns individual chips with bonding sites on the substrate; and debonding the individual chips from the first wafer using a debonding laser having a small spot size of about 0.5 ?m to about 100 ?m, and ranges therebetween. A system is also provided that has digital cameras, a motorized XYZ-axis stage, and a computer control system configured to i) control a spot size of the at least one laser source and ii) adjust a positioning of the sample to align individual chips with a target area of the laser.

Abstract: Techniques for colorimetric based test strip analysis and reader system are provided. In one aspect, a method of test strip analysis includes: illuminating a test strip wetted with a sample with select spectrums of light, wherein the test strip includes test pads that are configured to change color in the presence of an analyte in the sample; obtaining at least one digital image of the test strip; and analyzing color intensity from the at least one digital image against calibration curves to determine an analyte concentration in the sample with correction for one or more interference substances in the sample that affect the color intensity. A calibration method and a reader device are also provided.

Abstract: Techniques for high speed handling of ultra-small chips (e.g., micro-chips) by selective laser bonding and/or debonding are provided. In one aspect, a method includes: providing a first wafer including chips bonded to a surface thereof; contacting the first wafer with a second wafer, the second wafer including a substrate bonded to a surface thereof, wherein the contacting aligns individual chips with bonding sites on the substrate; and debonding the individual chips from the first wafer using a debonding laser having a small spot size of about 0.5 ?m to about 100 ?m, and ranges therebetween. A system is also provided that has digital cameras, a motorized XYZ-axis stage, and a computer control system configured to i) control a spot size of the at least one laser source and ii) adjust a positioning of the sample to align individual chips with a target area of the laser.

Abstract: Writing recognition using a wearable pressure sensing device includes receiving pressure measurement data from a pressure sensor disposed upon a body part of a user. The pressure measurement data is indicative of a change in pressure of the body part due to an interaction of the body part with a medium indicative of a writing gesture by the user. A start boundary and end boundary for each of a plurality of writing symbols is detected based upon the pressure measurement data. At least one feature of the pressure measurement data associated with the plurality of writing symbols is extracted. A symbol pattern is detected based upon the extracted features, and at least one letter is detected based upon the symbol pattern. A word is detected based upon the detected at least one letter.

Abstract: Techniques for high speed handling of ultra-small chips (e.g., micro-chips) by selective laser bonding and/or debonding are provided. In one aspect, a method includes: providing a first wafer including chips bonded to a surface thereof; contacting the first wafer with a second wafer, the second wafer including a substrate bonded to a surface thereof, wherein the contacting aligns individual chips with bonding sites on the substrate; and debonding the individual chips from the first wafer using a debonding laser having a small spot size of about 0.5 ?m to about 100 ?m, and ranges therebetween. A system is also provided that has digital cameras, a motorized XYZ-axis stage, and a computer control system configured to i) control a spot size of the at least one laser source and ii) adjust a positioning of the sample to align individual chips with a target area of the laser.

Abstract: A method of manufacturing integrated devices, and a stacked integrated device are disclosed. In an embodiment, the method comprises providing a substrate; mounting at least a first electronic component on the substrate; positioning a handle wafer above the first electronic component; attaching the first electronic component to the substrate via electrical connectors between the first electronic component and the substrate; and while attaching the first electronic component to the substrate, using the handle wafer to apply pressure, toward the substrate, to the first electronic component, to manage planarity of the first electronic component during the attaching. In an embodiment, a joining process is used to attach the first electronic component to the substrate via the electrical connectors. For example, thermal compression bonding may be used to attach the first electronic component to the substrate via the electrical connectors.

Abstract: Systems, devices, and techniques facilitating wirelessly charging and/or communicating with one or more electronic devices (e.g., electronic wearable devices) are provided. A device can comprise a memory and a storage component that can be operatively coupled to the memory. The storage component can comprise one or more recesses that can receive a second device that can be charged by the storage component. The storage component can comprise a charging circuit and an inductive circuit that can be coupled to the charging circuit. The storage component can harvest energy from one or more energy sources to charge the charging circuit. Based on the energy harvested, the inductive circuit can inductively couple to the second device having a second inductive circuit and positioned in at least one of the recesses and the inductive circuit can charge a power source of the second device.

Abstract: A method of manufacturing integrated devices, and a stacked integrated device are disclosed. In an embodiment, the method comprises providing a substrate; mounting at least a first electronic component on the substrate; positioning a handle wafer above the first electronic component; attaching the first electronic component to the substrate via electrical connectors between the first electronic component and the substrate; and while attaching the first electronic component to the substrate, using the handle wafer to apply pressure, toward the substrate, to the first electronic component, to manage planarity of the first electronic component during the attaching. In an embodiment, a joining process is used to attach the first electronic component to the substrate via the electrical connectors. For example, thermal compression bonding may be used to attach the first electronic component to the substrate via the electrical connectors.

Abstract: A test probe head for probe testing multiple chips on a wafer in a single probing. A probe head substrate includes an array of probe tip attach pads on one surface. The array includes a subarray for each probe head chip test site. Probe tips attached to each probe tip attach pad have an across the head tip height variation less than one micrometer (1 ?m). The subarray probe tips may be on a pitch at or less than fifty microns (50 ?m). The test probe head may be capable of test probing all chips in a quadrant and even up to all chips on a single wafer in a single probing.

Abstract: Apparatus, systems, and methods of manufacture of sensors facilitating monitoring of living entities. In one example, a system comprises a flexible substrate comprising an adhesive adapted to cause the flexible substrate to adhere to a defined surface. A silicon substrate or film can be disposed on the flexible substrate, wherein the silicon substrate or film is formed to include one or more nanogratings adapted to receive and reflect light based on strain on the defined surface.

Abstract: Systems and/or techniques associated with a solid-state microbattery packaging system are provided. In one example, a device comprises a substrate layer and a tape substrate layer. The substrate layer is associated with a set of solid-state microbattery components. The tape substrate comprises a releasable adhesive material and a polymer sealing material. A conductive surface associated with the set of solid-state microbattery components is disposed on the releasable adhesive material of the tape substrate layer.

Abstract: Systems and/or techniques associated with a solid-state microbattery packaging system are provided. In one example, a device comprises a substrate layer and a tape substrate layer. The substrate layer is associated with a set of solid-state microbattery components. The tape substrate comprises a releasable adhesive material and a polymer sealing material. A conductive surface associated with the set of solid-state microbattery components is disposed on the releasable adhesive material of the tape substrate layer.

Abstract: A method of forming surface protrusions on an article, and the article with the protrusions attached. The article may be an Integrated Circuit (IC) chip, a test probe for the IC chip or any suitable substrate or nanostructure. The surface protrusions are electroplated to a template or mold wafer, transferred to the article and easily separated from the template wafer. Thus, the attached protrusions may be, e.g., micro-bumps or micro pillars on an IC chip or substrate, test probes on a probe head, or one or more cantilevered membranes in a micro-machine or micro-sensor or other micro-electro-mechanical systems (MEMS) formed without undercutting the MEMS structure.

Abstract: A method of forming surface protrusions on an article, and the article with the protrusions attached. The article may be an Integrated Circuit (IC) chip, a test probe for the IC chip or any suitable substrate or nanostructure. The surface protrusions are electroplated to a template or mold wafer, transferred to the article and easily separated from the template wafer. Thus, the attached protrusions may be, e.g., micro-bumps or micro pillars on an IC chip or substrate, test probes on a probe head, or one or more cantilevered membranes in a micro-machine or micro-sensor or other micro-electro-mechanical systems (MEMS) formed without undercutting the MEMS structure.

Abstract: Disclosed is a process, structure, equipment and apparatus directed to a low cost, high volume approach for the assembly of ultra small die to three-dimensional (3D) or 2.5D semiconductor packages.

Abstract: A method of manufacturing integrated devices, and a stacked integrated device are disclosed. In an embodiment, the method comprises providing a substrate; mounting at least a first electronic component on the substrate; positioning a handle wafer above the first electronic component; attaching the first electronic component to the substrate via electrical connectors between the first electronic component and the substrate; and while attaching the first electronic component to the substrate, using the handle wafer to apply pressure, toward the substrate, to the first electronic component, to manage planarity of the first electronic component during the attaching. In an embodiment, a joining process is used to attach the first electronic component to the substrate via the electrical connectors. For example, thermal compression bonding may be used to attach the first electronic component to the substrate via the electrical connectors.