Abstract: Under the present invention, a semiconductor chip is electrically connected to a substrate (e.g., organic, ceramic, etc.) by an interposer structure. The interposer structure comprises an elastomeric, compliant material that includes metallurgic through connections having a predetermined shape. In a typical embodiment, the metallurgical through connections electrically connect an under bump metallization of the semiconductor chip to a top surface metallization of the substrate. By utilizing the interposer structure in accordance with the present invention, the problems associated with previous semiconductor module designs are alleviated.

Abstract: A system and method for injection molding conductive bonding material into a plurality of cavities in a non-rectangular mold is disclosed. The method comprises aligning a fill head with a non-rectangular mold. The non-rectangular mold includes a plurality of cavities. The fill head is placed in substantial contact with the non-rectangular mold. Rotational motion is provided to at least one of the non-rectangular mold and the fill head while the fill head is in substantial contact with the non-rectangular mold. Conductive bonding material is forced out of the fill head toward the non-rectangular mold. The conductive bonding material is provided into at least one cavity of the plurality of cavities contemporaneous with the at least one cavity being in proximity to the fill head.

Abstract: A system, method, and device for applying conductive bonding material to a substrate are disclosed. The method includes providing conductive bonding material in a plurality of cavities of a mold. A total number of cavities in the plurality of cavities being greater than a total number of at least one conductive pad of a circuit supporting substrate corresponding to the mold. The conductive bonding material in the mold is heated to a reflow temperature of the conductive bonding material. At least one wettable surface is placed in substantial contact with the heated conductive bonding material in at least one cavity. The mold and the corresponding circuit supporting substrate are brought in close proximity to each other such that the heated conductive bonding material in at least one cavity comes in contact with at least one conductive pad of the corresponding circuit supporting substrate.

Abstract: A system, method, and apparatus for injection molding conductive bonding material into a plurality of cavities in a surface are disclosed. The method comprises aligning a fill head with a surface. The mold includes a plurality of cavities. The method further includes placing the fill head in substantial contact with the surface. At least a first gas is channeled about a first region of the fill head. The at least first gas has a temperature above a melting point of conductive bonding material residing in a reservoir thereby maintaining the conductive bonding material in a molten state. The conductive bonding material is forced out of the fill head toward the surface. The conductive bonding material is provided into at least one cavity of the plurality of cavities contemporaneous with the at least one cavity being in proximity to the fill head.

Abstract: A system and method are provided for injection molding conductive bonding material into a plurality of cavities in a mold within a vacuum chamber. A mold and a fill head are located within a vacuum chamber, wherein the mold includes a plurality of cavities. A vacuum is created within the vacuum chamber, thereby removing air from the chamber and from the cavities. Optionally, rotational motion is provided to at least one of the mold and the fill head while the fill head is in substantial contact with the mold. Conductive bonding material is forced out of the fill head toward the mold, and into at least one of the cavities, while a vacuum is maintained in the vacuum chamber.

Abstract: A system, method, and apparatus of providing conductive bonding material into a plurality of cavities in a circuit supporting substrate is disclosed. The method comprises placing a fill head in substantial contact with a circuit supporting substrate. The circuit supporting substrate includes at least one cavity. A linear motion or a rotational motion is provided to at least one of the circuit supporting substrate and the fill head while the fill head is in substantial contact with the circuit supporting substrate. Conductive bonding material is forced out of the fill head toward the circuit supporting substrate. The conductive bonding material is provided into the at least one cavity contemporaneous with the at least one cavity being in proximity to the fill head.

Abstract: An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.

Abstract: A physically secure processing assembly is provided that includes dies mounted on a substrate so as to sandwich the electrical contacts of the dies between the dies and the substrate. The substrate is provided with substrate contacts and conductive pathways that are electrically coupled to the die contacts and extend through the substrate. Electrical conductors surround the conductive pathways. A monitoring circuit detects a break in continuity of one or more of the electrical conductors, and preferably renders the assembly inoperable. Preferably, an epoxy encapsulation is provided to prevent probing tools from being able to reach the die or substrate contacts.

Abstract: Ball Grid Array packages having decreased adhesion of the BGA pad to the laminate surface and methods for producing same are provided.

Abstract: Disclosed is a laminated (or non-laminated) conductive interconnection for joining an integrated circuit device to a device carrier, where the conductive interconnection comprises alternating metal layers and polymer layers. In addition, the polymer can include dendrites, metal projections from the carrier or device, and/or micelle brushes on the outer portion of the polymer. The polymer layers include metal particles and the alternating metal layers and polymer layers form either a cube-shaped structure or a cylinder-shaped structure.

Abstract: Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein, the at least one interposer structure being configured to allow for one or more of the plurality of decoupling capacitors to be selectively deactivated. In another aspect, a method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein comprises the following step. One or more of the plurality of decoupling capacitors are selectively deactivated.

Abstract: Apparatus and methods are provided for constructing balanced semiconductor chip package structures that minimize bowing, in-plane strain and/or other thermally induced mechanical strains that may arise during thermal cycling, to thus prevent structural damage to chip package structures.

Abstract: Disclosed are microelectronic structures based on improved design and material combinations to provide improved current capabilities per I/O. The preferred embodiment of the invention uses a combination of one or more of the following: (1) Underbump metallurgy which enhances current per I/O by increasing via diameter or by having multiple via openings under BLM; (2) Thicker underbump metallurgy, where use of good conductor metallurgies can be used with increased thickness; (3) Utilizing larger via diameter under bump metallurgy, larger solder bump diameter and/or other current enhancing features for power and/or ground via connections; and (4) Using additives in Pb-free alloys to alter microstructure to minimize migration of atoms in the solder or at intermetallic transitions.

Abstract: The present disclosure relates generally to semiconductor, integrated circuits, and particularly, but not by way of limitation, to centrifugal methods of filling high-aspect ratio vias and trenches with powders, pastes, suspensions of materials to act as any of a conducting, structural support, or protective member of an electronic component.

Abstract: A method of forming compliant electrical contacts includes patterning a conductive layer into an array of compliant members. The array of compliant members is then positioned to be in contact with electrical connection pads on an integrated circuit wafer and the compliant members are joined to the pads. Then, the supporting layer that supported the compliant members is removed to leave the compliant members connected to the pads.

Abstract: Disclosed is a laminated (or non-laminated) conductive interconnection for joining an integrated circuit device to a device carrier, where the conductive interconnection comprises alternating metal layers and polymer layers. In addition, the polymer can include dendrites, metal projections from the carrier or device, and/or micelle brushes on the outer portion of the polymer. The polymer layers include metal particles and the alternating metal layers and polymer layers form either a cube-shaped structure or a cylinder-shaped structure.

Abstract: Disclosed is a method of forming an integrated circuit structure that forms lead-free connectors on a device, surrounds the lead-free connectors with a compressible film, connects the device to a carrier (the lead-free connectors electrically connect the device to the carrier), and fills the gaps between the carrier and the device with an insulating underfill.

Abstract: A method is provided for making ferrules for connecting optical fibers to other optical fibers or to an optical input device such as an optical chip. The method utilizes ceramic greensheets or silicon wafers. In one method, the greensheets are stacked and laminated and then fiber optic through openings are provided in the laminate for holding the fibers. The laminate is then sintered forming the ferrule.

Abstract: Under the present invention, a semiconductor chip is electrically connected to a substrate (e.g., organic, ceramic, etc.) by an interposer structure. The interposer structure comprises an elastomeric, compliant material that includes metallurgic through connections having a predetermined shape. In a typical embodiment, the metallurgical through connections electrically connect an under bump metallization of the semiconductor chip to a top surface metallization of the substrate. By utilizing the interposer structure in accordance with the present invention, the problems associated with previous semiconductor module designs are alleviated.

Abstract: A plate for use in mixing and testing materials in the pharmaceutical industry is formed by a method in which apertures in a set of greensheets are formed by a material removal process, at least some of the apertures being filled with a composite material combining a durable matrix material that remains in the final structure and a temporary material that is removed after the sintering step. An array of apertures is formed in a template plate by photolithographic means and transferred to an adjacent greensheet.