Abstract: A polymer blend membrane includes a polyether-based copolymer and a polyether polymerized in situ and has high permeability and high selectivity for carbon dioxide. In the polymer blend membrane, the free volume of the polyether-based copolymer is greatly increased, and the adsorption capacity for carbon dioxide is enhanced. Thus, it can have excellent mechanical properties and excellent permeability and selectivity for carbon dioxide.

Abstract: A multilayer ceramic capacitor includes a ceramic body having a dielectric layer, a plurality of internal electrodes disposed in the ceramic body, and a first side margin portion and a second side margin portion arranged on end portions of the internal electrodes exposed through respective opposing surfaces of the ceramic body. The ceramic body includes an active portion having the plurality of internal electrodes arranged to overlap each other with the dielectric layer interposed therebetween to form capacitance, and cover portions disposed above an uppermost and below a lowermost internal electrode of the active portion. The first and second side margin portions include tin (Sn), and a content of Sn included in the first and second side margin portions is greater than a content of Sn included in the dielectric layer of the active portion.

Abstract: A multilayer ceramic capacitor includes a ceramic body including dielectric layers, a plurality of internal electrodes disposed in the ceramic body, and a first side margin portion and a second side margin portion respectively arranged on end portions of the internal electrodes exposed to first and second surfaces. The first and second side margin portions each include a first region adjacent to an outward facing side surface of the respective side margin portion, and a second region adjacent to the internal electrodes exposed to the first and second surfaces of the ceramic body, and an average size of dielectric grains included in the second region is larger than an average size of dielectric grains included in the first region.

Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.

Abstract: A display panel includes a first substrate including a display area, in which a plurality of pixel areas is arranged, and a non-display area around the display area, a second substrate disposed opposite to the first substrate, a light emitting array disposed on the first substrate and including a plurality of light emitting elements corresponding to the plurality of pixel areas, a sealing layer disposed in the non-display area between the first substrate and the second substrate and bonding the first substrate and the second substrate to each other, a vacuum layer sealed by the sealing layer and defined between the light emitting array and the second substrate, and a reflection adjustment layer disposed on the second substrate and absorbing a portion of external light, where the reflection adjustment layer includes a plurality of protrusions protruding toward the light emitting array and exposed to the vacuum layer.

Abstract: A method of manufacturing a multilayer electronic component includes forming a stack by stacking a plurality of ceramic green sheets on which conductive patterns are disposed on a support film, cutting the stack in a second direction, perpendicular to a first direction which is a stacking direction of the plurality of ceramic green sheets, cutting the stack in a third direction, perpendicular to the first and second directions, to obtain a plurality of unit chips, separating the unit chip from the support film, arranging the unit chip such that one of side surfaces of the unit chip is in contact with an adhesive tape, and attaching another one of the side surfaces to a ceramic green sheet for a side margin portion, and forming a side margin portion on the another one of side surfaces.

Abstract: Provided are a transmitter and a method for transmitting a data block in a wireless communication system. The method comprises the following steps: deciding the number of bits (s) and encoders (NES) to allocate to one axis of a signal constellation; encoding an information bit based on the s and the NES and generating a coded block; parsing the coded block based on the s and the NES and generating a plurality of frequency sub-blocks; and transmitting the plurality of frequency sub-blocks to a receiver.

Abstract: A method for fabricating semiconductor device includes forming an alternating stack that includes a lower multi-layered stack and an upper multi-layered stack by alternately stacking a dielectric layer and a sacrificial layer over a substrate, forming a vertical trench that divides the upper multi-layered stack into dummy stacks, and forming an asymmetric stepped trench that is extended downward from the vertical trench to divide the lower multi-layered stack into a pad stack and a dummy pad stack, wherein forming the asymmetric stepped trench includes forming a first stepped sidewall that is defined at an edge of the pad stack, and forming a second stepped sidewall that is defined at an edge of the dummy pad stack and occupies less area than the first stepped sidewall.

Abstract: A multilayer capacitor includes a body including dielectric layers and internal electrodes and external electrodes disposed on an external surface of the body and connected to the internal electrodes. The body includes a first surface and a second surface to which the internal electrodes are exposed, the first surface and the second surface opposing each other in a first direction, a third surface and a fourth surface opposing each other in a second direction which is a direction in which the dielectric layers are stacked, and a fifth surface and a sixth surface opposing each other in a third direction. At least one of the internal electrodes include a first bottleneck structure having a first directional length of a third-directional outer region smaller than an inner region thereof and a second bottleneck structure having a third directional length of a first directional outer region smaller than an inner region thereof.

Abstract: Disclosed is an electronic device configured to perform a secure boot. The electronic device according to an embodiment disclosed herein may include: a first memory area for storing a firmware signed with a private key; a second memory area for storing a boot loader configured to verify integrity of the firmware and executing the firmware of which integrity has been verified; and a third memory area for storing a first public key paired with the private key, wherein the second memory area may store a second public key paired with the private key. The boot loader may verify the integrity of the firmware with the first public key when there is the first public key in the third memory area and verify the integrity of the firmware with the second public key when there is no first public key is in the third memory area.

Abstract: A vertical NAND flash type semiconductor device may include a plurality of cell strings extending vertically, each of the plurality of cell strings including a plurality of cells connected in series vertically. The plurality of cells in each cell strings include a plurality of effective cells for data storage and a plurality of compensation cells for resistance compensation. In each cell string, a change in a string resistance of the cell string that may occur due to a change of resistance states of the plurality of effective cells of that cell string may be controlled by controlling resistance states of the plurality of compensation cells of that cell string according to the resistance states of the plurality of effective cells in that cell string.

Abstract: The present invention relates to a method for purification of hemopexin and haptoglobin and provides a method in which a solution containing hemopexin and haptoglobin is titrated to a range of specific pH values without a step of precipitating haptoglobin by salt addition, followed by separating and purifying hemopexin and haptoglobin individually.

Abstract: A multilayer capacitor includes: a capacitor body including first and second internal electrodes alternately stacked with a dielectric layer interposed therebetween, and having first to six surfaces, the first internal electrode being exposed through the third, fifth, and sixth surfaces, the second internal electrode being exposed through the fourth, fifth, and sixth surfaces; first and second side portions disposed on the fifth and sixth surfaces of the capacitor body; and first and second external electrodes. The capacitor body includes upper and lower cover portions disposed on an upper surface of an uppermost internal electrode and a lower surfaces of a lowermost internal electrode, respectively, in a stacking direction of the first and second internal electrodes. The first and second side portions and the upper and lower cover portions include zirconium (Zr).

Abstract: Disclosed are a cathode for an all-solid-state battery including a cathode thin film for an all-solid-state battery or a cathode composite membrane for an all-solid-state battery, and an all-solid-state battery including the same. The cathode for an all-solid-state battery contains a grain that has a plane having a low surface energy and has a grain boundary arranged parallel to the electron movement direction, thus effectively lowering the interfacial resistance of the thin film while suppressing the dissolution and diffusion of the transition metal, thereby improving the cycle stability of the all-solid-state battery including the same.

Abstract: A capacitor component includes a body having a lamination portion in which first internal electrodes and second internal electrodes are alternately disposed to face each other in a first direction with dielectric layers disposed therebetween, and first and second margin portions disposed on respective opposing sides of the lamination portion in a second direction perpendicular to the first direction. First and second external electrodes are disposed on respective opposing sides of the body in a third direction and are electrically connected to the first and second internal electrodes, respectively. Each of the first and second margin portions includes a reinforcing pattern.

Abstract: A semiconductor memory device includes a memory cell interposed between a first electrode and a second electrode, and configured with a chalcogenide layer that includes three or more components, and a peripheral circuit for providing the memory cell with a program pulse inducing a compositional gradient in the chalcogenide layer.

Abstract: A capacitor component includes a body having a lamination portion in which first internal electrodes and second internal electrodes are alternately disposed to face each other in a first direction with dielectric layers disposed therebetween, and first and second margin portions disposed on respective opposing sides of the lamination portion in a second direction perpendicular to the first direction. First and second external electrodes are disposed on respective opposing sides of the body in a third direction and are electrically connected to the first and second internal electrodes, respectively. Each of the first and second margin portions includes a reinforcing pattern.

Abstract: A multilayer ceramic capacitor include: a ceramic body including first and second surfaces opposing each other and third and fourth surfaces connecting the first and second surfaces; a plurality of internal electrodes disposed inside the ceramic body and exposed to the first and second surfaces, the plurality internal electrodes each having one end exposed to the third or fourth surface; and first and second side margin portions disposed on sides of the internal electrodes exposed to the first and second surfaces. A dielectric composition of the first and second side margin portions is different from a dielectric composition of the ceramic body, and a dielectric constant of the first and second side margin portions is lower than a dielectric constant of the ceramic body.

Abstract: A multilayer ceramic electronic component includes a body including a dielectric layer, first and second internal electrodes, a stacked portion including first and second surfaces opposing each other in a stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces, connected to the third and fourth surfaces, and opposing each other, and a coating layer disposed on the first to sixth surfaces of the stacked portion and having first and second connection portions; and first and second external electrodes connected to the first and second internal electrodes, respectively, and arranged on the third and fourth surfaces of the body, wherein the first and second internal electrodes are respectively connected to the first and second external electrodes through the first and second connection portions.